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2016 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)最新文献

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An energy-efficient differential-BPSK transceiver for IoT applications 面向物联网应用的高能效差分bpsk收发器
Pub Date : 2016-09-29 DOI: 10.1109/RFIT.2016.7578167
Yi-Lin Tsai, Jian-You Chen, Chun-Yu Lin, B. Wang, Tzu-Yu Yeh, Tsung-Hsien Lin
A 400-MHz 10-Mbps differential BPSK (D-BPSK) transceiver is presented. The receiver adopts a dynamic phase-to-amplitude conversion technique, which converts signal phase transition to amplitude variation. In the transmitter, phase modulated signal is realized by edge combining appropriate phases via an array of phase MUXs. Fabricated in 0.18-μm CMOS process, the receiver accomplishes -63dBm sensitivity at 0.1% BER and draws 1.77mW, from 0.9-V supply. The TX draws 0.51mW at -15dBm output power. The overall link efficiency is 228pJ/b.
提出了一种400-MHz 10-Mbps差分BPSK (D-BPSK)收发器。接收机采用动态相幅转换技术,将信号的相变转换为幅度变化。在发射机中,相位调制信号是通过相位mux阵列进行适当相位的边组合来实现的。该接收器采用0.18 μm CMOS工艺制造,在0.1% BER下实现-63dBm灵敏度,在0.9 v电源下功耗为1.77mW。在-15dBm输出功率时,TX消耗0.51mW。总链路效率为228pJ/b。
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引用次数: 1
A 1.0–5.0GHz tunable LNA with automatic frequency calibration in 65 nm CMOS 一个1.0-5.0GHz可调谐LNA,在65纳米CMOS中具有自动频率校准功能
Pub Date : 2016-09-29 DOI: 10.1109/RFIT.2016.7578217
Zipeng Chen, Xinwang Zhang, Zheng Song, Wen Jia, B. Chi
A 1.0-5.0 GHz tunable low-noise amplifier (LNA) in 65 nm is presented, which employs dual feedback common gate (CG) topology to reduce the noise figure (NF) and out-of-band interference. The amplitude-detection-based automatic frequency calibration technique is proposed to overcome the effects of the process variation with little extra cost. The measured average frequency error after the calibration is less than 4.4 MHz. The proposed dual feedback CG-LNA achieves the power gain of 19~26 dB. The input matching S11 is -18 dB~-5 dB, and the NF is 2.4~3.8 dB. The chip consumes 10.06 mA from one 1.2 V power supply, with 0.7 mm2 die area consumption.
提出了一种1.0 ~ 5.0 GHz的65 nm可调谐低噪声放大器(LNA),该放大器采用双反馈共门(CG)拓扑结构来降低噪声系数(NF)和带外干扰。提出了一种基于幅值检测的频率自动校准技术,以较低的成本克服了过程变化的影响。校正后的测量平均频率误差小于4.4 MHz。所提出的双反馈CG-LNA可实现19~26 dB的功率增益。输入匹配S11为- 18db ~- 5db, NF为2.4~3.8 dB。该芯片从一个1.2 V电源消耗10.06 mA,芯片面积消耗0.7 mm2。
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引用次数: 3
A high-efficiency and high-gain, plastic packaged GaN HEMT for 3.5-GHz-band LTE base stations 一种用于3.5 ghz频段LTE基站的高效高增益塑料封装GaN HEMT
Pub Date : 2016-09-29 DOI: 10.1109/RFIT.2016.7578168
N. Kosaka, S. Fujiwara, A. Okamura, K. Chomei, Y. Sasaki, K. Horiguchi, H. Katayama, A. Inoue
A plastic packaged GaN HEMT is presented for 3.5-GHz-band LTE small-cell base-station applications. A pair of GaN HEMT dies and MIM capacitors is assembled in the package for Doherty amplifier use. Optimized drain bonding wire length enhances high efficiency operation. The input prematching with the MIM capacitors suppresses insertion loss and improves power gain. Measurements of a single-chain amplifier using the GaN HEMT show a high drain efficiency of 66.3% and a high power gain of 16.2 dB at 3.5 GHz, regardless of plastic packaging. A Doherty amplifier demonstration with the GaN HEMT shows a drain efficiency as high as 51.2% and an output power of 36.0 dBm at ACLR of -50 dBc. This is the first demonstration of a plastic packaged GaN HEMT Doherty amplifier in the 3.5-GHz band.
提出了一种用于3.5 ghz频段LTE小蜂窝基站应用的塑料封装GaN HEMT。一对GaN HEMT芯片和MIM电容器组装在封装中,用于多尔蒂放大器。优化漏焊线长度,提高操作效率。MIM电容的输入预匹配抑制了插入损耗,提高了功率增益。使用GaN HEMT的单链放大器的测量显示,在3.5 GHz时,无论塑料封装如何,其漏极效率高达66.3%,功率增益高达16.2 dB。使用GaN HEMT的Doherty放大器演示显示,在ACLR为-50 dBc时,漏极效率高达51.2%,输出功率为36.0 dBm。这是3.5 ghz频段塑料封装GaN HEMT Doherty放大器的首次演示。
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引用次数: 7
System-level evaluation of 300GHz CMOS wireless transmitter using cubic mixer 采用立方混频器的300GHz CMOS无线发射机的系统级评价
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578131
T. Yoshida, Hiroshi Adachi, K. Takano, K. Katayama, S. Amakawa, M. Fujishima
A QAM-capable 300GHz CMOS transmitter operating above/max was recently reported. A key component is a cubic mixer, which is a tripler-based up-conversion mixer. This paper studies the SNR characteristics of cubic mixer theoretically for realizing high-speed communication. The condition of avoiding the interference between the RF signal and spur component is clarified.
最近报道了一种工作在/max以上的具有qam能力的300GHz CMOS发射机。一个关键部件是立方混合器,这是一个基于三倍频的上转换混合器。本文从理论上研究了实现高速通信的立方混频器的信噪比特性。阐明了避免射频信号与杂散分量干扰的条件。
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引用次数: 0
A low-power Ku-band transformer-based receiver using low-cost 180nm CMOS for IoT applications 基于低功耗ku波段变压器的接收器,采用低成本180nm CMOS,用于物联网应用
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578188
Hamed Alsuraisry, Shao-Cheng Hsiao, Yi-Hsien Lin, Yen-Hung Kuo, Jeng‐Han Tsai, Tian-Wei Huang
In this paper, a low-power transformer-based Ku-band receiver front-end is implemented in a 180-nm CMOS technology. The transformer-feedback gain-boosting technique and forward-body-bias technique are employed in three-stage (common gate + 2-stage common source) LNA to achieve a low-power design. A resistive ring mixer is chosen due to its advantage of zero-dc-power. The receiver demonstrates a 4.47-dB conversion gain at IF frequency of 100 MHz while consuming only 7.272 mW.
本文采用180nm CMOS技术实现了一种基于低功耗变压器的ku波段接收机前端。在三级(共门+两级共源)LNA中采用变压器反馈增益增强技术和正向体偏置技术,实现了低功耗设计。考虑到电阻环型混频器零直流功率的优点,选择了它。接收机在100 MHz中频下的转换增益为4.47 db,而功耗仅为7.272 mW。
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引用次数: 1
A 30-GHz band low-insertion loss and high-isolation SPDT switch IC in 120-nm SiGe HBT 120nm SiGe HBT中30ghz频段低插入损耗和高隔离SPDT开关IC
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578134
Cuilin Chen, Fenfen Tuo, Xiao Xu, T. Yoshimasu
A 30-GHz band Single-Pole Double-Throw (SPDT) switch IC is designed, fabricated and fully evaluated in 120-nm SiGe heterojunction bipolar transistor (HBT) process. The SPDT switch IC employs diode-connected HBTs and LC resonant circuits to improve the insertion loss and isolation. The fabricated SPDT switch IC has exhibited an insertion loss of 3.3 dB, an isolation of 21.8 dB and an input-referred 1-dB compression point (P1dB) of 16 dBm at 32 GHz.
采用120nm SiGe异质结双极晶体管(HBT)工艺设计、制作了一款30ghz频段单极双掷(SPDT)开关IC,并对其进行了全面评估。SPDT开关IC采用二极管连接的hbt和LC谐振电路,以改善插入损耗和隔离。该SPDT开关IC在32ghz时的插入损耗为3.3 dB,隔离度为21.8 dB,输入参考1-dB压缩点(P1dB)为16 dBm。
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引用次数: 3
Report of clinical results in intraoperative wireless recording 术中无线录音的临床效果报告
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578148
J. Chiao, D. Sucato, S. Sparagana, Jeffrey Mays, Patricia Rampy
In this work, clinical results of a wireless recording system for intraoperative neurophysiological monitoring during a spine correction surgery are reported. The wireless modules connecting directly to the subdermal needle electrodes transmit the waveforms detected in certain muscle areas to a computer via telemetry for real-time display, analysis and storage. Sufficient gain, bandwidth and digitalization preserve the integrity of the neural signal waveforms throughout the surgery. The feasibility of using wireless communication to quantitatively document the health of patient's neural system during spine manipulation is demonstrated. The waveforms are recorded in real time with high accuracy to assess the risks of injury. This demonstration validates the potentials for wireless signal acquisition in clinical settings and can enable more applications for precise diagnosis with benefits of elimination cluttered wires and electromagnetic interferences.
在这项工作中,报告了脊柱矫正手术中用于术中神经生理监测的无线记录系统的临床结果。直接连接到皮下针电极的无线模块将在某些肌肉区域检测到的波形通过遥测传输到计算机,用于实时显示、分析和存储。足够的增益、带宽和数字化在整个手术过程中保持神经信号波形的完整性。论证了利用无线通信定量记录脊柱操作过程中患者神经系统健康状况的可行性。波形以高精度实时记录,以评估受伤风险。该演示验证了无线信号采集在临床环境中的潜力,并可以使更多的应用程序用于精确诊断,消除杂乱的电线和电磁干扰。
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引用次数: 0
Design of 15–34 GHz low-power up-conversion ring mixer using 0.18 μm CMOS technology 采用0.18 μm CMOS技术设计15-34 GHz低功耗上转换环形混频器
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578172
Jeng‐Han Tsai, Wu-Hsuan Lin, Chuan‐Jung Huang
A up-conversion ring mixer is presented in this paper using 0.18 μm standard CMOS technology. By employing a weak inversion biasing technique, the ring mixer can operate at low dc consumption power and low LO drive power while maintaining reasonable conversion gain. The MMIC exhibits flat measured conversion gain of 2 ± 2 dB from 15 to 34 GHz via 3 dBm of LO drive. At low LO drive power mode of 0 dBm, the mixer has conversion gain of 1.5 ± 2.5 dB from 15 to 34 GHz. Due to the double-balanced ring topology, the mixer demonstrates high LO to RF isolation of 45 dB. The dc power consumption is only 2.749 mW from 1.2 V supply voltage.
本文采用0.18 μm标准CMOS技术,设计了一种上变频环形混频器。环形混频器采用弱反转偏置技术,可以在低直流功耗和低本振驱动功率下工作,同时保持合理的转换增益。通过3 dBm的LO驱动,MMIC在15至34 GHz范围内显示出2±2 dB的平坦测量转换增益。在低LO驱动功率模式为0 dBm时,混频器在15至34 GHz范围内的转换增益为1.5±2.5 dB。由于采用双平衡环形拓扑结构,混频器具有45 dB的高LO - RF隔离。在1.2 V供电电压下,直流功耗仅为2.749 mW。
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引用次数: 9
A 60-GHz CMOS ultra-low-power single-ended sub-harmonic mixer in 90-nm CMOS 一种60 ghz CMOS超低功耗单端次谐波混频器
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578179
Chih‐Han Chi, H. Chuang
In this paper, a 60-GHz ultra-low-power single-ended sub-harmonic down-conversion mixer with a merged structure fabricated in 90-nm CMOS is presented. The mixer core is merged directly with self-biased trans-impedance amplifier (TIA) to omit its traditional load stage and to enhance the conversion gain. By using weak-inversion bias technique in a source-driven topology, the mixer core only needs quiescent μA which can be stolen from TIA via the feedback resistors. The sub-harmonic mixers can work effectively for millimeter wave system by employing LO frequency that is only half of fundamental mixer. When operating with the optimal LO power of -3.5 dBm at 30 GHz, power consumption is 1mW. The measurement results of the mixer show 5.9 dB conversion gain, -60 dBm 2LO-to-RF leakage at 60 GHz. The calculated figure of merits (FOM) with the consideration of conversion gain and power consumption is the best among the reported mixers operating at V-band frequency in CMOS process.
本文提出了一种采用90纳米CMOS工艺制作的60 ghz超低功耗单端亚谐波下变频混频器。混频器核心直接与自偏置反阻抗放大器(TIA)合并,省去了传统的负载级,提高了转换增益。在源驱动拓扑中采用弱反转偏置技术,混频器核心只需要通过反馈电阻从TIA中窃取静态μA。亚谐波混频器可以有效地工作在毫米波系统中,其本振频率仅为基频混频器的一半。在30ghz工作时,最优本端功率为-3.5 dBm,功耗为1mW。该混频器的测量结果显示,转换增益为5.9 dB, 60 GHz时的2lo - rf泄漏为-60 dBm。考虑转换增益和功耗的计算优值(FOM)是目前报道的工作在v波段的CMOS工艺混频器中最好的。
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引用次数: 6
A 30-GHz band high-efficiency Class-J power amplifier IC in 120-nm SiGe HBT technology 一种采用120nm SiGe HBT技术的30ghz频段高效j类功率放大器集成电路
Pub Date : 2016-09-27 DOI: 10.1109/RFIT.2016.7578122
Cuilin Chen, Xin Yang, T. Yoshimasu
A 30-GHz band power amplifier (PA) IC is designed, fabricated and fully tested in 120-nm SiGe HBT process. The impedances of the output matching network are optimized at both the fundamental and second harmonic for a high power added efficiency (PAE). At a supply voltage of 1.4 V, the PA IC has exhibited a measured output P1dB of 10.8 dBm, a peak PAE of 32.4%, and a small-signal gain of 9.1 dB at 30 GHz.
采用120nm SiGe HBT工艺设计、制作了一款30ghz频段功率放大器(PA) IC,并对其进行了全面测试。为了获得较高的功率附加效率(PAE),对输出匹配网络的基次谐波和二次谐波阻抗进行了优化。在1.4 V的电源电压下,PA IC在30 GHz时的实测输出P1dB为10.8 dBm,峰值PAE为32.4%,小信号增益为9.1 dB。
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引用次数: 3
期刊
2016 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
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