Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477744
M. Klecha, R. Karge, R. O'Connor
This article consists of a collection of slides from the author's conference presentation on home entertainment multimedia communication systems. Some of the specific topics discussed include: a description of the Philips' PNX4103 system; requirements of next generation mobile phones; video engine and imaging processing features of the Philips' system; power management framework and specifications; PNX4103 silicon facilities; and new areas of technological development.
{"title":"Home entertainment-quality multimedia experience whilst on the move","authors":"M. Klecha, R. Karge, R. O'Connor","doi":"10.1109/HOTCHIPS.2006.7477744","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477744","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on home entertainment multimedia communication systems. Some of the specific topics discussed include: a description of the Philips' PNX4103 system; requirements of next generation mobile phones; video engine and imaging processing features of the Philips' system; power management framework and specifications; PNX4103 silicon facilities; and new areas of technological development.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128772726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477854
L. Bivolarski, B. Mitu, Anand Sheel, G. Stefan, Tom R. Thomson, D. Tomescu
This article consists of a collection of slides from the author's conference presentation onConnex's CA1024, a fully programmable system-on-chip HDTV media processing system. Some of the specific topics discussed include: the special features and specifications of CA1024; deployment and applications for it use; media processing capabilities; and performance evaluation for system processing.
{"title":"The CA1024: A fully programmable system-on-chip for costeffective HDTV media processing","authors":"L. Bivolarski, B. Mitu, Anand Sheel, G. Stefan, Tom R. Thomson, D. Tomescu","doi":"10.1109/HOTCHIPS.2006.7477854","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477854","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation onConnex's CA1024, a fully programmable system-on-chip HDTV media processing system. Some of the specific topics discussed include: the special features and specifications of CA1024; deployment and applications for it use; media processing capabilities; and performance evaluation for system processing.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116729989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477737
Yuan Lin
This article consists of a collection of slides from the author's conference presentation on multithreading programming. Some of the specific topics discussed include: identification of the major challenges, current practices, and languages/tools that support multithreaded programming technologies and applications.
{"title":"Multithreaded programming challenges, current practice, and languages/tools support","authors":"Yuan Lin","doi":"10.1109/HOTCHIPS.2006.7477737","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477737","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on multithreading programming. Some of the specific topics discussed include: identification of the major challenges, current practices, and languages/tools that support multithreaded programming technologies and applications.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"277 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116561127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477742
B. Pronk
This article consists of a collection of slides from the author's conference presentation on Philips' PNX8535 hybrid television processor. Some of the specific topics discussed include: the special features and processing capabilities of the PNX8535; applications supported; functions and use cases; device design; physical characteristics and key data; and software support and tools.
{"title":"PNX8535 hybrid television processor","authors":"B. Pronk","doi":"10.1109/HOTCHIPS.2006.7477742","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477742","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Philips' PNX8535 hybrid television processor. Some of the specific topics discussed include: the special features and processing capabilities of the PNX8535; applications supported; functions and use cases; device design; physical characteristics and key data; and software support and tools.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"32 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133077182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477857
Bob Brummer
This article consists of a collection of slides from the author's conference presentation on Microsoft products/services in the home market. Some of the specific topics discussed include: Microsoft products/technologies for the home market; home entertainment demand for these services; media center and the facilities to support these technologies.
{"title":"Microsoft microsoft in the living room","authors":"Bob Brummer","doi":"10.1109/HOTCHIPS.2006.7477857","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477857","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Microsoft products/services in the home market. Some of the specific topics discussed include: Microsoft products/technologies for the home market; home entertainment demand for these services; media center and the facilities to support these technologies.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132490712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477739
Bratin Saha
This article consists of a collection of slides from the author's conference presentation on software transactional memory (STM). Some of the specific topics discussed include: how to translate a language construct via STM, including runtime and compiler support; example of hybrid TM; and the outlook for the future development STM and the applications to be supported.
{"title":"Software transactional memory","authors":"Bratin Saha","doi":"10.1109/HOTCHIPS.2006.7477739","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477739","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on software transactional memory (STM). Some of the specific topics discussed include: how to translate a language construct via STM, including runtime and compiler support; example of hybrid TM; and the outlook for the future development STM and the applications to be supported.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131274516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477745
J. Rattner
This article consists of a collection of slides from the author's conference presentation on Philips' PNX8535 hybrid television processor. Some of the specific topics discussed include: the special features and processing capabilities of the PNX8535; applications supported; functions and use cases; device design; physical characteristics and key data; and software support and tools.
{"title":"Cool codes for hot chips: A quantitative basis for multi-core design","authors":"J. Rattner","doi":"10.1109/HOTCHIPS.2006.7477745","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477745","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Philips' PNX8535 hybrid television processor. Some of the specific topics discussed include: the special features and processing capabilities of the PNX8535; applications supported; functions and use cases; device design; physical characteristics and key data; and software support and tools.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128322007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477867
Edward C. Lin, Kai Yu, Rob A. Rutenbar, Tsuhan Chen
This article consists of a collection of slides from the author's conference presentation on Carnegie Mellon University's In Silico Vox speech recognition in silicon Project. Some of the specific topics discussed include: current speech recognition technologies; the special features and voice commuication capabilities of the In Silico Project; graphics engines; next generation speech recognition applications; how speech recognition works; acoustical capabilities; layered speech models; software design and implementation; pipelining facilities; an FPGA demonstration and experimental results.
{"title":"In silico vox: Towards speech recognition in silicon","authors":"Edward C. Lin, Kai Yu, Rob A. Rutenbar, Tsuhan Chen","doi":"10.1109/HOTCHIPS.2006.7477867","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477867","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Carnegie Mellon University's In Silico Vox speech recognition in silicon Project. Some of the specific topics discussed include: current speech recognition technologies; the special features and voice commuication capabilities of the In Silico Project; graphics engines; next generation speech recognition applications; how speech recognition works; acoustical capabilities; layered speech models; software design and implementation; pipelining facilities; an FPGA demonstration and experimental results.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130276792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477872
Balakrishnan Sundararaman
This article consists of a collection of slides from the author's conference presentation on Agere's APP300 Access Network Processor. Some of the specific topics discussed include: targeted markets for the processor line; data communications capabilities of the APP300 processor; the company approach to marketing the product line; APP300 block diagram; unified memory architecture; classifier and policing engines, features verus benefits; traffic management capabilities; schedulding hierarchies; and processing subsystems.
{"title":"The APP300 access network processor","authors":"Balakrishnan Sundararaman","doi":"10.1109/HOTCHIPS.2006.7477872","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477872","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on Agere's APP300 Access Network Processor. Some of the specific topics discussed include: targeted markets for the processor line; data communications capabilities of the APP300 processor; the company approach to marketing the product line; APP300 block diagram; unified memory architecture; classifier and policing engines, features verus benefits; traffic management capabilities; schedulding hierarchies; and processing subsystems.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130386611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-08-01DOI: 10.1109/HOTCHIPS.2006.7477740
C. Kozyrakis
This article consists of a collection of slides from the author's conference presentation on transactional memory (TM). Some of the specific topics discussed include: TM implementation that provide atomicity and isolatoin; basic TM implementation requirements; and implementation options that incorporate hardware TM, software TM and hybrid TM.
{"title":"Transactional memory implementation overview","authors":"C. Kozyrakis","doi":"10.1109/HOTCHIPS.2006.7477740","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2006.7477740","url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on transactional memory (TM). Some of the specific topics discussed include: TM implementation that provide atomicity and isolatoin; basic TM implementation requirements; and implementation options that incorporate hardware TM, software TM and hybrid TM.","PeriodicalId":302249,"journal":{"name":"2006 IEEE Hot Chips 18 Symposium (HCS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134339772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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