A large amount of file transfer systems in use today are designed to operate in wired networks. In the context of vehicular ad-hoc networks, these systems may behave improperly, due to the inherent characteristics of wireless networks and mobility of vehicles. This work proposes and implements a model for transferring files using basic client-server architecture, with focus on its operation in vehicular networks. We performed two different sets of experiments. The first experiment was performed to evaluate the performance of the system with different number of clients and servers while the purpose of second experiment was to validate the application behavior in an outdoor environment. The results show that the system is able to perform file transfers. It is concluded that the number of clients has a great impact on performance of the system.
{"title":"Extended Abstract: File Transfer in Vehicular Ad-Hoc Networks","authors":"K. Ullah, L. M. Santos, J. Michelin, E. Moreira","doi":"10.1109/SBESC.2013.16","DOIUrl":"https://doi.org/10.1109/SBESC.2013.16","url":null,"abstract":"A large amount of file transfer systems in use today are designed to operate in wired networks. In the context of vehicular ad-hoc networks, these systems may behave improperly, due to the inherent characteristics of wireless networks and mobility of vehicles. This work proposes and implements a model for transferring files using basic client-server architecture, with focus on its operation in vehicular networks. We performed two different sets of experiments. The first experiment was performed to evaluate the performance of the system with different number of clients and servers while the purpose of second experiment was to validate the application behavior in an outdoor environment. The results show that the system is able to perform file transfers. It is concluded that the number of clients has a great impact on performance of the system.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125557124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. R. Tonini, L. M. Fischer, J. Mattos, L. Brisolara
This paper evaluates the impacts of two most promising Android best practices regarding performance and energy consumption. In the experiments, the practices are applied to the code of an Android application and the code efficiency on different mobile devices is analyzed. Experimental results indicate that the use of the most appropriate for syntax and the avoiding getters/setters improves the Android codes efficiency.
{"title":"Analysis and Evaluation of the Android Best Practices Impact on the Efficiency of Mobile Applications","authors":"A. R. Tonini, L. M. Fischer, J. Mattos, L. Brisolara","doi":"10.1109/SBESC.2013.39","DOIUrl":"https://doi.org/10.1109/SBESC.2013.39","url":null,"abstract":"This paper evaluates the impacts of two most promising Android best practices regarding performance and energy consumption. In the experiments, the practices are applied to the code of an Android application and the code efficiency on different mobile devices is analyzed. Experimental results indicate that the use of the most appropriate for syntax and the avoiding getters/setters improves the Android codes efficiency.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134163292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Overheads due to context switching and external interrupt management are core characteristics for Real-Time Operating Systems (RTOS) since they play a central role in their performance and timeliness. In this paper we evaluate two core characteristics for the Real-Time Executive for Multiprocessor Systems (RTEMS), an operating system used for supporting space applications. Our assessment makes use of an external non-intrusive measurement tool based on a Field-Programmable Gate Array (FPGA). Measurement data are then transferred to an external computer and analyzed off-line. Experiments are carried out on a device that complies with the Brazilian space program recommendation.
{"title":"RTEMS Core Analysis for Space Applications","authors":"F. Nicodemos, O. Saotome, George Lima","doi":"10.1109/SBESC.2013.22","DOIUrl":"https://doi.org/10.1109/SBESC.2013.22","url":null,"abstract":"Overheads due to context switching and external interrupt management are core characteristics for Real-Time Operating Systems (RTOS) since they play a central role in their performance and timeliness. In this paper we evaluate two core characteristics for the Real-Time Executive for Multiprocessor Systems (RTEMS), an operating system used for supporting space applications. Our assessment makes use of an external non-intrusive measurement tool based on a Field-Programmable Gate Array (FPGA). Measurement data are then transferred to an external computer and analyzed off-line. Experiments are carried out on a device that complies with the Brazilian space program recommendation.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115055506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Marcos Oliveira da Cruz, M. Kreutz, S. R. F. D. Araujo
Routing algorithms are an important aspect to be considered in design and development of networks-on-chip for having a direct impact on the system performance. As part of its processing environment, a good routing algorithm aim is to provide a rational and optimized use of system resources and also prevent problems such as deadlock, livelock and starvation. The network-on-chip IPNoSys was designed to provide computing resources in order to allow the exploitation of packet-level parallelism. A good distribution of packets through the paths of the network is important to allow a good exploitation of its resources. This paper presents two routing algorithms for IPNoSys, namely, its original algorithm named Spiral complement and an alternative algorithm called Zig-zag. Tests were run in order to evaluate the combination of a routing algorithm with a specific number of virtual channels and packet-level parallelism exploitation.
{"title":"An Experimental Evaluation of Combination of Features on the IPNoSys","authors":"Marcos Oliveira da Cruz, M. Kreutz, S. R. F. D. Araujo","doi":"10.1109/SBESC.2013.21","DOIUrl":"https://doi.org/10.1109/SBESC.2013.21","url":null,"abstract":"Routing algorithms are an important aspect to be considered in design and development of networks-on-chip for having a direct impact on the system performance. As part of its processing environment, a good routing algorithm aim is to provide a rational and optimized use of system resources and also prevent problems such as deadlock, livelock and starvation. The network-on-chip IPNoSys was designed to provide computing resources in order to allow the exploitation of packet-level parallelism. A good distribution of packets through the paths of the network is important to allow a good exploitation of its resources. This paper presents two routing algorithms for IPNoSys, namely, its original algorithm named Spiral complement and an alternative algorithm called Zig-zag. Tests were run in order to evaluate the combination of a routing algorithm with a specific number of virtual channels and packet-level parallelism exploitation.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122526547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Andre Corsetti, A. Ambrosio, M. F. Mattiello-Francisco
Attitude and Orbit Control System (AOCS) is one subsystem of the Service Module of a satellite which mostly endures faults in space operations. The criticality and complex nature of the subsystem demands an extensive effort in its integration and controller`s software testing, mainly for validating the Fault Detection, Identification and Recovery (FDIR) requirements. This paper presents a proposal of characterization of the mechanisms of FDIR in order to apply model-based testing methodologies to address the AOCS robustness aspect. Two testing methodologies named CoFI and InRob using respectively Finite State Machine and Timed Input Output Automata formalisms to model critical services will be used, highlighting the robustness properties of the services. The testing methodologies support integration testing and acceptance phase of AOCS software. This paper aims in describing the selection of the two test methodologies and presenting the approach for modelling FDIR. Every satellite, except the very simple ones, have an inertial control system to control its attitude and/or orbit, being this system a subsystem of the Service Module of the satellite. The Service Module is a platform of services common to satellites, necessary to sustain its operations.
{"title":"Robustness Testing of Satellite Attitude and Orbit Control Systems: A Proposal Guided by Two Model Based Testing Methodologies","authors":"Andre Corsetti, A. Ambrosio, M. F. Mattiello-Francisco","doi":"10.1109/SBESC.2013.40","DOIUrl":"https://doi.org/10.1109/SBESC.2013.40","url":null,"abstract":"Attitude and Orbit Control System (AOCS) is one subsystem of the Service Module of a satellite which mostly endures faults in space operations. The criticality and complex nature of the subsystem demands an extensive effort in its integration and controller`s software testing, mainly for validating the Fault Detection, Identification and Recovery (FDIR) requirements. This paper presents a proposal of characterization of the mechanisms of FDIR in order to apply model-based testing methodologies to address the AOCS robustness aspect. Two testing methodologies named CoFI and InRob using respectively Finite State Machine and Timed Input Output Automata formalisms to model critical services will be used, highlighting the robustness properties of the services. The testing methodologies support integration testing and acceptance phase of AOCS software. This paper aims in describing the selection of the two test methodologies and presenting the approach for modelling FDIR. Every satellite, except the very simple ones, have an inertial control system to control its attitude and/or orbit, being this system a subsystem of the Service Module of the satellite. The Service Module is a platform of services common to satellites, necessary to sustain its operations.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126976726","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The correct functioning of real-time systems depends not only on the logically correct response, but also the time when it is given. This type of application is increasingly present today and the processing demand is such that complex multi-core processors are needed. The development of multiprocessor is ahead of the techniques of analysis of such systems and it is therefore necessary further research to promote reliability and to reduce over-specified systems. In modern processors, task preemption introduces indirect cost related to the cache memory. A preemption evicts a large amount of memory blocks from the cache memory during the preempting time interval. In this paper we present a partitioning heuristic that includes the cache related preemption delay assumptions in a multiprocessor system with cache memory focusing in partitioned fixed priority preemptive scheduling.
{"title":"Cache-Aware Task Partitioning for Multicore Real-Time Systems","authors":"R. A. Starke, R. S. Oliveira","doi":"10.1109/SBESC.2013.13","DOIUrl":"https://doi.org/10.1109/SBESC.2013.13","url":null,"abstract":"The correct functioning of real-time systems depends not only on the logically correct response, but also the time when it is given. This type of application is increasingly present today and the processing demand is such that complex multi-core processors are needed. The development of multiprocessor is ahead of the techniques of analysis of such systems and it is therefore necessary further research to promote reliability and to reduce over-specified systems. In modern processors, task preemption introduces indirect cost related to the cache memory. A preemption evicts a large amount of memory blocks from the cache memory during the preempting time interval. In this paper we present a partitioning heuristic that includes the cache related preemption delay assumptions in a multiprocessor system with cache memory focusing in partitioned fixed priority preemptive scheduling.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131834262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nowadays, embedded systems have a huge amount of computational power and consequently, high complexity. It is quite usual to find different applications being executed in embedded systems. Embedded system design demands for method and tools that allow the simulation and verification in an efficient and practical way. This paper proposes the development and evaluation of a solution for embedded modeling and simulation of embedded systems in a distributed way by the integration of Ptolemy II and the High Level Architecture (HLA), in order to create an environment with high-performance execution of large-scale models. Experimental results demonstrated that the use of a non distributed simulation for some situations can be infeasible. It was demonstrated that a speedup of factor 4 was acquired when a model with 4,000 thousands actors were distributed in 8 different machines. It also presented a model of execution of each CPU core during the simulation.
{"title":"Allowing Large-Scale Systems Evaluation with Ptolemy through Distributed Simulation","authors":"A. Brito, Angelo V. Negreiros","doi":"10.1109/SBESC.2013.19","DOIUrl":"https://doi.org/10.1109/SBESC.2013.19","url":null,"abstract":"Nowadays, embedded systems have a huge amount of computational power and consequently, high complexity. It is quite usual to find different applications being executed in embedded systems. Embedded system design demands for method and tools that allow the simulation and verification in an efficient and practical way. This paper proposes the development and evaluation of a solution for embedded modeling and simulation of embedded systems in a distributed way by the integration of Ptolemy II and the High Level Architecture (HLA), in order to create an environment with high-performance execution of large-scale models. Experimental results demonstrated that the use of a non distributed simulation for some situations can be infeasible. It was demonstrated that a speedup of factor 4 was acquired when a model with 4,000 thousands actors were distributed in 8 different machines. It also presented a model of execution of each CPU core during the simulation.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"147 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131928956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yuri Maximilian Rottner Dirickson, L. Vismari, J. Camargo
Several countries have been investing in upgrading their air traffic management systems as a way to cope with the growing demand for this mode of transport. Among the major modernization projects are the NextGen (USA) and SESAR(Europe), which one of the main objectives is to increase the efficiency of the services provided by air traffic controllers(ATCo) by automating part of their tasks. However, one must ensure that automated tasks do not impact negatively on the air traffic performance and safety. Thus, this paper presents a study of ATCo operational requirements elicitation to be considered in the process of automation. Due to aerodrome regions present the greatest historical number of accidents compared to other flight regions, the aerodrome control service (TWR) was adopted as acase study. The Enhanced Function Flow Block Diagram was the method adopted for the functional analysis of this study.
{"title":"Elicitation of Operational Requirements in ATC Activities Automation Process: The TWR Case","authors":"Yuri Maximilian Rottner Dirickson, L. Vismari, J. Camargo","doi":"10.1109/SBESC.2013.14","DOIUrl":"https://doi.org/10.1109/SBESC.2013.14","url":null,"abstract":"Several countries have been investing in upgrading their air traffic management systems as a way to cope with the growing demand for this mode of transport. Among the major modernization projects are the NextGen (USA) and SESAR(Europe), which one of the main objectives is to increase the efficiency of the services provided by air traffic controllers(ATCo) by automating part of their tasks. However, one must ensure that automated tasks do not impact negatively on the air traffic performance and safety. Thus, this paper presents a study of ATCo operational requirements elicitation to be considered in the process of automation. Due to aerodrome regions present the greatest historical number of accidents compared to other flight regions, the aerodrome control service (TWR) was adopted as acase study. The Enhanced Function Flow Block Diagram was the method adopted for the functional analysis of this study.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132235389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Design and implementation of autonomous vehicles is a very complex task. One important step on building autonomous navigation systems is to apply it first on simulations. We present here a vision-based autonomous navigation approach in unstructured terrains for a car-like vehicle. We modeled the vehicle and the scenario in a realistic physics simulation with the same constraints of a real car and uneven terrain with vegetation. We use stereo vision to build a navigation cost map grid based on a probabilistic occupancy space represented by an OctoMap. The localization is based on GPS and compass integrated with wheel odometry. A global planning is performed and continuously updated with the information added to the cost map while the vehicle moves. In our simulations we could autonomously navigate the vehicle through obstructed spaces avoiding collisions and generating feasible trajectories. This system will be validated in the near future using our autonomous vehicle testing platform - CaRINA.
{"title":"Simulation of an Autonomous Vehicle with a Vision-Based Navigation System in Unstructured Terrains Using OctoMap","authors":"R. L. Klaser, F. Osório, D. Wolf","doi":"10.1109/SBESC.2013.46","DOIUrl":"https://doi.org/10.1109/SBESC.2013.46","url":null,"abstract":"Design and implementation of autonomous vehicles is a very complex task. One important step on building autonomous navigation systems is to apply it first on simulations. We present here a vision-based autonomous navigation approach in unstructured terrains for a car-like vehicle. We modeled the vehicle and the scenario in a realistic physics simulation with the same constraints of a real car and uneven terrain with vegetation. We use stereo vision to build a navigation cost map grid based on a probabilistic occupancy space represented by an OctoMap. The localization is based on GPS and compass integrated with wheel odometry. A global planning is performed and continuously updated with the information added to the cost map while the vehicle moves. In our simulations we could autonomously navigate the vehicle through obstructed spaces avoiding collisions and generating feasible trajectories. This system will be validated in the near future using our autonomous vehicle testing platform - CaRINA.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114538681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Eder Freire, L. Schnitman, Wagner Oliveira, A. Duarte
The design of specialized hardware for Network Intrusion Detection has been subject of intense research over the last decade due to its considerably higher performance compared to software implementations. In this context, one of the limiting factors is the finite amount of memory resources versus the increasing number of threat patterns to be analyzed. This paper proposes an architecture based on the Huffman algorithm for encoding, storage and decoding of these patterns in order to optimize such resources. We have made tests with simulation and synthesis in FPGA of rule subsets of the Snort software, and analysis indicate a saving of up to 73 percent of the embedded memory resources of the chip.
{"title":"Evaluation of the Huffman Encoding for Memory Optimization on Hardware Network Intrusion Detection","authors":"Eder Freire, L. Schnitman, Wagner Oliveira, A. Duarte","doi":"10.1109/SBESC.2013.38","DOIUrl":"https://doi.org/10.1109/SBESC.2013.38","url":null,"abstract":"The design of specialized hardware for Network Intrusion Detection has been subject of intense research over the last decade due to its considerably higher performance compared to software implementations. In this context, one of the limiting factors is the finite amount of memory resources versus the increasing number of threat patterns to be analyzed. This paper proposes an architecture based on the Huffman algorithm for encoding, storage and decoding of these patterns in order to optimize such resources. We have made tests with simulation and synthesis in FPGA of rule subsets of the Snort software, and analysis indicate a saving of up to 73 percent of the embedded memory resources of the chip.","PeriodicalId":359419,"journal":{"name":"2013 III Brazilian Symposium on Computing Systems Engineering","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114857495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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