Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342708
Wael M. Elseaidy, R. Cleaveland, J. Baugh
Describes the formal verification of the timing properties of the design of an intelligent structural control system using the Concurrency Workbench, an automatic verification tool for finite-state processes. The high-level design of the system is first given in Modechart, a graphical specification language for real-time systems, and then translated into a temporal process algebra supported by the Workbench. The facilities provided by this tool are then used to analyze the system and ultimately show it to be correct.<>
{"title":"Verifying an intelligent structural control system: a case study","authors":"Wael M. Elseaidy, R. Cleaveland, J. Baugh","doi":"10.1109/REAL.1994.342708","DOIUrl":"https://doi.org/10.1109/REAL.1994.342708","url":null,"abstract":"Describes the formal verification of the timing properties of the design of an intelligent structural control system using the Concurrency Workbench, an automatic verification tool for finite-state processes. The high-level design of the system is first given in Modechart, a graphical specification language for real-time systems, and then translated into a temporal process algebra supported by the Workbench. The facilities provided by this tool are then used to analyze the system and ultimately show it to be correct.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121855227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342723
J. Corbett
Proposes a model for real-time Ada tasking programs that naturally represents such features as processor sharing, priority preemption, and process suspension. We describe a semi-decision procedure for proving properties of the model that uses linear programming to determine the feasibility of paths explored during a state-space search of the program. We demonstrate the feasibility of this procedure by applying a prototype analyzer to several examples.<>
{"title":"Modeling and analysis of real-time Ada tasking programs","authors":"J. Corbett","doi":"10.1109/REAL.1994.342723","DOIUrl":"https://doi.org/10.1109/REAL.1994.342723","url":null,"abstract":"Proposes a model for real-time Ada tasking programs that naturally represents such features as processor sharing, priority preemption, and process suspension. We describe a semi-decision procedure for proving properties of the model that uses linear programming to determine the feasibility of paths explored during a state-space search of the program. We demonstrate the feasibility of this procedure by applying a prototype analyzer to several examples.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128969091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342732
Azer Bestavros, Spyridon Braoudakis
Various concurrency control algorithms differ in the time when conflicts are detected, and in the way they are resolved. Pessimistic (PCC) protocols detect conflicts as soon as they occur and resolve them using blocking. Optimistic (OCC) protocols detect conflicts at transaction commit time and resolve them using rollbacks. For real-time databases, blockages and rollbacks are hazards that increase the likelihood of transactions missing their deadlines. We propose a Speculative Concurrency Control (SCC) technique that minimizes the impact of block ages and rollbacks. SCC relies on added system resources to speculate on potential serialization orders, ensuring that if such serialization orders materialize, the hazards of blockages and roll-back are minimized. We present a number of SCC-based algorithms that differ in the level of speculation they introduce, and the amount of System resources (mainly memory) they require. We show the performance gains (in terms of number of satisfied timing constraints) to be expected when a representative SCC algorithm (SCC-2S) is adopted.<>
{"title":"Timeliness via speculation for real-time databases","authors":"Azer Bestavros, Spyridon Braoudakis","doi":"10.1109/REAL.1994.342732","DOIUrl":"https://doi.org/10.1109/REAL.1994.342732","url":null,"abstract":"Various concurrency control algorithms differ in the time when conflicts are detected, and in the way they are resolved. Pessimistic (PCC) protocols detect conflicts as soon as they occur and resolve them using blocking. Optimistic (OCC) protocols detect conflicts at transaction commit time and resolve them using rollbacks. For real-time databases, blockages and rollbacks are hazards that increase the likelihood of transactions missing their deadlines. We propose a Speculative Concurrency Control (SCC) technique that minimizes the impact of block ages and rollbacks. SCC relies on added system resources to speculate on potential serialization orders, ensuring that if such serialization orders materialize, the hazards of blockages and roll-back are minimized. We present a number of SCC-based algorithms that differ in the level of speculation they introduce, and the amount of System resources (mainly memory) they require. We show the performance gains (in terms of number of satisfied timing constraints) to be expected when a representative SCC algorithm (SCC-2S) is adopted.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124562138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342712
L. Moser, P. Melliar-Smith
For fault-tolerant real-time distributed systems, the probability that a message is not delivered within its real-time deadline must be small enough that it does not adversely affect system reliability. The authors investigate the delivery of messages for the totem protocol, a reliable ordered broadcast protocol that the authors have developed for fault-tolerant distributed systems with physical broadcasts over a local-area network. The total order on broadcast messages, constructed by the totem protocol, supports the maintenance of consistency of replicated information as, for example, in a replicated database. The authors present a methodology for determining the probability of satisfying bounds on the latency from message origination to ordered delivery in the presence of communication faults.<>
{"title":"Probabilistic bounds on message delivery for the totem single-ring protocol","authors":"L. Moser, P. Melliar-Smith","doi":"10.1109/REAL.1994.342712","DOIUrl":"https://doi.org/10.1109/REAL.1994.342712","url":null,"abstract":"For fault-tolerant real-time distributed systems, the probability that a message is not delivered within its real-time deadline must be small enough that it does not adversely affect system reliability. The authors investigate the delivery of messages for the totem protocol, a reliable ordered broadcast protocol that the authors have developed for fault-tolerant distributed systems with physical broadcasts over a local-area network. The total order on broadcast messages, constructed by the totem protocol, supports the maintenance of consistency of replicated information as, for example, in a replicated database. The authors present a methodology for determining the probability of satisfying bounds on the latency from message origination to ordered delivery in the presence of communication faults.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133806127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342730
D. Picker, R. Fellman
Real-time multiprocessor applications are typically characterized by hard deadlines which severely constrain interprocessor communications. Contention for communication resources and the use of first-in-first-out (FIFO) buffering can introduce priority inversion, resulting in missed deadlines. This paper investigates the scaling and performance of a novel 1.2 /spl mu/m CMOS Priority Packet Queue (PPQ) design. Its unique segmented architecture effectively exploits the packetized nature of traffic within most real-time networks and achieves 96% the speed of a high-speed packet FIFO. The PPQ can either perform priority inheritance or overwrite lower priority packets during queue overflow, and robustly handles asynchronous read and write clocks of widely disparate frequencies. Comparison results show that the PPQ offers over twice the speed of the conventional design, and promises even greater relative speed improvement for larger designs.<>
{"title":"Scaling and performance of a priority packet queue for real-time applications","authors":"D. Picker, R. Fellman","doi":"10.1109/REAL.1994.342730","DOIUrl":"https://doi.org/10.1109/REAL.1994.342730","url":null,"abstract":"Real-time multiprocessor applications are typically characterized by hard deadlines which severely constrain interprocessor communications. Contention for communication resources and the use of first-in-first-out (FIFO) buffering can introduce priority inversion, resulting in missed deadlines. This paper investigates the scaling and performance of a novel 1.2 /spl mu/m CMOS Priority Packet Queue (PPQ) design. Its unique segmented architecture effectively exploits the packetized nature of traffic within most real-time networks and achieves 96% the speed of a high-speed packet FIFO. The PPQ can either perform priority inheritance or overwrite lower priority packets during queue overflow, and robustly handles asynchronous read and write clocks of widely disparate frequencies. Comparison results show that the PPQ offers over twice the speed of the conventional design, and promises even greater relative speed improvement for larger designs.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"210 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114337981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342725
M. Younis, T. Marlowe, A. Stoyen
Deterministic worst-case execution to satisfy hard real-time constraints, and speculative execution with rollback to improve average-case throughput, appear to lie on opposite ends of a spectrum of performance requirements and strategies. Nonetheless, we show there are situations in which speculative execution can probably improve the performance of a hard real-time system, either by improving average performance while not affecting the worst case, or by actually decreasing worst-case execution time. We also show how related strategies for partial or total precomputation can lead to improved performance. Finally, we discuss possible compiler transformations to detect chances of profitable speculative execution.<>
{"title":"Compiler transformations for speculative execution in a real-time system","authors":"M. Younis, T. Marlowe, A. Stoyen","doi":"10.1109/REAL.1994.342725","DOIUrl":"https://doi.org/10.1109/REAL.1994.342725","url":null,"abstract":"Deterministic worst-case execution to satisfy hard real-time constraints, and speculative execution with rollback to improve average-case throughput, appear to lie on opposite ends of a spectrum of performance requirements and strategies. Nonetheless, we show there are situations in which speculative execution can probably improve the performance of a hard real-time system, either by improving average performance while not affecting the worst case, or by actually decreasing worst-case execution time. We also show how related strategies for partial or total precomputation can lead to improved performance. Finally, we discuss possible compiler transformations to detect chances of profitable speculative execution.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129159821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342729
K. Toda, K. Nishida, E. Takahashi, Y. Yamaguchi
The design and performance of a priority forwarding router chip are presented. The chip has four input and four output ports, employs clock-synchronized packet switching, and facilitates 32-bit priority arbitration by means of a priority forwarding scheme that prevents priority inversion and enables accurate priority control within a network. Packets are of a fixed size, each having three 38-bit segments. Each input port has an 8-packet priority queue that enables virtual cut-through switching and pipelined-simultaneous output to at most three different output ports. The chip has two 25-ns pipeline stages and its data transmission rate is 190 MByte/s per port. Clock level simulation shows that the chip can attain high throughput, 9 GByte/s and 34 GByte/s at 64-node and 256-node omega networks with random communication, and excellent real-time performance. Very small laxities are required for in-time delivery of all input packets where the packets exhibit a degree of deadline distribution.<>
{"title":"A priority forwarding router chip for real-time interconnection networks","authors":"K. Toda, K. Nishida, E. Takahashi, Y. Yamaguchi","doi":"10.1109/REAL.1994.342729","DOIUrl":"https://doi.org/10.1109/REAL.1994.342729","url":null,"abstract":"The design and performance of a priority forwarding router chip are presented. The chip has four input and four output ports, employs clock-synchronized packet switching, and facilitates 32-bit priority arbitration by means of a priority forwarding scheme that prevents priority inversion and enables accurate priority control within a network. Packets are of a fixed size, each having three 38-bit segments. Each input port has an 8-packet priority queue that enables virtual cut-through switching and pipelined-simultaneous output to at most three different output ports. The chip has two 25-ns pipeline stages and its data transmission rate is 190 MByte/s per port. Clock level simulation shows that the chip can attain high throughput, 9 GByte/s and 34 GByte/s at 64-node and 256-node omega networks with random communication, and excellent real-time performance. Very small laxities are required for in-time delivery of all input packets where the packets exhibit a degree of deadline distribution.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"518 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123108561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342714
M. Natale, J. Stankovic
Many distributed real-time applications are structured as a set of processes communicating through synchronous channels. Unfortunately, process interactions and especially synchronous communications make the problem of predictably scheduling the tasks more complex. In distributed systems the local and remote tasks as well as the messages over the network must be properly scheduled and synchronized to meet the deadlines of the application. To find such a, schedule is not an easy task, in fact, this problem is NP complete even if one has complete knowledge of the future arrival times for all the processes in the system. The objective of this paper is to develop a scheme that allows for the dynamic scheduling and guaranteeing of distributed processes communicating via synchronous primitives. For efficiency reasons a combination of off-line and on-line scheduling is performed. Precedence and communication constraints are converted off-line into pseudo-deadlines for each task, enabling efficient on-line processing. The on-line scheduling operates in parallel at the sites involved in the distributed computation, further obtaining efficiency. The overall end-to-end scheduling includes the joint and coordinated scheduling of tasks and messages in a reflective memory distributed architecture.<>
{"title":"Dynamic end-to-end guarantees in distributed real time systems","authors":"M. Natale, J. Stankovic","doi":"10.1109/REAL.1994.342714","DOIUrl":"https://doi.org/10.1109/REAL.1994.342714","url":null,"abstract":"Many distributed real-time applications are structured as a set of processes communicating through synchronous channels. Unfortunately, process interactions and especially synchronous communications make the problem of predictably scheduling the tasks more complex. In distributed systems the local and remote tasks as well as the messages over the network must be properly scheduled and synchronized to meet the deadlines of the application. To find such a, schedule is not an easy task, in fact, this problem is NP complete even if one has complete knowledge of the future arrival times for all the processes in the system. The objective of this paper is to develop a scheme that allows for the dynamic scheduling and guaranteeing of distributed processes communicating via synchronous primitives. For efficiency reasons a combination of off-line and on-line scheduling is performed. Precedence and communication constraints are converted off-line into pseudo-deadlines for each task, enabling efficient on-line processing. The on-line scheduling operates in parallel at the sites involved in the distributed computation, further obtaining efficiency. The overall end-to-end scheduling includes the joint and coordinated scheduling of tasks and messages in a reflective memory distributed architecture.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"167 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114258845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342731
Jiandong Huang, D. Du
The uniqueness of continuous multimedia database applications lies in the fact that they require system support steady flow of media access data. In this paper we address the problem of system resource management for such applications. We introduce a session-based scheduling paradigm that, unlike traditional task scheduling, enables scheduling of all processing entities (threads, I/O processes, and buffers) across multiple system resources for guarantee of steady mediaflow. Under this paradigm, we develop an approach to on-line generation of session resource requirements based on resource allocation tradeoffs. Further, we develop a multidimensional "bin-packing" approach to allocation and scheduling of multiple resources for concurrent sessions. The goal is to minimize resource overheads and maximize the number of concurrent sessions while meeting session timing constraints and resource capacity constraints.<>
{"title":"Resource management for continuous multimedia database applications","authors":"Jiandong Huang, D. Du","doi":"10.1109/REAL.1994.342731","DOIUrl":"https://doi.org/10.1109/REAL.1994.342731","url":null,"abstract":"The uniqueness of continuous multimedia database applications lies in the fact that they require system support steady flow of media access data. In this paper we address the problem of system resource management for such applications. We introduce a session-based scheduling paradigm that, unlike traditional task scheduling, enables scheduling of all processing entities (threads, I/O processes, and buffers) across multiple system resources for guarantee of steady mediaflow. Under this paradigm, we develop an approach to on-line generation of session resource requirements based on resource allocation tradeoffs. Further, we develop a multidimensional \"bin-packing\" approach to allocation and scheduling of multiple resources for concurrent sessions. The goal is to minimize resource overheads and maximize the number of concurrent sessions while meeting session timing constraints and resource capacity constraints.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124742197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-12-07DOI: 10.1109/REAL.1994.342713
Sanjoy Baruah, J. Haritsa, Nitin Sharma
The problem of uniprocessor scheduling under conditions of overload is investigated. The system objective is to maximize the number of tasks that complete by their deadlines. For this performance metric it is shown that, in general, any on-line algorithm may perform arbitrarily poorly as compared to a clairvoyant scheduler. Restricted instances of the general problem for which on-line schedulers ran provide a guaranteed level of performance are identified, and on-line algorithms presented for these special cases.<>
{"title":"On-line scheduling to maximize task completions","authors":"Sanjoy Baruah, J. Haritsa, Nitin Sharma","doi":"10.1109/REAL.1994.342713","DOIUrl":"https://doi.org/10.1109/REAL.1994.342713","url":null,"abstract":"The problem of uniprocessor scheduling under conditions of overload is investigated. The system objective is to maximize the number of tasks that complete by their deadlines. For this performance metric it is shown that, in general, any on-line algorithm may perform arbitrarily poorly as compared to a clairvoyant scheduler. Restricted instances of the general problem for which on-line schedulers ran provide a guaranteed level of performance are identified, and on-line algorithms presented for these special cases.<<ETX>>","PeriodicalId":374952,"journal":{"name":"1994 Proceedings Real-Time Systems Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125808324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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