Motivated by airborne intruder detection and defence systems, we examine sparse random graphs with linear number of connections. We establish theoretical bounds on domination number and our analysis gives a partial solution of the problem posed in [6]. Our computer simulations are based on the integer linear programming optimization method. The experimental results verify our analytical estimations and suggest a direction for the future research.
{"title":"Estimation of the domination number in sparse random graphs and applications","authors":"Martin Nehéz, Dusan Bernát, M. Lelovský","doi":"10.1145/3123779.3123801","DOIUrl":"https://doi.org/10.1145/3123779.3123801","url":null,"abstract":"Motivated by airborne intruder detection and defence systems, we examine sparse random graphs with linear number of connections. We establish theoretical bounds on domination number and our analysis gives a partial solution of the problem posed in [6]. Our computer simulations are based on the integer linear programming optimization method. The experimental results verify our analytical estimations and suggest a direction for the future research.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121455266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper presents a realtime, collision-free motion coordination and navigation system for an Unmanned Aerial Vehicle (UAV) fleet. The proposed system uses geographical locations of the UAVs and of the successfully detected, static and moving obstacles to predict and avoid: (1) UAV-to-UAV collisions, (2) UAV-to-static-obstacle collisions, and (3) UAV-to-moving-obstacle collisions. Our collision prediction approach leverages efficient runtime monitoring and Complex Event Processing (CEP) to make timely predictions. A distinctive feature of the proposed system is its ability to foresee a risk of a collision in realtime and proactively find best ways to avoid the predicted collisions in order to ensure safety of the entire fleet. We also present a simulation-based implementation of the proposed system along with an experimental evaluation involving a series of experiments. The results demonstrate that the proposed system successfully predicts and avoids all three kinds of collisions in realtime. Moreover, it generates efficient UAV routes, has an excellent runtime performance, efficiently scales to large-sized problem instances involving dozens of UAVs and obstacles, and is suitable for some densely populated, cluttered flying zones.
{"title":"Towards a realtime, collision-free motion coordination and navigation system for a UAV fleet","authors":"A. Ashraf, Amin Majd, E. Troubitsyna","doi":"10.1145/3123779.3123805","DOIUrl":"https://doi.org/10.1145/3123779.3123805","url":null,"abstract":"This paper presents a realtime, collision-free motion coordination and navigation system for an Unmanned Aerial Vehicle (UAV) fleet. The proposed system uses geographical locations of the UAVs and of the successfully detected, static and moving obstacles to predict and avoid: (1) UAV-to-UAV collisions, (2) UAV-to-static-obstacle collisions, and (3) UAV-to-moving-obstacle collisions. Our collision prediction approach leverages efficient runtime monitoring and Complex Event Processing (CEP) to make timely predictions. A distinctive feature of the proposed system is its ability to foresee a risk of a collision in realtime and proactively find best ways to avoid the predicted collisions in order to ensure safety of the entire fleet. We also present a simulation-based implementation of the proposed system along with an experimental evaluation involving a series of experiments. The results demonstrate that the proposed system successfully predicts and avoids all three kinds of collisions in realtime. Moreover, it generates efficient UAV routes, has an excellent runtime performance, efficiently scales to large-sized problem instances involving dozens of UAVs and obstacles, and is suitable for some densely populated, cluttered flying zones.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134618433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Amin Majd, M. Daneshtalab, E. Troubitsyna, Golnaz Sahebi
A selection of the optimal placements of the access points and sensors constitutes one of the fundamental challenges in the monitoring of spatial phenomena in wireless sensor networks (WSNs). Access points should occupy the best locations in order to obtain a sufficient degree of coverage with a low communication cost. Finding an optimal placement is an NP-hard problem that is further complicated by the real-world conditions such as obstacles, radiation interference etc. In this paper, we propose a compound method to select the best near-optimal placement of SMAPs with the goal to maximize the monitoring coverage and to minimize the communication cost. Our approach combines a parallel implementation of the Imperialist Competitive Algorithm (ICA) with a greedy method. The benchmarking of the proposed approach demonstrates its clear advantages in solving and optimizing the placement problem.
{"title":"Optimal smart mobile access point placement for maximal coverage and minimal communication","authors":"Amin Majd, M. Daneshtalab, E. Troubitsyna, Golnaz Sahebi","doi":"10.1145/3123779.3123799","DOIUrl":"https://doi.org/10.1145/3123779.3123799","url":null,"abstract":"A selection of the optimal placements of the access points and sensors constitutes one of the fundamental challenges in the monitoring of spatial phenomena in wireless sensor networks (WSNs). Access points should occupy the best locations in order to obtain a sufficient degree of coverage with a low communication cost. Finding an optimal placement is an NP-hard problem that is further complicated by the real-world conditions such as obstacles, radiation interference etc. In this paper, we propose a compound method to select the best near-optimal placement of SMAPs with the goal to maximize the monitoring coverage and to minimize the communication cost. Our approach combines a parallel implementation of the Imperialist Competitive Algorithm (ICA) with a greedy method. The benchmarking of the proposed approach demonstrates its clear advantages in solving and optimizing the placement problem.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114829314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This volume contains the proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems (ECBS 2017), organized by the University of Cyprus in cooperation with ACM SIGAPP, SIGOPS, and SIGSOFT. ECBS 2017 is a continuation of the Eastern European Regional Conference on the Engineering of Computer Based Systems (ECBS-EERC). It was established in 2008 as an Eastern/Central European offspring of the Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems, which itself was discontinued in 2013. This realization of ECBS makes the conference step out organizationally from the Central European region to Cyprus as a convenient and attractive location for both European and many non-European authors.
{"title":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","authors":"O. Ryšavý, V. Vranić, G. A. Papadopoulos","doi":"10.1145/3123779","DOIUrl":"https://doi.org/10.1145/3123779","url":null,"abstract":"This volume contains the proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems (ECBS 2017), organized by the University of Cyprus in cooperation with ACM SIGAPP, SIGOPS, and SIGSOFT. \u0000 \u0000ECBS 2017 is a continuation of the Eastern European Regional Conference on the Engineering of Computer Based Systems (ECBS-EERC). It was established in 2008 as an Eastern/Central European offspring of the Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems, which itself was discontinued in 2013. This realization of ECBS makes the conference step out organizationally from the Central European region to Cyprus as a convenient and attractive location for both European and many non-European authors.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130925375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Situational Method Engineering (SME) approaches help construct bespoke software development processes according to the specifications of the project at hand, but they are time-consuming and costly. A Software Process Line (SPrL) tackles this problem by allowing software processes to be constructed for specific project situations through reusing core process assets. Model-Driven Development (MDD) has been used for automating SPrL Engineering (SPrLE); however, existing model-driven SPrLE methods are deficient as to their coverage of key MDD features. We propose a novel model-driven SPrLE approach that aims to address these shortcomings; it can be regarded as a framework that specifies the model chain and the core model-driven SPrLE activities that should be applied. The approach is yet to be refined and evolved through application to a real-world project; however, a preliminary criteria-based evaluation has shown that the shortcomings of existing SPrLE methods have indeed been addressed by the proposed approach.
{"title":"Towards a generic framework for model-driven engineering of software process lines","authors":"Halimeh Agh, Raman Ramsin","doi":"10.1145/3123779.3123810","DOIUrl":"https://doi.org/10.1145/3123779.3123810","url":null,"abstract":"Situational Method Engineering (SME) approaches help construct bespoke software development processes according to the specifications of the project at hand, but they are time-consuming and costly. A Software Process Line (SPrL) tackles this problem by allowing software processes to be constructed for specific project situations through reusing core process assets. Model-Driven Development (MDD) has been used for automating SPrL Engineering (SPrLE); however, existing model-driven SPrLE methods are deficient as to their coverage of key MDD features. We propose a novel model-driven SPrLE approach that aims to address these shortcomings; it can be regarded as a framework that specifies the model chain and the core model-driven SPrLE activities that should be applied. The approach is yet to be refined and evolved through application to a real-world project; however, a preliminary criteria-based evaluation has shown that the shortcomings of existing SPrLE methods have indeed been addressed by the proposed approach.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125919049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Luis Rizo Domínguez, R. Mahapatra, I. Padilla-Cantoya
The congestion control avoidance of TCP (Transport Control Protocol), the most used protocol in Internet, is based on critical RTT (Round Trip Time) forecasting process. Currently, several delay predictors are proposed in literature; but practical implementations have not been yet evaluated. In this paper, a comparison of on-line predictors is presented. We used Altera Cyclone IV GX FPGA (Field-Programmable Gate Array) for evaluation; the criteria included performance time, power, and number of logic elements. For comparison purposes, we considered the most used predictor as reference and concluded which one is more suitable for implementation in next generation devices.
TCP (Transport control Protocol，传输控制协议)是Internet上最常用的协议，它的拥塞控制规避是基于临界往返时间(RTT)预测过程的。目前，文献中提出了几种延迟预测器;但实际应用尚未得到评估。本文对在线预测器进行了比较。我们使用Altera Cyclone IV GX FPGA(现场可编程门阵列)进行评估;这些标准包括性能、时间、功率和逻辑元件的数量。为了比较，我们考虑了最常用的预测器作为参考，并得出哪一个更适合在下一代设备中实现。
{"title":"Using FPGA implementations for evaluation of internet retransmission-time-out predictors","authors":"Luis Rizo Domínguez, R. Mahapatra, I. Padilla-Cantoya","doi":"10.1145/3123779.3123798","DOIUrl":"https://doi.org/10.1145/3123779.3123798","url":null,"abstract":"The congestion control avoidance of TCP (Transport Control Protocol), the most used protocol in Internet, is based on critical RTT (Round Trip Time) forecasting process. Currently, several delay predictors are proposed in literature; but practical implementations have not been yet evaluated. In this paper, a comparison of on-line predictors is presented. We used Altera Cyclone IV GX FPGA (Field-Programmable Gate Array) for evaluation; the criteria included performance time, power, and number of logic elements. For comparison purposes, we considered the most used predictor as reference and concluded which one is more suitable for implementation in next generation devices.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124933230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Introducing a microservice system is a challenging task and requires the exploration and documentation of several related areas of design. Exploration and documentation of software architecture design is supported by decision guidance models in software architecture. In this paper, we present such guidance models for several microservice system design areas, including service discovery and fault tolerance. The presented models have been created based on existing microservice literature and have been validated and refined in design workshops with business partners as part of a technical action research (TAR) study.
{"title":"Decision guidance models for microservices: service discovery and fault tolerance","authors":"Stefan Haselböck, R. Weinreich, Georg Buchgeher","doi":"10.1145/3123779.3123804","DOIUrl":"https://doi.org/10.1145/3123779.3123804","url":null,"abstract":"Introducing a microservice system is a challenging task and requires the exploration and documentation of several related areas of design. Exploration and documentation of software architecture design is supported by decision guidance models in software architecture. In this paper, we present such guidance models for several microservice system design areas, including service discovery and fault tolerance. The presented models have been created based on existing microservice literature and have been validated and refined in design workshops with business partners as part of a technical action research (TAR) study.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129062975","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ladislav Pesicka, L. Matejka, J. Safarík, S. Racek
The paper deals with the modern concepts of distributed and hierarchical storage systems. Because of the high capacity of modern storage devices, the increasing number of files stored in such systems and the new client access patterns of mobile devices, the architecture of storage systems needs improvement to perform efficiently and respond to the current needs. Our model covers the traditional hierarchical and distributed approaches; as well as algorithms to efficiently organize the inner storage behavior. We evaluate the typical scenarios in the resulting model and show its advantages.
{"title":"Performance improvement of distributed file system using tunneling","authors":"Ladislav Pesicka, L. Matejka, J. Safarík, S. Racek","doi":"10.1145/3123779.3123791","DOIUrl":"https://doi.org/10.1145/3123779.3123791","url":null,"abstract":"The paper deals with the modern concepts of distributed and hierarchical storage systems. Because of the high capacity of modern storage devices, the increasing number of files stored in such systems and the new client access patterns of mobile devices, the architecture of storage systems needs improvement to perform efficiently and respond to the current needs. Our model covers the traditional hierarchical and distributed approaches; as well as algorithms to efficiently organize the inner storage behavior. We evaluate the typical scenarios in the resulting model and show its advantages.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122690867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Momcilo Krunic, J. Kovacevic, M. Popovic, V. Krunic
Today more than ever, energy and power distribution on heterogeneous multicore platforms have immense influence on hardware and software architectures because of general tendencies towards energy efficient solutions. This paper provides an insight into the overall energy and power distribution on an ultra-low power heterogeneous multicore platform designed for hearing aids, especially focusing on energy dissipation that is caused by instructions execution. This research has been conducted in order to provide instruction set energy profile that could be used during instructions selection for both developer and compiler. Also, information about instructions energy consumption could be used for power profiling of entire firmware solutions, therefore providing valuable feedback to developers. Experiments have been conducted using customized Eclipse based Integrated Development Environment (IDE), the toolchain (Compiler, Assembler, Linker) developed for that particular target platform, and true RMS multimeter used for measurements. The outcome of the experiments has unequivocally confirmed that the obtained instruction set energy profile provides reliable information that could be used in various ways.
{"title":"Instructions energy consumption on a heterogeneous multicore platform","authors":"Momcilo Krunic, J. Kovacevic, M. Popovic, V. Krunic","doi":"10.1145/3123779.3123795","DOIUrl":"https://doi.org/10.1145/3123779.3123795","url":null,"abstract":"Today more than ever, energy and power distribution on heterogeneous multicore platforms have immense influence on hardware and software architectures because of general tendencies towards energy efficient solutions. This paper provides an insight into the overall energy and power distribution on an ultra-low power heterogeneous multicore platform designed for hearing aids, especially focusing on energy dissipation that is caused by instructions execution. This research has been conducted in order to provide instruction set energy profile that could be used during instructions selection for both developer and compiler. Also, information about instructions energy consumption could be used for power profiling of entire firmware solutions, therefore providing valuable feedback to developers. Experiments have been conducted using customized Eclipse based Integrated Development Environment (IDE), the toolchain (Compiler, Assembler, Linker) developed for that particular target platform, and true RMS multimeter used for measurements. The outcome of the experiments has unequivocally confirmed that the obtained instruction set energy profile provides reliable information that could be used in various ways.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117126972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. D'Amato, G. Avitabile, G. Coviello, C. Talarico
This work presents the design and implementation of a beam steering transceiver prototype targeting narrowband IoT communications. The proposed architecture, integrating an open-source 8051 processor IP-core and a revised 4-channel DDS-PLL phase shifter, has been validated using an FPGA evaluation board, a custom PCB with four PLLs centered at 2.453-GHz and a custom frontend board for signal up- and down-conversion as well as actual transmission and reception through antennas.
{"title":"An FPGA-based beam steering transceiver prototype for narrowband IoT communications","authors":"G. D'Amato, G. Avitabile, G. Coviello, C. Talarico","doi":"10.1145/3123779.3123806","DOIUrl":"https://doi.org/10.1145/3123779.3123806","url":null,"abstract":"This work presents the design and implementation of a beam steering transceiver prototype targeting narrowband IoT communications. The proposed architecture, integrating an open-source 8051 processor IP-core and a revised 4-channel DDS-PLL phase shifter, has been validated using an FPGA evaluation board, a custom PCB with four PLLs centered at 2.453-GHz and a custom frontend board for signal up- and down-conversion as well as actual transmission and reception through antennas.","PeriodicalId":405980,"journal":{"name":"Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-08-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123199508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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