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2015 IEEE International Symposium on Circuits and Systems (ISCAS)最新文献

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LC resonant clock resource minimization using compensation capacitance 利用补偿电容最小化LC谐振时钟资源
Pub Date : 2015-10-30 DOI: 10.1109/ISCAS.2015.7168906
Ping-Yao Lin, H. Fahmy, Riadul Islam, Matthew R. Guthaus
Distributed-LC resonant clock distribution is a viable technique to reduce clock distribution network (CDN) dynamic power. However, resonant clocks can require significant on-chip resources to form the inductors and decoupling capacitors which discourages adoption. This paper uses a compensation capacitor (Cc) to reduce the overhead of the on-chip inductor and capacitor resources without changing the performance of a distributed-LC resonant clock. Analysis on the ISPD clock benchmarks show nearly 12% reduction in passive device area compared to previous resonant clocks while still saving 49.9% power over traditional buffered clocks.
分布式lc谐振时钟分布是降低时钟分配网络(CDN)动态功率的可行技术。然而,谐振时钟可能需要大量的片上资源来形成电感和去耦电容器,这阻碍了采用。本文在不改变分布式lc谐振时钟性能的前提下,采用补偿电容(Cc)来减少片上电感和电容资源的开销。对ISPD时钟基准的分析表明,与以前的谐振时钟相比,无源器件面积减少了近12%,同时仍比传统的缓冲时钟节省49.9%的功率。
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引用次数: 4
Real-time free viewpoint synthesis using three-camera disparity estimation hardware 使用三摄像头视差估计硬件的实时自由视点合成
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7169199
Abdulkadir Akin, Raffaele Capoccia, Jonathan Narinx, J. Masur, A. Schmid, Y. Leblebici
The recent development of high-quality free viewpoint synthesis algorithms and their implementations allows to realize glasses-free 3D perception. Although many algorithms have been developed in this domain, the real-time hardware realization of a free viewpoint synthesis for real-world images is challenging due to its high computational load and memory bandwidth requirements. In this paper, the first real-time high-resolution free viewpoint synthesis hardware utilizing three-camera disparity estimation is presented. The proposed hardware generates high-quality free viewpoint video at 55 frames per second using a Virtex-7 FPGA at a 1024×768 XGA video resolution for any horizontally-aligned arbitrary camera positioned between the leftmost and rightmost physical cameras.
高质量的自由视点合成算法及其实现的最新发展允许实现裸眼3D感知。尽管在该领域已经开发了许多算法,但由于其高计算负载和内存带宽要求,对现实世界图像的实时自由视点合成的硬件实现具有挑战性。本文提出了一种基于三摄像头视差估计的实时高分辨率自由视点合成硬件。所提出的硬件使用Virtex-7 FPGA以1024×768 XGA视频分辨率为任何水平对齐的任意位于最左边和最右边的物理摄像机之间的摄像机生成高质量的免费视点视频,每秒55帧。
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引用次数: 8
Analysis of radiation effect on the threshold voltage of flash memory device 辐射对闪存器件阈值电压的影响分析
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7169292
N. Hossain, Jitendra Koppu, M. Chowdhury
Flash memory experiences adverse effects due to radiation. These effects can be raised in terms of doping, feature size, supply voltages, layout, shielding. The the operating point shift of the device forced to enter the logically-undefined region and cause upset and data errors under radiation exposure. In this letter, the threshold voltage shift of the floating gate transistor (FGT) is analyzed by a mathematical model.
由于辐射,闪存会产生不良影响。这些影响可以在掺杂、特征尺寸、电源电压、布局和屏蔽方面提高。器件的工作点移位被迫进入逻辑上未定义的区域,并在辐射照射下引起扰动和数据错误。本文用数学模型分析了浮栅晶体管(FGT)的阈值电压漂移。
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引用次数: 4
Sensing by growing antennas: A novel approach for designing passive RFID based biosensors 生长天线传感:一种设计无源RFID生物传感器的新方法
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7169098
Mingquan Yuan, P. Chahal, E. Alocilja, S. Chakrabartty
In this paper, we show that a silver-enhancement technique can be used to self-assemble a radio-frequency (RF) antenna which then can be used for designing a radio-frequency identification (RFID) based biosensor. Using the proposed biosensor, the concentration of target analytes or pathogens can be remotely interrogated in a concealed, packaged or in a bio-hazardous environment, where direct measurement is considered to be impractical. The presence of the target analytes or pathogens, self-powers a silver-enhancement process which then assembles a chain of micro-monopole antennas. As the size of the silver-enhanced particles grows, the chain of micro-antenna segments bridge together to complete a dipole structure that reflects impinging RF signals at a desired frequency. We validate the proof-of-concept for IgG detection and demonstrate that different concentrations of rabbit IgG (ranging from 20ng to 60ng in this paper) can be detected based on the strength of the reflected RF signal received at a 915MHz COTS RFID reader.
在本文中,我们展示了一种银增强技术可以用来自组装射频(RF)天线,然后可以用于设计基于射频识别(RFID)的生物传感器。使用所提出的生物传感器,目标分析物或病原体的浓度可以在隐蔽、包装或生物危险环境中远程询问,在这些环境中,直接测量被认为是不切实际的。目标分析物或病原体的存在,会自动启动银增强过程,然后组装一串微单极天线。随着银增强颗粒尺寸的增大,微天线片段链桥接在一起,形成一个偶极子结构,以期望的频率反射撞击的射频信号。我们验证了IgG检测的概念验证,并证明基于915MHz COTS RFID读取器接收到的反射RF信号的强度,可以检测到不同浓度的兔IgG(本文中范围从20ng到60ng)。
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引用次数: 6
Stabilization of fast-scale instabilities in PCM boost PFC converter with dynamic slope compensation 基于动态斜率补偿的PCM升压PFC变换器快速尺度不稳定性的稳定
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7169188
Yidi Yang, W. Lu, H. Iu, T. Fernando
This paper proposes a dynamic slope compensation (DSC) scheme to suppress the fast-scale instabilities in a peak current mode (PCM) controlled boost PFC converter. With the proposed DSC scheme the fast-instabilities can be eliminated and the system power factor is improved as well in comparison to the cases without compensation and with the traditional slope compensation. Simulation and experimental results are given to validate the theoretical analysis and the feasibility of the proposed DSC scheme.
本文提出了一种动态斜率补偿(DSC)方案来抑制峰值电流模式(PCM)控制的升压PFC变换器的快速尺度不稳定性。与无补偿和采用传统坡度补偿的情况相比,采用DSC方案可以消除系统的快速失稳,提高系统的功率因数。仿真和实验结果验证了理论分析和DSC方案的可行性。
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引用次数: 3
Design of a computer-aided visual system for Total Hip Replacement surgery 全髋关节置换术计算机辅助视觉系统的设计
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7168751
Shaojie Su, J. Gao, Hong Chen, Zhihua Wang
To improve the accuracy of implant placement in Total Hip Replacement (THR) surgeries, this paper proposes a computer-aided visual system for THR which is composed of a customized acetabular cup, a multi-sensor femoral head trial and a computer for data processing and display. The customized trial is of the same size as the real prosthesis. An image sensor, a gyroscope and an e-compass (including an accelerometer and a magnetometer) are adopted in the femoral head trial. Reference patterns are designed and printed on the internal surface of the cup, whose images are taken by the image sensor for estimation of relative pose and position between the femoral head trial and the acetabulum cup. Two methods of pose estimation are adopted in this system: one based on images and the other based on motion data from gyroscope and e-compass. The efficient perspective-n-point (EPNP) algorithm is used in the image-based pose estimation and achieves a rotation relative error of less than 8% and a translation relative error of less than 10%. The complementary algorithm is adopted in the motion-based pose estimation to smooth the results. Experimental results verified the proposed system.
为了提高全髋关节置换术(THR)中植入物的准确性,本文提出了一种全髋关节置换术的计算机辅助视觉系统,该系统由定制的髋臼杯、多传感器股骨头试验装置和用于数据处理和显示的计算机组成。定制的试用版与真正的假体大小相同。股骨头试验采用图像传感器、陀螺仪和电子罗盘(包括加速度计和磁力计)。在髋臼杯内表面设计并打印参考图案,图像传感器采集参考图案图像,估计股骨头试验与髋臼杯之间的相对姿态和位置。该系统采用了两种姿态估计方法:一种基于图像,另一种基于陀螺仪和电子罗盘的运动数据。采用高效的视角-n点(EPNP)算法进行基于图像的姿态估计,旋转相对误差小于8%,平移相对误差小于10%。在基于运动的姿态估计中采用互补算法对结果进行平滑处理。实验结果验证了该系统的有效性。
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引用次数: 7
An FPGA processor for real-time, fixed-point refinement of CDVS keypoints 一种用于实时、定点优化cddvs关键点的FPGA处理器
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7169276
G. Lopez, E. Napoli, Domenico Meglio, A. Strollo
Computer Vision is a more and more pervasive technology in nowadays image and video processing applications: examples include image driven search, stereoscopical matching, panorama stitching and industrial automation. Compact Descriptors for Visual Search (CDVS) is an algorithm for Computer Vision recently proposed as part of the MPEG-7 standard: it has the ability to select points of interest in the image (also referred to as keypoints) that exhibit robustness, in a certain degree, with respect to changes like homogeneous variations in luminance, changes in point of view, rotations, rescaling and geometrical distortion of the image. Keypoint Refinement is a phase of the CDVS algorithm which is aimed at discarding candidate keypoints that are likely to be unstable for their algebraic properties. This paper presents an FPGA circuit design that implements this phase on fixed point data with real time compatible throughput. Implementation results show a negligible impact on resources allocation even on mid-sized FPGAs.
计算机视觉是当今图像和视频处理应用中越来越普遍的技术:例如图像驱动搜索,立体匹配,全景拼接和工业自动化。压缩视觉搜索描述符(CDVS)是最近作为MPEG-7标准的一部分提出的计算机视觉算法:它能够选择图像中的兴趣点(也称为关键点),这些点在一定程度上表现出鲁棒性,相对于亮度的均匀变化、角度的变化、旋转、重新缩放和图像的几何扭曲等变化。关键点细化是cdv算法的一个阶段,其目的是丢弃可能因其代数性质而不稳定的候选关键点。本文提出了一种FPGA电路设计,可以在定点数据上实现该相位,并具有实时兼容吞吐量。实现结果表明,即使在中型fpga上,对资源分配的影响也可以忽略不计。
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引用次数: 1
Anti-aliasing filter improvement in continuous-time feedback sigma-delta modulators 连续时间反馈σ - δ调制器抗混叠滤波器的改进
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7168636
R. Ritter, Matthias Lorenz, M. Ortmanns
This paper describes a fundamental limitation of the implicit anti-aliasing filter in continuous-time feedback compensated sigma-delta modulators and a method to overcome it. This anti-aliasing filter can be used to relax an additionally required pre filtering stage. If a strong alias rejection is required, commonly used continuous-time feedback compensated sigma-delta modulators would need some pre-filtering or a large oversampling ratio. The described technique generates a notch at the sampling frequency to improve the performance of the antialiasing filter. This method is possible without additional active components or large oversampling ratios. It is also very robust against component mismatch.
本文描述了连续时间反馈补偿型σ - δ调制器中隐式抗混叠滤波器的一个基本限制以及克服它的方法。这种抗混叠滤波器可以用来放松额外需要的预滤波阶段。如果需要强混叠抑制,常用的连续时间反馈补偿σ - δ调制器将需要一些预滤波或较大的过采样比。该技术在采样频率处产生陷波以提高抗混叠滤波器的性能。这种方法是可行的,没有额外的有效成分或大过采样比。它对组件不匹配也非常健壮。
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引用次数: 7
CNN in drug design — Recent developments CNN药物设计报道-最新进展
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7168656
J. Wichard, M. Ogorzałek, C. Merkwirth
We describe a method for construction of specific types of Neural Networks composed of structures directly linked to the structure of the molecule under consideration. Each molecule can be represented by a unique neural connectivity problem (graph) which can be programmed onto a Cellular Neural Network. The idea was to translate chemical structures like small organic molecules or peptides into a self learning environment which is CNN based. In the case of small molecules, each cell of the CNN stands for one atom of the molecule under consideration. But in contrast to the standard CNN architecture where each cell is connected to the neighboring cells, only those cells of the feature net are connected for which there also exists a chemical bond in the molecule under consideration. This implies that the feature net topology varies from molecule to molecule. In the case of peptides, the amino acids that form the building blocks of the peptide are reflected by the CNN cells wherein the amino acid sequence defines the network topology. Unlike the standard CNN used for image processing, there are no input values like the input image that are fed into the feature net. Instead, all information about the input molecule is supplied to the feature net by means of the topology. The output of several feature nets is fed into a supervisor neural network which computes the final output value. The combination of several feature nets and a supervisor networks constitutes the Molecular Graph Network (MGN). The designed networks are used for selection of molecules representing wanted properties such as activity against specific diseases, interactions with other compounds, toxicity etc. and possibly being candidates to be tested further as new drugs.
我们描述了一种构建特定类型的神经网络的方法,该神经网络由与所考虑的分子结构直接相连的结构组成。每个分子都可以用一个独特的神经连接问题(图)来表示,这个问题可以被编程到细胞神经网络上。这个想法是将小有机分子或肽等化学结构转化为基于CNN的自学习环境。在小分子的情况下,CNN的每个细胞代表所考虑的分子的一个原子。但是与标准的CNN架构不同的是,每个细胞都与相邻的细胞相连,只有那些特征网络的细胞是相连的,并且在考虑的分子中也存在化学键。这意味着特征网拓扑结构因分子而异。在多肽的情况下,形成多肽构建块的氨基酸由CNN细胞反映,其中氨基酸序列定义了网络拓扑结构。与用于图像处理的标准CNN不同,没有像输入图像那样的输入值被馈送到特征网络中。相反,所有关于输入分子的信息都通过拓扑结构提供给特征网络。将多个特征网络的输出输入到一个监督神经网络中,由监督神经网络计算最终的输出值。多个特征网络和一个监督网络的组合构成了分子图网络(MGN)。所设计的网络用于选择代表所需特性的分子,如对抗特定疾病的活性、与其他化合物的相互作用、毒性等,并可能作为新药进一步测试的候选物。
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引用次数: 3
Two-stage ΔΣ ADC with noise-coupled VCO-based quantizer 带噪声耦合vco量化器的两级ΔΣ ADC
Pub Date : 2015-07-30 DOI: 10.1109/ISCAS.2015.7168631
Mahmoud Sadollahi, G. Temes
This paper presents a noise-coupled VCO-based two-stage delta-sigma ADC, which achieves third-order noise-shaping with only one active integrator. Noise-coupling technique is applied to VCO-based quantizer to get second-order noise-shaping, used as a second stage in two-stage delta-sigma ADC to overcome the nonlinearity of the VCO. The first stage is a first-order delta-sigma modulator with a three-bit quantizer. To verify the idea, the proposed architecture has been analyzed and simulated.
本文提出了一种基于噪声耦合vco的两级delta-sigma ADC,该ADC仅使用一个有源积分器即可实现三阶噪声整形。将噪声耦合技术应用于基于VCO的量化器,得到二阶噪声整形,作为二级δ - σ ADC的二级噪声整形,克服了VCO的非线性。第一级是带3位量化器的一阶δ - σ调制器。为了验证该思想,对所提出的体系结构进行了分析和仿真。
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引用次数: 3
期刊
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
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