Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161492
Y. Ghallab, Wael Badawy, K. Kaler, M. Abou El-Ela, M. H. el-Said
A new active universal filter with single input and three outputs using Operational Floating Current Conveyor (OFCC) is presented. The configuration uses four OFCC, two grounded capacitors and three resistors. The proposed filter offers the following advantageous: (1) Using active elements of the same type (four OFCC). (2) Realization of low pass, band pass and high pass, filters simultaneously. (3) No requirements for component matching conditions or cancellation constraints, which makes the universal filter easier to design. (4) Orthogonal adjustment of /spl omega//sub 0/ and Q. (5) the circuit has low sensitivity to passive components, (6) using active elements of the same type (four OFCC) and (7) all the passive elements are grounded. The simulation results show that the proposed filter performs its functions properly.
{"title":"A new second-order active universal filter with single input and three outputs using operational floating current conveyor","authors":"Y. Ghallab, Wael Badawy, K. Kaler, M. Abou El-Ela, M. H. el-Said","doi":"10.1109/ICM-02.2002.1161492","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161492","url":null,"abstract":"A new active universal filter with single input and three outputs using Operational Floating Current Conveyor (OFCC) is presented. The configuration uses four OFCC, two grounded capacitors and three resistors. The proposed filter offers the following advantageous: (1) Using active elements of the same type (four OFCC). (2) Realization of low pass, band pass and high pass, filters simultaneously. (3) No requirements for component matching conditions or cancellation constraints, which makes the universal filter easier to design. (4) Orthogonal adjustment of /spl omega//sub 0/ and Q. (5) the circuit has low sensitivity to passive components, (6) using active elements of the same type (four OFCC) and (7) all the passive elements are grounded. The simulation results show that the proposed filter performs its functions properly.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124921964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161532
R. Ferzli, M. A. Al-Alaoui
A novel /spl Sigma//spl Delta/ modulator is presented with lower power consumption and higher Signal to Noise Ratio (SNR) than the conventional modulator for a given order. The novel modulator is applied in analog-to-digital converters of RF receivers. The same modulator architecture is used for GSM and WCDMA receivers differing only in the Oversampling Ratio (OSR). The modulator was designed using switched capacitor circuits and could be implemented in VLSI.
{"title":"A novel /spl Sigma//spl Delta/ modulator design applied to dual GSM/WCDMA receiver","authors":"R. Ferzli, M. A. Al-Alaoui","doi":"10.1109/ICM-02.2002.1161532","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161532","url":null,"abstract":"A novel /spl Sigma//spl Delta/ modulator is presented with lower power consumption and higher Signal to Noise Ratio (SNR) than the conventional modulator for a given order. The novel modulator is applied in analog-to-digital converters of RF receivers. The same modulator architecture is used for GSM and WCDMA receivers differing only in the Oversampling Ratio (OSR). The modulator was designed using switched capacitor circuits and could be implemented in VLSI.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122198879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161510
M. B. Vahidfar, S. Mehrmanesh, A. Tajalli, M. Atarodi
A fully CMOS line interface circuit has been developed as an interface to the subscriber line. This design has been done in a 90-V 1/spl mu/m CMOS process and performs high voltage functions of an electrical central office subscriber line interface circuit without any transformer and trimming. This design overcomes challenges of SLIC integration such as accurate current sensing, stability on load variation, longitudinal balance and it works on the harsh telephone environments. The proposed SLIC shows a longitudinal balance of 49 dB while consumes 2.2 mA current with 14 mm/sup 2/ area and the results are significant compared with last works.
{"title":"A 90-V subscriber line interface circuit (SLIC) in a CMOS technology","authors":"M. B. Vahidfar, S. Mehrmanesh, A. Tajalli, M. Atarodi","doi":"10.1109/ICM-02.2002.1161510","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161510","url":null,"abstract":"A fully CMOS line interface circuit has been developed as an interface to the subscriber line. This design has been done in a 90-V 1/spl mu/m CMOS process and performs high voltage functions of an electrical central office subscriber line interface circuit without any transformer and trimming. This design overcomes challenges of SLIC integration such as accurate current sensing, stability on load variation, longitudinal balance and it works on the harsh telephone environments. The proposed SLIC shows a longitudinal balance of 49 dB while consumes 2.2 mA current with 14 mm/sup 2/ area and the results are significant compared with last works.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117044729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161531
H. Artail
In this paper we describe a distributed home monitoring and control system using microcontrollers as device controllers. A host computer acts as a master and client manages the activities of the microcontrollers by instructing them to control their respective devices and collecting data from them. The host and microcontrollers communicate over a Local Area Network (LAN) via Network Interface Card (NICs). The devices can be regular house utilities or appliances. We borrow from the Standard Commands for Programmable Instruments (SCPI) to design the command packets that are exchanged between the host and the microcontrollers. We present the architecture and design of the microcontroller's communication software and illustrate how it communicates by mean of commands and data to the host. We present performance results in terms of TCP packet round trip time and timing of UDP packet transmission.
{"title":"A distributed system of network-enabled microcontrollers for controlling and monitoring home devices","authors":"H. Artail","doi":"10.1109/ICM-02.2002.1161531","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161531","url":null,"abstract":"In this paper we describe a distributed home monitoring and control system using microcontrollers as device controllers. A host computer acts as a master and client manages the activities of the microcontrollers by instructing them to control their respective devices and collecting data from them. The host and microcontrollers communicate over a Local Area Network (LAN) via Network Interface Card (NICs). The devices can be regular house utilities or appliances. We borrow from the Standard Commands for Programmable Instruments (SCPI) to design the command packets that are exchanged between the host and the microcontrollers. We present the architecture and design of the microcontroller's communication software and illustrate how it communicates by mean of commands and data to the host. We present performance results in terms of TCP packet round trip time and timing of UDP packet transmission.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124025536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161512
A. Kassem, J. Wang, A. Khouas, M. Sawan, S. Tabikh, M. Boukadoum
An ultrasound imaging systems require high resolution and real-time processing. The real-time imaging can be achieved using a digital beamforming (DBF) method. One of the main important parts of the DBF is the real-time delay calculation. The design and implementation of a pipelined architecture for the beamforming delay calculation is addressed. The design uses a minimum size look-up memory to store the initial scan information as opposed to previous approaches. The circuit is implemented in CMOS 0.18 /spl mu/m technology and the resulting layout area is 0.5 mm/sup 2/, while a total power consumption of 20 mW.
{"title":"Variable delay CMOS implementation for ultrasonic beamforming","authors":"A. Kassem, J. Wang, A. Khouas, M. Sawan, S. Tabikh, M. Boukadoum","doi":"10.1109/ICM-02.2002.1161512","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161512","url":null,"abstract":"An ultrasound imaging systems require high resolution and real-time processing. The real-time imaging can be achieved using a digital beamforming (DBF) method. One of the main important parts of the DBF is the real-time delay calculation. The design and implementation of a pipelined architecture for the beamforming delay calculation is addressed. The design uses a minimum size look-up memory to store the initial scan information as opposed to previous approaches. The circuit is implemented in CMOS 0.18 /spl mu/m technology and the resulting layout area is 0.5 mm/sup 2/, while a total power consumption of 20 mW.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121701562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161540
S. Asgaran
In this paper we present a new physically based closed-form inductance expressions for design, compact modeling and characterization of on-chip integrated inductors. We evaluate the accuracy of our expressions, as well as the most popular previously published expressions, by comparing the calculated values with measured data. It is found that our expressions match the measured inductance values typically within around 5%.
{"title":"New accurate physics-based closed-form expressions for compact modeling and design of on-chip spiral inductors","authors":"S. Asgaran","doi":"10.1109/ICM-02.2002.1161540","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161540","url":null,"abstract":"In this paper we present a new physically based closed-form inductance expressions for design, compact modeling and characterization of on-chip integrated inductors. We evaluate the accuracy of our expressions, as well as the most popular previously published expressions, by comparing the calculated values with measured data. It is found that our expressions match the measured inductance values typically within around 5%.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131452440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161483
N. Khachab, P. Wassenaar, R. Wassenaar
In this paper, a graphical method for the determination of the transfer curves of a MOS differential pair is presented. It will be assumed that the individual transfer curves of the two input transistors are well known. Next it will be assumed that there is an ideal current source in the tail of the differential pair and that the input transistors operate in the saturate region.
{"title":"A graphical construction of the transfer curve of a differential pair","authors":"N. Khachab, P. Wassenaar, R. Wassenaar","doi":"10.1109/ICM-02.2002.1161483","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161483","url":null,"abstract":"In this paper, a graphical method for the determination of the transfer curves of a MOS differential pair is presented. It will be assumed that the individual transfer curves of the two input transistors are well known. Next it will be assumed that there is an ideal current source in the tail of the differential pair and that the input transistors operate in the saturate region.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131795912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161530
O. Hammami, I. Aouadi, E. Zheng
A performance evaluation of the new JPEG2000 ISO standard for still image compression is conducted for VLIW processor. The complexity of the standard and the rich set of proposed features make it difficult to find straightforward implementations. In this paper we present results of various compiler optimization techniques on the processor CPI.
{"title":"Performance evaluation of JPEG-2000 on VLIW microarchitectures","authors":"O. Hammami, I. Aouadi, E. Zheng","doi":"10.1109/ICM-02.2002.1161530","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161530","url":null,"abstract":"A performance evaluation of the new JPEG2000 ISO standard for still image compression is conducted for VLIW processor. The complexity of the standard and the rich set of proposed features make it difficult to find straightforward implementations. In this paper we present results of various compiler optimization techniques on the processor CPI.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132819262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161507
I. Mougharbel, T. Elfakih, F. Njeim
In this paper, a new method is suggested for designing an optically controlled power static switch module. Considerations are presented in order to reach an optimal design. Plastic optical fiber is used to transfer optical signals generated by the controller. Circuits of the module don't use auxiliary power supply. Therefore, problems due to power supply isolation are removed and less complexity is obtained. Losses are reduced using switching techniques for regulation. The module can operate in a wide range of switching frequency and could be used in either dc or ac applications.
{"title":"Design considerations for an optically controlled static switch autonomous module","authors":"I. Mougharbel, T. Elfakih, F. Njeim","doi":"10.1109/ICM-02.2002.1161507","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161507","url":null,"abstract":"In this paper, a new method is suggested for designing an optically controlled power static switch module. Considerations are presented in order to reach an optimal design. Plastic optical fiber is used to transfer optical signals generated by the controller. Circuits of the module don't use auxiliary power supply. Therefore, problems due to power supply isolation are removed and less complexity is obtained. Losses are reduced using switching techniques for regulation. The module can operate in a wide range of switching frequency and could be used in either dc or ac applications.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133041324","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-12-11DOI: 10.1109/ICM-02.2002.1161533
A. Qasem Safarian, F. Sahandi, S. Mojtaba Atarodi
This paper presents a new single-loop single-stage second order sigma-delta modulator. The circuit based on switched capacitor components just uses one Op-Amp to realize second order noise shaping. The modulator demonstrated 85 dB DR in 8kHz bandwidth, dissipating 135 /spl mu/W from a 2.5 V supply.
本文提出了一种新的单回路单级二阶σ - δ调制器。该电路基于开关电容元件，仅使用一个运放即可实现二阶噪声整形。该调制器在8kHz带宽下显示85 dB DR，在2.5 V电源下耗散135 /spl mu/W。
{"title":"A new single-loop single-stage low power sigma-delta modulator","authors":"A. Qasem Safarian, F. Sahandi, S. Mojtaba Atarodi","doi":"10.1109/ICM-02.2002.1161533","DOIUrl":"https://doi.org/10.1109/ICM-02.2002.1161533","url":null,"abstract":"This paper presents a new single-loop single-stage second order sigma-delta modulator. The circuit based on switched capacitor components just uses one Op-Amp to realize second order noise shaping. The modulator demonstrated 85 dB DR in 8kHz bandwidth, dissipating 135 /spl mu/W from a 2.5 V supply.","PeriodicalId":433175,"journal":{"name":"The 14th International Conference on Microelectronics,","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121662592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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