Pub Date : 2024-03-21DOI: 10.1142/s0218126624502591
M. Nalini, R. Thilagavathy, K. Bhargavi, K. Thinakaran
{"title":"Optimizing Storage Efficiency through Pipelining and Parallelization for Enhanced Data Deduplication","authors":"M. Nalini, R. Thilagavathy, K. Bhargavi, K. Thinakaran","doi":"10.1142/s0218126624502591","DOIUrl":"https://doi.org/10.1142/s0218126624502591","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":" 63","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140221506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-21DOI: 10.1142/s0218126624502578
Neeraj Agarwal, Neeru Agarwal
{"title":"Characterization & Implementation of ISFET Array Chip using 0.18 μm CMOS Technology for Integrated Sensor Application","authors":"Neeraj Agarwal, Neeru Agarwal","doi":"10.1142/s0218126624502578","DOIUrl":"https://doi.org/10.1142/s0218126624502578","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"123 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140223588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-15DOI: 10.1142/s0218126624502554
S. Parthasarathy
{"title":"Secure Virtual Machine Migration and Host Overload Detection Using Modified Pelican Optimization with Variable Load Mean Function","authors":"S. Parthasarathy","doi":"10.1142/s0218126624502554","DOIUrl":"https://doi.org/10.1142/s0218126624502554","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"18 31","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140240448","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1142/s0218126624502542
Ercüment Kaya, Isil Oz
{"title":"Compiler-Managed Replication of CUDA Kernels for Reliable Execution of GPGPU Applications","authors":"Ercüment Kaya, Isil Oz","doi":"10.1142/s0218126624502542","DOIUrl":"https://doi.org/10.1142/s0218126624502542","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"38 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140245181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1142/s0218126624502529
Ivaylo Pandiev
{"title":"Design and implementation of electronically-controllable sinusoidal oscillators using commercially available current-feedback operational amplifiers with externally-accessible compensation node z","authors":"Ivaylo Pandiev","doi":"10.1142/s0218126624502529","DOIUrl":"https://doi.org/10.1142/s0218126624502529","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"465 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140246937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1142/s0218126624200044
Rama Muni Reddy Yanamala, Muralidhar Pullakandam
{"title":"High-Speed Power Allocation in NOMA System using FPGA based DNN","authors":"Rama Muni Reddy Yanamala, Muralidhar Pullakandam","doi":"10.1142/s0218126624200044","DOIUrl":"https://doi.org/10.1142/s0218126624200044","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"199 4","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140392993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.1142/s0218126624502517
Qing Yao, Chunmei Mao, Yundong Guo
{"title":"A Fuzzy Neural Network-based Intelligent Warning Method for Financial Risk of Enterprises","authors":"Qing Yao, Chunmei Mao, Yundong Guo","doi":"10.1142/s0218126624502517","DOIUrl":"https://doi.org/10.1142/s0218126624502517","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140245509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-07DOI: 10.1142/s0218126624502505
M. S. Nagar, Sohan H. Patel, Pinalkumar Engineer
{"title":"FPGA Based High-Speed Energy-Efficient 32-bit Fixed-Point MAC Architecture for DSP Application in IoT Edge Computing","authors":"M. S. Nagar, Sohan H. Patel, Pinalkumar Engineer","doi":"10.1142/s0218126624502505","DOIUrl":"https://doi.org/10.1142/s0218126624502505","url":null,"abstract":"","PeriodicalId":508131,"journal":{"name":"Journal of Circuits, Systems and Computers","volume":"46 19","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140259329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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