Pub Date : 2024-07-26DOI: 10.37394/23201.2024.23.9
Luis Camacho, Secundino Marrero, Carlos Quinatoa, Carlos Pacheco
This paper will discuss the simulation of a PEMFC fuel cell stack based on its generic characteristics. To achieve the set objective, a fuel cell model capable of replicating its electrical characteristics was developed, showcasing the polynomial approximation-based proposed models and the generic model. The validation of these suggested models involved conducting simulations utilizing converters and comparing the outcomes with those produced by the Simulink fuel cell stack block. The fuel cell instance underwent testing to reproduce the electrical behavior of the cell, devoid of the specific data associated with the fuel cell stack.
{"title":"Emulation of a PEM Fuel Cell Stack from its Generic and Polynomial Model using Simulink","authors":"Luis Camacho, Secundino Marrero, Carlos Quinatoa, Carlos Pacheco","doi":"10.37394/23201.2024.23.9","DOIUrl":"https://doi.org/10.37394/23201.2024.23.9","url":null,"abstract":"This paper will discuss the simulation of a PEMFC fuel cell stack based on its generic characteristics. To achieve the set objective, a fuel cell model capable of replicating its electrical characteristics was developed, showcasing the polynomial approximation-based proposed models and the generic model. The validation of these suggested models involved conducting simulations utilizing converters and comparing the outcomes with those produced by the Simulink fuel cell stack block. The fuel cell instance underwent testing to reproduce the electrical behavior of the cell, devoid of the specific data associated with the fuel cell stack.","PeriodicalId":509697,"journal":{"name":"WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS","volume":"29 51","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141800556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-22DOI: 10.37394/23201.2024.23.6
S. Khader, A. Daud
This paper investigates how the DC choppers behave during the shading occurrence at different time intervals of the year. Three types of DC choppers are implemented during the same shading conditions and intervals of time. The studied parameters are the duty cycle, output power, current, and switch losses. The mathematical model is built and implemented using the MATLAB/Simulink platform. The obtained results show that the SEPIC converter has the highest rate of duty cycle, which means more switching losses are generated. Concerning the average output power, the Modified Single Ended Primary Converter (MSEPIC) has the highest rate, while the Boost Converter has the lowest rate. The MPP power, duty cycle, and switching losses are studied under various shading rates. The duty cycle has the highest rate on the SEPIC converter, while MSEPIC has the lowest rate. Despite that, the switching losses are tremendously high at MSEPIC compared to SEPIC converters. Furthermore, simulation studies show that Boost and SEPIC converters have better performance in frequent cloudy weather conditions.
{"title":"The Behaviours of Various DC Choppers during Shading Occurrence in PV Systems","authors":"S. Khader, A. Daud","doi":"10.37394/23201.2024.23.6","DOIUrl":"https://doi.org/10.37394/23201.2024.23.6","url":null,"abstract":"This paper investigates how the DC choppers behave during the shading occurrence at different time intervals of the year. Three types of DC choppers are implemented during the same shading conditions and intervals of time. The studied parameters are the duty cycle, output power, current, and switch losses. The mathematical model is built and implemented using the MATLAB/Simulink platform. The obtained results show that the SEPIC converter has the highest rate of duty cycle, which means more switching losses are generated. Concerning the average output power, the Modified Single Ended Primary Converter (MSEPIC) has the highest rate, while the Boost Converter has the lowest rate. The MPP power, duty cycle, and switching losses are studied under various shading rates. The duty cycle has the highest rate on the SEPIC converter, while MSEPIC has the lowest rate. Despite that, the switching losses are tremendously high at MSEPIC compared to SEPIC converters. Furthermore, simulation studies show that Boost and SEPIC converters have better performance in frequent cloudy weather conditions.","PeriodicalId":509697,"journal":{"name":"WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS","volume":"16 2","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140676536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-22DOI: 10.37394/23201.2024.23.5
Abhay Pratap Singh, V. Mishra, Shamim Akhter
This research presents a comparison of the electrical performance of a double-side induced germanium-pocket (IGP) FD-SOI MOSFET and a dual material gate IGPFDSOI (DIGPFDSOI). The electrical performance is reviewed by comparing the device parameters like drain current, band diagram, lateral electric field, surface potential, and work function of the gate material. The proposed structure exhibits excellent characteristics compared to the IGPFDSOI MOSFET. The proposed structure has a greater Ion/Ioff ratio, a lower subthreshold slope, reduced capacitance, and an elevated cut-off frequency. The implementation of a dual metal gate is considered a superior method in comparison to FD-SOI technology because it effectively reduces the negative effects of scaling. A study is being done to analyze the differences in the work functions of metal gates to evaluate the effectiveness of the proposed construction. The comparison evaluation shows that the suggested design can be used for both digital and analog tasks because it has a higher switching frequency and a better cut-off frequency. Apart from this, the proposed structure can also be implemented without making substantial changes to the conventional FD-SOI MOSFET fabrication process flow. Here, we are using n-type and p-type DIGPFDSOI MOSFETs to make a CMOS converter circuit. Sentaurus TCAD is used to simulate and analyze the performance of the proposed structure.
{"title":"Enabling of CMOS Circuit using Dual Material Gate Germanium Pocket Induced FDSOI MOSFET","authors":"Abhay Pratap Singh, V. Mishra, Shamim Akhter","doi":"10.37394/23201.2024.23.5","DOIUrl":"https://doi.org/10.37394/23201.2024.23.5","url":null,"abstract":"This research presents a comparison of the electrical performance of a double-side induced germanium-pocket (IGP) FD-SOI MOSFET and a dual material gate IGPFDSOI (DIGPFDSOI). The electrical performance is reviewed by comparing the device parameters like drain current, band diagram, lateral electric field, surface potential, and work function of the gate material. The proposed structure exhibits excellent characteristics compared to the IGPFDSOI MOSFET. The proposed structure has a greater Ion/Ioff ratio, a lower subthreshold slope, reduced capacitance, and an elevated cut-off frequency. The implementation of a dual metal gate is considered a superior method in comparison to FD-SOI technology because it effectively reduces the negative effects of scaling. A study is being done to analyze the differences in the work functions of metal gates to evaluate the effectiveness of the proposed construction. The comparison evaluation shows that the suggested design can be used for both digital and analog tasks because it has a higher switching frequency and a better cut-off frequency. Apart from this, the proposed structure can also be implemented without making substantial changes to the conventional FD-SOI MOSFET fabrication process flow. Here, we are using n-type and p-type DIGPFDSOI MOSFETs to make a CMOS converter circuit. Sentaurus TCAD is used to simulate and analyze the performance of the proposed structure.","PeriodicalId":509697,"journal":{"name":"WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS","volume":"29 23","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140673354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-18DOI: 10.37394/23201.2024.23.4
Alexander Zemliak, Andrei Osadchuk, Christian Serrano
The approach developed earlier, based on generalized optimization, was successfully applied to the problem of designing electronic circuits using deterministic optimization methods. In this paper, a similar approach is extended to the problem of optimizing electronic circuits using a genetic algorithm (GA) as the main optimization method. The fundamental element of generalized optimization is an artificially introduced control vector that generates many different strategies within the optimization process and determines the number of independent variables of the optimization problem, as well as the length and structure of chromosomes in the GA. In this case, the GA forms a set of populations defined by a fitness function specified in different ways depending on the strategy chosen within the framework of the idea of generalized optimization. The control vector allows you to generate different strategies, as well as build composite strategies that significantly increase the accuracy of the resulting solution. This, in turn, makes it possible to reduce the number of generations required during the operation of the GA and reduce the processor time by 3–5 orders of magnitude when solving the circuit optimization problem compared to the traditional GA. An analysis of the optimization procedure for some electronic circuits showed the effectiveness of this approach. The obtained results prove that the applied modification of the GA makes it possible to overcome premature convergence and increase the minimization accuracy by 3-4 orders of magnitude.
早先开发的基于广义优化的方法已成功应用于使用确定性优化方法设计电子电路的问题。本文将类似方法扩展到使用遗传算法（GA）作为主要优化方法的电子电路优化问题。广义优化的基本要素是人为引入控制向量，在优化过程中产生多种不同的策略，并决定优化问题的自变量数量以及 GA 中染色体的长度和结构。在这种情况下，GA 会形成一组种群，这些种群由适合度函数定义，适合度函数根据在广义优化思想框架内选择的策略以不同方式指定。通过控制向量可以生成不同的策略，也可以建立复合策略，从而显著提高解决方案的准确性。这反过来又使得在解决电路优化问题时，与传统 GA 相比，可以减少 GA 运行过程中所需的代数，并将处理器时间减少 3-5 个数量级。对一些电子电路优化程序的分析表明了这种方法的有效性。获得的结果证明，对遗传算法进行修改后，可以克服过早收敛的问题，并将最小化精度提高 3-4 个数量级。
{"title":"Optimization Process by Generalized Genetic Algorithm","authors":"Alexander Zemliak, Andrei Osadchuk, Christian Serrano","doi":"10.37394/23201.2024.23.4","DOIUrl":"https://doi.org/10.37394/23201.2024.23.4","url":null,"abstract":"The approach developed earlier, based on generalized optimization, was successfully applied to the problem of designing electronic circuits using deterministic optimization methods. In this paper, a similar approach is extended to the problem of optimizing electronic circuits using a genetic algorithm (GA) as the main optimization method. The fundamental element of generalized optimization is an artificially introduced control vector that generates many different strategies within the optimization process and determines the number of independent variables of the optimization problem, as well as the length and structure of chromosomes in the GA. In this case, the GA forms a set of populations defined by a fitness function specified in different ways depending on the strategy chosen within the framework of the idea of generalized optimization. The control vector allows you to generate different strategies, as well as build composite strategies that significantly increase the accuracy of the resulting solution. This, in turn, makes it possible to reduce the number of generations required during the operation of the GA and reduce the processor time by 3–5 orders of magnitude when solving the circuit optimization problem compared to the traditional GA. An analysis of the optimization procedure for some electronic circuits showed the effectiveness of this approach. The obtained results prove that the applied modification of the GA makes it possible to overcome premature convergence and increase the minimization accuracy by 3-4 orders of magnitude.","PeriodicalId":509697,"journal":{"name":"WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS","volume":" 18","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140686165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-08DOI: 10.37394/23201.2024.23.3
Mohamed Hajjej, L. Sbita
The widespread integration of nonlinear loads across industrial, commercial, and residential settings has significantly exacerbated power quality issues within contemporary power distribution systems. An example of such nonlinear loads is the prevalent use of compact fluorescent lamps (CFLs), intended as replacements for incandescent lamps (ILs). CFLs have gained popularity owing to their reduced energy consumption and extended lifespan, contributing to their extensive use across various applications. But those lamps inject high harmonic current in the power system. To address this issue, a hybrid active power filter HAPF based on a shunt active power filter SAPF in parallel with a passive filter (PF) is implemented in this paper. The reference current is calculated based on the PQ theory, and the voltage source inverter VSI is controlled via a simple hysteresis current controller (HCC). The results show that the PF is suitable to compensate for the Hight harmonic generated by both the load and the switched device of the APF. Also, this HAPF is well designed and implemented to mitigate all harmonic generated by CFL lamps on the power system, and compensate the reactive power. The THD of the current is reduced from 90.75% before compensation to 0.75% after compensation. This implies that the main injects only the Fundamental current to the power.
{"title":"Three-Phase Four-Wire Hybrid Active Power Filter for Mitigating Harmonic Problems Caused by CFLs Lamps based on a Shunt Active Power Filter SAPF in Parallel with a Passive Filter","authors":"Mohamed Hajjej, L. Sbita","doi":"10.37394/23201.2024.23.3","DOIUrl":"https://doi.org/10.37394/23201.2024.23.3","url":null,"abstract":"The widespread integration of nonlinear loads across industrial, commercial, and residential settings has significantly exacerbated power quality issues within contemporary power distribution systems. An example of such nonlinear loads is the prevalent use of compact fluorescent lamps (CFLs), intended as replacements for incandescent lamps (ILs). CFLs have gained popularity owing to their reduced energy consumption and extended lifespan, contributing to their extensive use across various applications. But those lamps inject high harmonic current in the power system. To address this issue, a hybrid active power filter HAPF based on a shunt active power filter SAPF in parallel with a passive filter (PF) is implemented in this paper. The reference current is calculated based on the PQ theory, and the voltage source inverter VSI is controlled via a simple hysteresis current controller (HCC). The results show that the PF is suitable to compensate for the Hight harmonic generated by both the load and the switched device of the APF. Also, this HAPF is well designed and implemented to mitigate all harmonic generated by CFL lamps on the power system, and compensate the reactive power. The THD of the current is reduced from 90.75% before compensation to 0.75% after compensation. This implies that the main injects only the Fundamental current to the power.","PeriodicalId":509697,"journal":{"name":"WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS","volume":"176 S419","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140731113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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