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2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)最新文献

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A Correctly Rounded Mixed-Radix Fused-Multiply-Add 一个正确四舍五入混合基数融合乘加
Pub Date : 2018-06-01 DOI: 10.1109/ARITH.2018.8464818
Clothilde Jeangoudoux, C. Lauter
The IEEE 754–2008 Standard governs Floating-Point Arithmetic in all types of Computer Systems. The Standard provides for two radices, 2 and 10. It specifies conversion operations between these radices, but does not allow floating-point formats of different radices to be mixed in computational operations. In contrast, the Standard does provide for mixing formats of one radix in one operation. In order to enhance the Standard and make it closed under all basic computational operations, we propose an algorithm for a correctly rounded mixed-radix Fused-Multiply-and-Add (FMA). Our algorithm takes any combination of IEEE754 binary64 and decimal64 numbers in argument and provides a result in IEEE754 binary64 and decimal64, rounded according to any for the five IEEE754 rounding modes. Our implementation does not require any dynamic memory allocation; its runtime can be bounded statically. We compare our implementation to a basic mixed-radix FMA implementation based on the GMP Multiple Precision library.
IEEE 754-2008标准管理所有类型计算机系统中的浮点运算。标准规定了两个小数,2和10。它指定了这些基数之间的转换操作,但不允许在计算操作中混合使用不同基数的浮点格式。相比之下,该标准在一个操作中提供了一个基数的混合格式。为了增强标准,使其在所有基本计算操作下都是封闭的,我们提出了一种正确舍入的混合基融合乘加(FMA)算法。我们的算法接受参数中IEEE754 binary64和decimal64数字的任意组合,并提供IEEE754 binary64和decimal64的结果,根据IEEE754五种舍入模式的任意四舍五入。我们的实现不需要任何动态内存分配;它的运行时可以被静态地限定。我们将我们的实现与基于GMP多精度库的基本混合基数FMA实现进行比较。
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引用次数: 3
FP-ANR: A representation format to handle floating-point cancellation at run-time FP-ANR:在运行时处理浮点取消的表示格式
Pub Date : 2018-06-01 DOI: 10.1109/ARITH.2018.8464784
D. Defour
When dealing with floating-point numbers, there are several sources of error which can drastically reduce the numerical quality of computed results. One of those error sources is the loss of significance or cancellation, which occurs during for example, the subtraction of two nearly equal numbers. In this article, we propose a representation format named Floating-Point Adaptive Noise Reduction (FP-ANR). This format embeds cancellation information directly into the floating-point representation format thanks to a dedicated pattern. With this format, insignificant trailing bits lost during cancellation are removed from every manipulated floating-point number. The immediate consequence is that it increases the numerical confidence of computed values. The proposed representation format corresponds to a simple and efficient implementation of significance arithmetic based and compatible with the IEEE Standard 754 standard.
在处理浮点数时,有几个错误来源会大大降低计算结果的数值质量。其中一种误差来源是显著性的丧失或消去,例如在两个几乎相等的数相减时发生。在本文中,我们提出了一种称为浮点自适应降噪(FP-ANR)的表示格式。由于使用了专用模式,这种格式将取消信息直接嵌入到浮点表示格式中。使用这种格式,在取消过程中丢失的无关紧要的尾随位将从每个被操纵的浮点数中删除。直接的结果是,它增加了计算值的数值置信度。所提出的表示格式对应于基于显著性算法的一种简单有效的实现,并且与IEEE标准754标准兼容。
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引用次数: 2
期刊
2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)
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