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2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)最新文献

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The Comeback of Reed Solomon Codes 里德·所罗门密码的回归
Pub Date : 2018-06-01 DOI: 10.1109/ARITH.2018.8464690
Nir Drucker, S. Gueron, V. Krasnov
Distributed storage systems utilize erasure codes to reduce their storage costs while efficiently handling failures. Many of these codes (e. g., Reed-Solomon (RS) codes) rely on Galois Field (GF) arithmetic, which is considered to be fast when the field characteristic is 2. Nevertheless, some developments in the field of erasure codes offer new efficient techniques that require mostly XOR operations, and are thus faster than GF operations. Recently, Intel announced [1] that its future architecture (codename “Ice Lake”) will introduce new set of instructions called Galois Field New Instruction (GF-NI). These instructions allow software flows to perform vector and matrix multiplications over GF (28) on the wide registers that are available on the AVX512 architectures. In this paper, we explain the functionality of these instructions, and demonstrate their usage for some fast computations in GF(28). We also use the Intel® Intelligent Storage Acceleration Library (ISA-L) in order to estimate potential future improvement for erasure codes that are based on RS codes. Our results predict $approx 1.4mathrm{x}$ speedup for vectorized multiplication, and 1.83x speedup for the actual encoding.
分布式存储系统利用纠删码来降低存储成本,同时有效地处理故障。许多这些码(如里德-所罗门码(RS))依赖于伽罗瓦场(GF)算法,当场特征为2时,该算法被认为是快速的。然而,擦除码领域的一些发展提供了新的高效技术,这些技术主要需要异或操作,因此比GF操作更快。近日,英特尔宣布其未来架构(代号“冰湖”)将引入一套名为伽罗瓦场新指令(GF-NI)的新指令。这些指令允许软件流在AVX512架构上可用的宽寄存器上对GF(28)执行向量和矩阵乘法。在本文中,我们解释了这些指令的功能,并演示了它们在GF(28)中的一些快速计算中的使用。我们还使用英特尔®智能存储加速库(ISA-L)来估计基于RS码的擦除码的潜在未来改进。我们的结果预测,向量化乘法的加速大约为1.4 mathm {x}$,实际编码的加速为1.83倍。
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引用次数: 6
FP-ANR: A representation format to handle floating-point cancellation at run-time FP-ANR:在运行时处理浮点取消的表示格式
Pub Date : 2018-06-01 DOI: 10.1109/ARITH.2018.8464784
D. Defour
When dealing with floating-point numbers, there are several sources of error which can drastically reduce the numerical quality of computed results. One of those error sources is the loss of significance or cancellation, which occurs during for example, the subtraction of two nearly equal numbers. In this article, we propose a representation format named Floating-Point Adaptive Noise Reduction (FP-ANR). This format embeds cancellation information directly into the floating-point representation format thanks to a dedicated pattern. With this format, insignificant trailing bits lost during cancellation are removed from every manipulated floating-point number. The immediate consequence is that it increases the numerical confidence of computed values. The proposed representation format corresponds to a simple and efficient implementation of significance arithmetic based and compatible with the IEEE Standard 754 standard.
在处理浮点数时,有几个错误来源会大大降低计算结果的数值质量。其中一种误差来源是显著性的丧失或消去,例如在两个几乎相等的数相减时发生。在本文中,我们提出了一种称为浮点自适应降噪(FP-ANR)的表示格式。由于使用了专用模式,这种格式将取消信息直接嵌入到浮点表示格式中。使用这种格式,在取消过程中丢失的无关紧要的尾随位将从每个被操纵的浮点数中删除。直接的结果是,它增加了计算值的数值置信度。所提出的表示格式对应于基于显著性算法的一种简单有效的实现,并且与IEEE标准754标准兼容。
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引用次数: 2
期刊
2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)
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