Managing virtual memory is an expensive operation, and becomes even more expensive on virtualized servers. Processing TLB misses on a virtualized x86 server requires a twodimensional page walk that can have 6x more page table lookups, hence 6x more memory references, than a native page table walk. Thus much of the recent research on the subject starts from the assumption that TLB miss processing in virtual environments is significantly more expensive than on native servers. However, we will show that with the latest software stack on modern x86 processors, most of these page table lookups are satisfied by internal paging structure caches and the L1/L2 data caches, and the actual virtualization overhead of TLB miss processing is a modest fraction of the overall time spent processing TLB misses. We show that even for the heaviest workloads, a welltuned application that uses large pages on a recent OS release with a modern hypervisor running on the latest x86 processors sees only minimal degradation from the additional overhead of the two-dimensional page walks in a virtualized server.
{"title":"Performance Implications of Extended Page Tables on Virtualized x86 Processors","authors":"Timothy Merrifield, H. Taheri","doi":"10.1145/3139645.3139652","DOIUrl":"https://doi.org/10.1145/3139645.3139652","url":null,"abstract":"Managing virtual memory is an expensive operation, and becomes even more expensive on virtualized servers. Processing TLB misses on a virtualized x86 server requires a twodimensional page walk that can have 6x more page table lookups, hence 6x more memory references, than a native page table walk. Thus much of the recent research on the subject starts from the assumption that TLB miss processing in virtual environments is significantly more expensive than on native servers. However, we will show that with the latest software stack on modern x86 processors, most of these page table lookups are satisfied by internal paging structure caches and the L1/L2 data caches, and the actual virtualization overhead of TLB miss processing is a modest fraction of the overall time spent processing TLB misses.\u0000 We show that even for the heaviest workloads, a welltuned application that uses large pages on a recent OS release with a modern hypervisor running on the latest x86 processors sees only minimal degradation from the additional overhead of the two-dimensional page walks in a virtualized server.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82510668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Youngjin Kwon, Hangchen Yu, Simon Peter, C. Rossbach, E. Witchel
Memory capacity and demand have grown hand in hand in recent years. However, overheads for memory virtualization, in particular for address translation, grow with memory capacity as well, motivating hardware manufacturers to provide TLBs with thousands of entries for larger pages, or huge pages. Current OSes and hypervisors support huge pages with a hodge-podge of best-effort algorithms and spot fixes that make less and less sense as architectural support for huge pages matures. The time has come for a more fundamental redesign. Ingens is a framework for providing transparent huge page support in a coordinated way. Ingens manages contiguity as a first-class resource, and tracks utilization and access frequency of memory pages, enabling it to eliminate pathologies that plague current systems. Experiments with a Linux/KVM-based prototype show improved fairness and performance, and reduced tail latency and memory bloat for important applications such as Web services and Redis. We report early experiences with our in-progress port of Ingens to the ESX Hypervisor.
{"title":"Ingens: Huge Page Support for the OS and Hypervisor","authors":"Youngjin Kwon, Hangchen Yu, Simon Peter, C. Rossbach, E. Witchel","doi":"10.1145/3139645.3139659","DOIUrl":"https://doi.org/10.1145/3139645.3139659","url":null,"abstract":"Memory capacity and demand have grown hand in hand in recent years. However, overheads for memory virtualization, in particular for address translation, grow with memory capacity as well, motivating hardware manufacturers to provide TLBs with thousands of entries for larger pages, or huge pages. Current OSes and hypervisors support huge pages with a hodge-podge of best-effort algorithms and spot fixes that make less and less sense as architectural support for huge pages matures. The time has come for a more fundamental redesign.\u0000 Ingens is a framework for providing transparent huge page support in a coordinated way. Ingens manages contiguity as a first-class resource, and tracks utilization and access frequency of memory pages, enabling it to eliminate pathologies that plague current systems. Experiments with a Linux/KVM-based prototype show improved fairness and performance, and reduced tail latency and memory bloat for important applications such as Web services and Redis. We report early experiences with our in-progress port of Ingens to the ESX Hypervisor.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89572532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We introduce a thread characterization method that explores hardware performance counters and machine learning techniques to automate estimating workload execution on heterogeneous processors. We show that our characterization scheme achieves higher accuracy when predicting performance indicators, such as instructions per cycle and last-level cache misses, commonly used to determine the mapping of threads to processor types at runtime. We also show that support vector regression achieves higher accuracy when compared to linear regression, and has very low (1%) overhead. The results presented in this paper can provide a foundation for advanced investigations and interesting new directions in intelligent thread scheduling and power management on multiprocessors.
{"title":"Exploring Machine Learning for Thread Characterization on Heterogeneous Multiprocessors","authors":"Cha V. Li, V. Petrucci, D. Mossé","doi":"10.1145/3139645.3139664","DOIUrl":"https://doi.org/10.1145/3139645.3139664","url":null,"abstract":"We introduce a thread characterization method that explores hardware performance counters and machine learning techniques to automate estimating workload execution on heterogeneous processors. We show that our characterization scheme achieves higher accuracy when predicting performance indicators, such as instructions per cycle and last-level cache misses, commonly used to determine the mapping of threads to processor types at runtime. We also show that support vector regression achieves higher accuracy when compared to linear regression, and has very low (1%) overhead. The results presented in this paper can provide a foundation for advanced investigations and interesting new directions in intelligent thread scheduling and power management on multiprocessors.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90586433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The summer of 2016 was buzzing with intern activity at the VMware Research Group (VRG), working with all the research team and with David Tennenhouse, Chief Research Officer of VMware. In this paper, we give a brief introduction to Flexible Paxos [4], one of the internship results. There were several other exciting outcomes; internships are a great way to participate in driving innovation at VMware! Flexible Paxos introduces a surprising observation concerning the foundations distributed computing. The observation revisits the basic requisites of Paxos [7, 8], Lamport’s widely adopted algorithmic foundation for fault tolerance and replication, and a pinnacle of his Turing award [1]. Since its publication, Paxos has been widely built upon in teaching, research and production systems. Paxos implements a fault tolerant state-machine among a group of nodes. At its core, Paxos uses two phases, each requires agreement from a subset of nodes (known as a quorum) to proceed. Throughout this manuscript, we will refer to the first phase as the leader election phase, and the second as the replication phase. The safety and liveness of Paxos is based on the guarantee that any two quorums will intersect. To satisfy this requirement, quorums are typically composed of any majority from a fixed set of nodes, although other quorum schemes have been proposed. In practice, we usually wish to reach agreement over a sequence of commands, not one. This is often referred to as the Multi-Paxos problem [3]. In Multi-Paxos, we use the leader election phase of Paxos to establish one node as a leader for all future commands, until it is replaced by another leader. We use the replication phase of Paxos to agree on a series of commands, one at a time. To commit a command, the leader must always communicate with at least a quorum of nodes and wait for them to accept the value. In the Flexible Paxos work, we observe that Paxos is conservative:
2016年夏天，VMware Research Group (VRG)的实习生活动非常活跃，我与整个研究团队以及VMware首席研究官David Tennenhouse一起工作。在本文中，我们将对实习成果之一Flexible Paxos[4]进行简要介绍。还有其他几个令人兴奋的结果;实习是参与推动VMware创新的好方法!灵活的Paxos引入了一个关于基础分布式计算的惊人观察。这一观察回顾了Paxos的基本要求[7,8]，这是Lamport广泛采用的容错和复制算法基础，也是他获得图灵奖的巅峰之作[1]。自发布以来，Paxos已广泛应用于教学、研究和生产系统。Paxos在一组节点之间实现容错状态机。Paxos的核心使用两个阶段，每个阶段都需要得到节点子集(称为quorum)的同意才能继续进行。在本文中，我们将第一阶段称为领导者选举阶段，第二阶段称为复制阶段。Paxos的安全性和活动性是建立在保证任意两个群体将相交的基础上的。为了满足这一要求，仲裁通常由来自一组固定节点的任何多数组成，尽管已经提出了其他仲裁方案。在实践中，我们通常希望在一系列命令上达成一致，而不是一个命令。这通常被称为Multi-Paxos问题[3]。在Multi-Paxos中，我们使用Paxos的leader选举阶段来建立一个节点作为未来所有命令的leader，直到它被另一个leader所取代。我们使用Paxos的复制阶段来商定一系列命令，一次一个。要提交命令，leader必须始终与至少一定数量的节点通信，并等待它们接受该值。在Flexible Paxos工作中，我们观察到Paxos是保守的:
{"title":"Revisiting the Paxos Foundations: A Look at Summer Internship Work at VMware Research","authors":"H. Howard, D. Malkhi, A. Spiegelman","doi":"10.1145/3139645.3139656","DOIUrl":"https://doi.org/10.1145/3139645.3139656","url":null,"abstract":"The summer of 2016 was buzzing with intern activity at the VMware Research Group (VRG), working with all the research team and with David Tennenhouse, Chief Research Officer of VMware. In this paper, we give a brief introduction to Flexible Paxos [4], one of the internship results. There were several other exciting outcomes; internships are a great way to participate in driving innovation at VMware! Flexible Paxos introduces a surprising observation concerning the foundations distributed computing. The observation revisits the basic requisites of Paxos [7, 8], Lamport’s widely adopted algorithmic foundation for fault tolerance and replication, and a pinnacle of his Turing award [1]. Since its publication, Paxos has been widely built upon in teaching, research and production systems. Paxos implements a fault tolerant state-machine among a group of nodes. At its core, Paxos uses two phases, each requires agreement from a subset of nodes (known as a quorum) to proceed. Throughout this manuscript, we will refer to the first phase as the leader election phase, and the second as the replication phase. The safety and liveness of Paxos is based on the guarantee that any two quorums will intersect. To satisfy this requirement, quorums are typically composed of any majority from a fixed set of nodes, although other quorum schemes have been proposed. In practice, we usually wish to reach agreement over a sequence of commands, not one. This is often referred to as the Multi-Paxos problem [3]. In Multi-Paxos, we use the leader election phase of Paxos to establish one node as a leader for all future commands, until it is replaced by another leader. We use the replication phase of Paxos to agree on a series of commands, one at a time. To commit a command, the leader must always communicate with at least a quorum of nodes and wait for them to accept the value. In the Flexible Paxos work, we observe that Paxos is conservative:","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75493126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The virtual switch is the cornerstone of the today's virtualized data center. As all traffic to and from virtual machines or containers must pass through a vSwitch, it is the ideal location for network configuration and policy enforcement. The bulk of Open vSwitch functionality is platform-agnostic and portable. However the datapath, which touches every packet, is unique to each supported platform. Maintaining each datapath requires duplicated effort and the result has been inconsistent support of features across platforms. Even on a single platform, the features supported by a particular kernel version can vary. Further, datapath functionality must be broadly useful which prevents having application-specific features in the fast path. eBPF, extended Berkeley Packet Filter, enables userspace applications to customize and extend the Linux kernel's functionality. It provides flexible platform abstractions for network functions, and is being ported to a variety of platforms. This paper describes the design, implementation, and evaluation of an eBPF-based extensible OVS datapath. The eBPF OVS datapath delivers the equivalent functionality of the existing OVS kernel datapath, while significantly reducing development pain points around maintainability and extensibility. We demonstrate that these benefits don't necessarily have a trade off in regards to performance, with the eBPFbased datapath showing negligible overhead compared to the existing kernel datapath.
{"title":"Building an Extensible Open vSwitch Datapath","authors":"Cheng-Chun Tu, Joe Stringer, J. Pettit","doi":"10.1145/3139645.3139657","DOIUrl":"https://doi.org/10.1145/3139645.3139657","url":null,"abstract":"The virtual switch is the cornerstone of the today's virtualized data center. As all traffic to and from virtual machines or containers must pass through a vSwitch, it is the ideal location for network configuration and policy enforcement.\u0000 The bulk of Open vSwitch functionality is platform-agnostic and portable. However the datapath, which touches every packet, is unique to each supported platform. Maintaining each datapath requires duplicated effort and the result has been inconsistent support of features across platforms. Even on a single platform, the features supported by a particular kernel version can vary. Further, datapath functionality must be broadly useful which prevents having application-specific features in the fast path.\u0000 eBPF, extended Berkeley Packet Filter, enables userspace applications to customize and extend the Linux kernel's functionality. It provides flexible platform abstractions for network functions, and is being ported to a variety of platforms. This paper describes the design, implementation, and evaluation of an eBPF-based extensible OVS datapath. The eBPF OVS datapath delivers the equivalent functionality of the existing OVS kernel datapath, while significantly reducing development pain points around maintainability and extensibility. We demonstrate that these benefits don't necessarily have a trade off in regards to performance, with the eBPFbased datapath showing negligible overhead compared to the existing kernel datapath.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77731406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P4 is a language for expressing how packets are processed by the data-plane of a programmable network element such as a hardware or software switch, network interface card, router or network function appliance. This document describes the most recent version of the language, P416, and the reference implementation of the P416 compiler.
{"title":"The P416 Programming Language","authors":"M. Budiu, C. Dodd","doi":"10.1145/3139645.3139648","DOIUrl":"https://doi.org/10.1145/3139645.3139648","url":null,"abstract":"P4 is a language for expressing how packets are processed by the data-plane of a programmable network element such as a hardware or software switch, network interface card, router or network function appliance. This document describes the most recent version of the language, P416, and the reference implementation of the P416 compiler.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82054637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Abhishek K. Gupta, Richard P. Spillane, Wenguang Wang, Maxime Austruy, Vahid Fereydouny, C. Karamanolis
Thanks to the compelling economics of public cloud storage, the trend in the IT industry is to move the bulk of analytics and application data to services such as AWS S3 and Google Cloud Storage. At the same time, customers want to continue accessing and analyzing much of that data using applications that run on compute clusters that may reside either on public clouds or on-premise. For VMware customers, those clusters run vSphere (sometimes with vSAN) on-premise and in the future may utilize SDDCaaS. Cloud storage exhibits high latencies and it is not appropriate for direct use by applications. A key challenge for these use cases is determining the subset of the typically huge data sets that need to be moved into the primary storage tier of the compute clusters. This paper introduces a novel approach for creating a hybrid cloud storage that allows customers to utilize the fast primary storage of their compute clusters as a caching tier in front of a slow secondary storage tier. This approach can be completely transparent requiring no changes to the application. To achieve this, we extended VDFS [16], a POSIX-compliant scale-out filesystem, with the concept of caching-tier volumes. VDFS caching-tier volumes resemble regular file system volumes, but they fault-in data from a cloud storage back-end on first access. Cached data are persisted on fast primary storage, close to the compute cluster, like VMware's vSAN. Caching-tier volumes use a write-back approach. The enterprise features of the primary storage ensure the persistence and fault tolerance of new or updated data. Write-back from the primary to cloud storage is managed using an efficient change-tracking mechanism built into VDFS called exo-clones [18]. This paper outlines the architecture and implementation of caching tier volumes on VDFS and reports on an initial evaluation of the current prototype.
{"title":"Hybrid Cloud Storage: Bridging the Gap between Compute Clusters and Cloud Storage","authors":"Abhishek K. Gupta, Richard P. Spillane, Wenguang Wang, Maxime Austruy, Vahid Fereydouny, C. Karamanolis","doi":"10.1145/3139645.3139653","DOIUrl":"https://doi.org/10.1145/3139645.3139653","url":null,"abstract":"Thanks to the compelling economics of public cloud storage, the trend in the IT industry is to move the bulk of analytics and application data to services such as AWS S3 and Google Cloud Storage. At the same time, customers want to continue accessing and analyzing much of that data using applications that run on compute clusters that may reside either on public clouds or on-premise. For VMware customers, those clusters run vSphere (sometimes with vSAN) on-premise and in the future may utilize SDDCaaS. Cloud storage exhibits high latencies and it is not appropriate for direct use by applications. A key challenge for these use cases is determining the subset of the typically huge data sets that need to be moved into the primary storage tier of the compute clusters.\u0000 This paper introduces a novel approach for creating a hybrid cloud storage that allows customers to utilize the fast primary storage of their compute clusters as a caching tier in front of a slow secondary storage tier. This approach can be completely transparent requiring no changes to the application. To achieve this, we extended VDFS [16], a POSIX-compliant scale-out filesystem, with the concept of caching-tier volumes.\u0000 VDFS caching-tier volumes resemble regular file system volumes, but they fault-in data from a cloud storage back-end on first access. Cached data are persisted on fast primary storage, close to the compute cluster, like VMware's vSAN.\u0000 Caching-tier volumes use a write-back approach. The enterprise features of the primary storage ensure the persistence and fault tolerance of new or updated data. Write-back from the primary to cloud storage is managed using an efficient change-tracking mechanism built into VDFS called exo-clones [18].\u0000 This paper outlines the architecture and implementation of caching tier volumes on VDFS and reports on an initial evaluation of the current prototype.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85379914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The current pace of innovation in computing makes it difficult to assume a fixed set of requirements for the whole life span of a system. Aggressive technology scaling also imposes additional constraints to modern hardware platforms. An answer to this question are self-aware systems, which are capable of autonomously sensing and actuating upon themselves to cope with varying requirements. In this paper, we discuss the design and implementation of adaptive components in this scenario from the perspective of the OS. Components can exist in multiple avors that can by dynamically chosen according to current demands. The proposed framework supports this variability for components while preserving their interface contracts, even if avors exist in different domains (software, hardware, remote). The synthesis process delivers tailored wrapper for components according to their avors. Besides reconfiguration, we also support adaptations through dynamic power management and task remapping. The framework also supports component designers in terms of sensing via an event-based mechanism. The framework is validated through a case with three adaptive components in a telecommunication switch (AES, ADPCM, and DTMF) with little overhead both in terms of execution time and memory/silicon consumption.
{"title":"OS Support for Adaptive Components in Self-aware Systems","authors":"João Gabriel Reis, A. A. Fröhlich","doi":"10.1145/3139645.3139663","DOIUrl":"https://doi.org/10.1145/3139645.3139663","url":null,"abstract":"The current pace of innovation in computing makes it difficult to assume a fixed set of requirements for the whole life span of a system. Aggressive technology scaling also imposes additional constraints to modern hardware platforms. An answer to this question are self-aware systems, which are capable of autonomously sensing and actuating upon themselves to cope with varying requirements. In this paper, we discuss the design and implementation of adaptive components in this scenario from the perspective of the OS. Components can exist in multiple avors that can by dynamically chosen according to current demands. The proposed framework supports this variability for components while preserving their interface contracts, even if avors exist in different domains (software, hardware, remote). The synthesis process delivers tailored wrapper for components according to their avors. Besides reconfiguration, we also support adaptations through dynamic power management and task remapping. The framework also supports component designers in terms of sensing via an event-based mechanism. The framework is validated through a case with three adaptive components in a telecommunication switch (AES, ADPCM, and DTMF) with little overhead both in terms of execution time and memory/silicon consumption.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72627380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
VMware has its roots in the academic research community, starting with the commercialization of the work on x86 virtualization of Prof. Mendel Rosenblum and his team at Stanford University [1]. Developers embraced VMware's original workstation product and the ensuing work on server virtualization led to today's vSphere platform, which has enabled significant server consolidation, numerous operational benefits, and isolation-based security. In addition, the vast improvements in server utilization provide VMware's customers with significant cost savings and is a key contributor to the environmental sustainability of modern data centers [2]. VMware has remained true to its research roots, with a strong engineering culture that emphasizes grassroots innovation through hackathons, incubation projects, open source activities, seminars and RADIO, an annual R&D innovation offsite that brings together a substantial fraction of the company's developers. Just a few examples of current activities are open vSwitch (OVS), the virtualization and exploration of non-volatile memory (NVM), securing and managing the Internet of Things (IoT), and support for Containers. Over time, there has been a dramatic increase in the scope for innovation at VMware. This paper provides an overview of how that scope has grown and how it has expanded the range of relevant research opportunities along with a description of VMware's recently formed research group, including its mission, composition and significant research thrusts.
{"title":"Research at VMware","authors":"D. Tennenhouse","doi":"10.1145/3139645.3139647","DOIUrl":"https://doi.org/10.1145/3139645.3139647","url":null,"abstract":"VMware has its roots in the academic research community, starting with the commercialization of the work on x86 virtualization of Prof. Mendel Rosenblum and his team at Stanford University [1]. Developers embraced VMware's original workstation product and the ensuing work on server virtualization led to today's vSphere platform, which has enabled significant server consolidation, numerous operational benefits, and isolation-based security. In addition, the vast improvements in server utilization provide VMware's customers with significant cost savings and is a key contributor to the environmental sustainability of modern data centers [2].\u0000 VMware has remained true to its research roots, with a strong engineering culture that emphasizes grassroots innovation through hackathons, incubation projects, open source activities, seminars and RADIO, an annual R&D innovation offsite that brings together a substantial fraction of the company's developers. Just a few examples of current activities are open vSwitch (OVS), the virtualization and exploration of non-volatile memory (NVM), securing and managing the Internet of Things (IoT), and support for Containers.\u0000 Over time, there has been a dramatic increase in the scope for innovation at VMware. This paper provides an overview of how that scope has grown and how it has expanded the range of relevant research opportunities along with a description of VMware's recently formed research group, including its mission, composition and significant research thrusts.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76450268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Single-Root I/O Virtualization (SR-IOV) is a specification that allows a single PCI Express (PCIe) device (physical function or PF) to be used as multiple PCIe devices (virtual functions or VF). In a virtualization system, each VF can be directly assigned to a virtual machine (VM) in passthrough mode to significantly improve the network performance. However, VF passthrough mode is not compatible with live migration, which is an essential capability that enables many advanced virtualization features such as high availability and resource provisioning. To solve this problem, we design SRVM which provides hypervisor support to ensure the VF device can be correctly used by the migrated VM and the applications. SRVM is implemented in the hypervisor without modification in guest operating systems or guest VM drivers. SRVM does not increase VM downtime. It only costs limited resources (an extra CPU core only during the live migration pre-copy phase), and there is no significant runtime overhead in VM network performance.
{"title":"A Hypervisor Approach to Enable Live Migration with Passthrough SR-IOV Network Devices","authors":"Xin Xu, Bhavesh Davda","doi":"10.1145/3139645.3139649","DOIUrl":"https://doi.org/10.1145/3139645.3139649","url":null,"abstract":"Single-Root I/O Virtualization (SR-IOV) is a specification that allows a single PCI Express (PCIe) device (physical function or PF) to be used as multiple PCIe devices (virtual functions or VF). In a virtualization system, each VF can be directly assigned to a virtual machine (VM) in passthrough mode to significantly improve the network performance. However, VF passthrough mode is not compatible with live migration, which is an essential capability that enables many advanced virtualization features such as high availability and resource provisioning.\u0000 To solve this problem, we design SRVM which provides hypervisor support to ensure the VF device can be correctly used by the migrated VM and the applications. SRVM is implemented in the hypervisor without modification in guest operating systems or guest VM drivers. SRVM does not increase VM downtime. It only costs limited resources (an extra CPU core only during the live migration pre-copy phase), and there is no significant runtime overhead in VM network performance.","PeriodicalId":7046,"journal":{"name":"ACM SIGOPS Oper. Syst. Rev.","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2017-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79214209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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