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Proceedings. International Symposium on Computer Architecture最新文献

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Basic Sequential Circuits 基本顺序电路
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0006
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引用次数: 0
Instruction Set Architectures 指令集架构
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0010
S. Onder
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引用次数: 0
Memory Systems 内存系统
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0013
Steven Wright
The presented book we offer here is not kind of usual book. You know, reading now doesn't mean to handle the printed book in your hand. You can get the soft file of memory systems in your gadget. Well, we mean that the book that we proffer is the soft file of the book. The content and all things are same. The difference is only the forms of the book, whereas, this condition will precisely be profitable.
我们这里提供的书不是那种普通的书。你知道,现在的阅读并不意味着把印刷的书拿在手里。你可以在你的小工具中获取存储系统的软文件。我们的意思是我们提供的书是书的软文件。内容和所有东西都是一样的。不同的只是书的形式,然而,这种情况将恰恰是有利可图的。
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引用次数: 0
Advanced Computer Architecture Topics 高级计算机体系结构主题
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0015
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引用次数: 0
Combinational Modules of Medium Complexity 中等复杂度的组合模
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0004
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引用次数: 0
FRONT MATTER 前页
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_fmatter
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引用次数: 0
Digital Representation of Information 信息的数字化表示
Pub Date : 2018-08-15 DOI: 10.1142/9789813238343_0001
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引用次数: 1
The NYU ultracomputer—designing a MIMD, shared-memory parallel machine 纽约大学的超级计算机——设计一个MIMD,共享内存并行机
Pub Date : 2018-02-24 DOI: 10.1145/285930.285983
A. Gottlieb, R. Grishman, C. Kruskal, K. McAuliffe, L. Rudolph, M. Snir
The design for the NYU ultracomputer, a shared-memory MIMD parallel machine composed of thousands of autonomous processing elements is presented. This machine uses an enhanced message switching network with the geometry of an omega-network to approximate the ideal behaviour of Schwartz's paracomputer model of computation and to implement efficiently the important fetch-and-add synchronisation primitive. The hardware which would be required to build a 4096 processor system using 1990s technology is outlined. System software issues are discussed and analytic studies of the network performance are presented. A sample of efforts to implement and simulate parallel variants of important scientific programs is included. 37 references.
介绍了纽约大学超级计算机由数千个自主处理单元组成的共享内存MIMD并行机的设计。这台机器使用了一个增强的消息交换网络,具有欧米伽网络的几何形状,以近似施瓦茨的辅助计算机计算模型的理想行为,并有效地实现了重要的获取和添加同步原语。概述了采用20世纪90年代技术构建4096处理器系统所需的硬件。讨论了系统软件问题,并对网络性能进行了分析研究。本文还列举了一些实现和模拟重要科学项目并行变体的例子。37引用。
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引用次数: 86
Understanding and Optimizing Asynchronous Low-Precision Stochastic Gradient Descent. 异步低精度随机梯度下降的理解与优化。
Pub Date : 2017-06-01 DOI: 10.1145/3140659.3080248
Christopher De Sa, Matthew Feldman, Christopher Ré, Kunle Olukotun

Stochastic gradient descent (SGD) is one of the most popular numerical algorithms used in machine learning and other domains. Since this is likely to continue for the foreseeable future, it is important to study techniques that can make it run fast on parallel hardware. In this paper, we provide the first analysis of a technique called Buckwild! that uses both asynchronous execution and low-precision computation. We introduce the DMGC model, the first conceptualization of the parameter space that exists when implementing low-precision SGD, and show that it provides a way to both classify these algorithms and model their performance. We leverage this insight to propose and analyze techniques to improve the speed of low-precision SGD. First, we propose software optimizations that can increase throughput on existing CPUs by up to 11×. Second, we propose architectural changes, including a new cache technique we call an obstinate cache, that increase throughput beyond the limits of current-generation hardware. We also implement and analyze low-precision SGD on the FPGA, which is a promising alternative to the CPU for future SGD systems.

随机梯度下降(SGD)是机器学习和其他领域中最流行的数值算法之一。由于这种情况在可预见的未来可能会持续下去,因此研究能够使其在并行硬件上快速运行的技术非常重要。在本文中,我们首次分析了一种名为Buckwild!它使用异步执行和低精度计算。我们介绍了DMGC模型,这是实现低精度SGD时存在的参数空间的第一个概念化,并表明它提供了一种对这些算法进行分类和对其性能建模的方法。我们利用这种洞察力来提出和分析技术,以提高低精度SGD的速度。首先,我们提出可以将现有cpu的吞吐量提高11倍的软件优化。其次,我们提出了架构上的变化,包括一种新的缓存技术,我们称之为顽固缓存,它可以提高吞吐量,超出当前一代硬件的限制。我们还在FPGA上实现和分析了低精度SGD,这是未来SGD系统中CPU的一个有前途的替代方案。
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引用次数: 0
Enhancing CPU performance 增强CPU性能
Pub Date : 2016-11-25 DOI: 10.4324/9781315367118-4
J. Dumas
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引用次数: 0
期刊
Proceedings. International Symposium on Computer Architecture
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