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ICT systems security and privacy protection : 32nd IFIP TC 11 International Conference, SEC 2017, Rome, Italy, May 29-31, 2017, Proceedings. IFIP TC11 International Information Security Conference (32nd : 2017 : Rome, Italy)最新文献

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Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer 下一代SX-Aurora TSUBASA矢量超级计算机的性能评估
Keichi Takahashi, Soya Fujimoto, Satoru Nagase, Yoko Isobe, Yoichi Shimomura, Ryusuke Egawa, H. Takizawa
Data movement is a key bottleneck in terms of both performance and energy efficiency in modern HPC systems. The NEC SX-series supercomputers have a long history of accelerating memory-intensive HPC applications by providing sufficient memory bandwidth to applications. In this paper, we analyze the performance of a prototype SX-Aurora TSUBASA supercomputer equipped with the brand-new Vector Engine (VE30) processor. VE30 is the first major update to the Vector Engine processor series, and offers significantly improved memory access performance due to its renewed memory subsystem. Moreover, it introduces new instructions and incorporates architectural advancements tailored for accelerating memory-intensive applications. Using standard benchmarks, we demonstrate that VE30 considerably outperforms other processors in both performance and efficiency of memory-intensive applications. We also evaluate VE30 using applications including SPEChpc, and show that VE30 can run real-world applications with high performance. Finally, we discuss performance tuning techniques to obtain maximum performance from VE30.
在现代高性能计算系统中,数据移动是性能和能源效率的关键瓶颈。NEC sx系列超级计算机通过为应用程序提供足够的内存带宽,在加速内存密集型HPC应用方面有着悠久的历史。在本文中,我们分析了一个原型SX-Aurora TSUBASA超级计算机配备了全新的矢量引擎(VE30)处理器的性能。VE30是Vector Engine处理器系列的第一个重大更新,由于其更新的内存子系统,它提供了显着改进的内存访问性能。此外,它还引入了新的指令,并集成了为加速内存密集型应用程序而量身定制的架构改进。使用标准基准测试,我们证明了VE30在内存密集型应用程序的性能和效率方面都大大优于其他处理器。我们还使用包括SPEChpc在内的应用程序对VE30进行了评估,并表明VE30可以以高性能运行实际应用程序。最后,我们将讨论从VE30获得最大性能的性能调优技术。
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引用次数: 3
Allegro-Legato: Scalable, Fast, and Robust Neural-Network Quantum Molecular Dynamics via Sharpness-Aware Minimization 快板连奏:通过锐度感知最小化的可扩展、快速和鲁棒的神经网络量子分子动力学
Hikaru Ibayashi, Taufeq Mohammed Razakh, Liqiu Yang, Thomas M Linker, M. Olguin, Shinnosuke Hattori, Ye Luo, R. Kalia, A. Nakano, K. Nomura, P. Vashishta
Neural-network quantum molecular dynamics (NNQMD) simulations based on machine learning are revolutionizing atomistic simulations of materials by providing quantum-mechanical accuracy but orders-of-magnitude faster, illustrated by ACM Gordon Bell prize (2020) and finalist (2021). State-of-the-art (SOTA) NNQMD model founded on group theory featuring rotational equivariance and local descriptors has provided much higher accuracy and speed than those models, thus named Allegro (meaning fast). On massively parallel supercomputers, however, it suffers a fidelity-scaling problem, where growing number of unphysical predictions of interatomic forces prohibits simulations involving larger numbers of atoms for longer times. Here, we solve this problem by combining the Allegro model with sharpness aware minimization (SAM) for enhancing the robustness of model through improved smoothness of the loss landscape. The resulting Allegro-Legato (meaning fast and"smooth") model was shown to elongate the time-to-failure $t_textrm{failure}$, without sacrificing computational speed or accuracy. Specifically, Allegro-Legato exhibits much weaker dependence of timei-to-failure on the problem size, $t_{textrm{failure}} propto N^{-0.14}$ ($N$ is the number of atoms) compared to the SOTA Allegro model $left(t_{textrm{failure}} propto N^{-0.29}right)$, i.e., systematically delayed time-to-failure, thus allowing much larger and longer NNQMD simulations without failure. The model also exhibits excellent computational scalability and GPU acceleration on the Polaris supercomputer at Argonne Leadership Computing Facility. Such scalable, accurate, fast and robust NNQMD models will likely find broad applications in NNQMD simulations on emerging exaflop/s computers, with a specific example of accounting for nuclear quantum effects in the dynamics of ammonia.
基于机器学习的神经网络量子分子动力学(NNQMD)模拟通过提供量子力学精度但速度更快的数量级,正在彻底改变材料的原子模拟,ACM戈登贝尔奖(2020年)和决赛(2021年)说明了这一点。最先进的(SOTA) NNQMD模型建立在具有旋转等方差和局部描述符的群论基础上,提供了比这些模型更高的精度和速度,因此被命名为Allegro(意思是快)。然而,在大规模并行的超级计算机上,它遇到了保真度缩放问题,即越来越多的原子间相互作用的非物理预测,使得涉及更多原子的模拟无法长时间进行。为了解决这一问题,我们将Allegro模型与锐利感知最小化(锐利感知最小化)相结合,通过提高损失图像的平滑度来增强模型的鲁棒性。由此产生的Allegro-Legato(意思是快速和“平滑”)模型被证明可以延长失败时间$t_textrm{failure}$,而不会牺牲计算速度或准确性。具体来说,与SOTA Allegro模型$left(t_{textrm{failure}} propto N^{-0.29}right)$相比,Allegro- legato对问题大小$t_{textrm{failure}} propto N^{-0.14}$ ($N$是原子数)的依赖时间要弱得多,即系统地延迟了故障时间,从而允许更大更长的NNQMD模拟而不会失败。该模型在阿贡领导计算设施的北极星超级计算机上也表现出出色的计算可扩展性和GPU加速。这种可扩展的、准确的、快速的和健壮的NNQMD模型可能会在新兴的exaflop/s计算机上的NNQMD模拟中找到广泛的应用,其中一个具体的例子是在氨动力学中计算核量子效应。
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引用次数: 3
Porting numerical integration codes from CUDA to oneAPI: a case study 将数值积分代码从CUDA移植到oneAPI:一个案例研究
Ioannis Sakiotis, K. Arumugam, M. Paterno, D. Ranjan, B. Terzić, M. Zubair
We present our experience in porting optimized CUDA implementations to oneAPI. We focus on the use case of numerical integration, particularly the CUDA implementations of PAGANI and $m$-Cubes. We faced several challenges that caused performance degradation in the oneAPI ports. These include differences in utilized registers per thread, compiler optimizations, and mappings of CUDA library calls to oneAPI equivalents. After addressing those challenges, we tested both the PAGANI and m-Cubes integrators on numerous integrands of various characteristics. To evaluate the quality of the ports, we collected performance metrics of the CUDA and oneAPI implementations on the Nvidia V100 GPU. We found that the oneAPI ports often achieve comparable performance to the CUDA versions, and that they are at most 10% slower.
我们介绍了将优化的CUDA实现移植到oneAPI的经验。我们专注于数值积分的用例,特别是PAGANI和$m$-Cubes的CUDA实现。我们面临着导致oneAPI端口性能下降的几个挑战。这些差异包括每个线程使用的寄存器的差异,编译器优化,以及CUDA库调用到一个等效api的映射。在解决了这些挑战之后,我们在许多具有不同特征的积分器上测试了PAGANI和m-Cubes积分器。为了评估端口的质量,我们收集了Nvidia V100 GPU上CUDA和oneAPI实现的性能指标。我们发现oneAPI端口通常可以达到与CUDA版本相当的性能,并且它们最多要慢10%。
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引用次数: 1
Massively Parallel Genetic Optimization through Asynchronous Propagation of Populations 基于群体异步繁殖的大规模并行遗传优化
O. Taubert, Marie Weiel, D. Coquelin, Anis Farshian, C. Debus, A. Schug, Achim Streit, Markus Götz
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引用次数: 0
Analyzing Resource Utilization in an HPC System: A Case Study of NERSC Perlmutter 高性能计算系统中的资源利用分析:以NERSC Perlmutter为例
Jie Li, George Michelogiannakis, B. Cook, Dulanya Cooray, Yong Chen
Resource demands of HPC applications vary significantly. However, it is common for HPC systems to primarily assign resources on a per-node basis to prevent interference from co-located workloads. This gap between the coarse-grained resource allocation and the varying resource demands can lead to HPC resources being not fully utilized. In this study, we analyze the resource usage and application behavior of NERSC's Perlmutter, a state-of-the-art open-science HPC system with both CPU-only and GPU-accelerated nodes. Our one-month usage analysis reveals that CPUs are commonly not fully utilized, especially for GPU-enabled jobs. Also, around 64% of both CPU and GPU-enabled jobs used 50% or less of the available host memory capacity. Additionally, about 50% of GPU-enabled jobs used up to 25% of the GPU memory, and the memory capacity was not fully utilized in some ways for all jobs. While our study comes early in Perlmutter's lifetime thus policies and application workload may change, it provides valuable insights on performance characterization, application behavior, and motivates systems with more fine-grain resource allocation.
HPC应用的资源需求差异很大。然而,HPC系统通常主要在每个节点的基础上分配资源,以防止共定位工作负载的干扰。粗粒度资源分配和不同资源需求之间的这种差距可能导致HPC资源没有得到充分利用。在这项研究中,我们分析了NERSC的Perlmutter的资源使用和应用行为,Perlmutter是一个最先进的开放科学高性能计算系统,具有cpu和gpu加速节点。我们一个月的使用情况分析显示,cpu通常没有得到充分利用,特别是对于启用gpu的作业。此外,大约64%的启用CPU和gpu的作业使用了50%或更少的可用主机内存容量。此外,大约50%启用GPU的作业使用了高达25%的GPU内存,并且在某些方面,内存容量并没有被所有作业充分利用。虽然我们的研究是在Perlmutter的早期进行的,因此策略和应用程序工作负载可能会发生变化,但它提供了有关性能表征、应用程序行为的有价值的见解,并通过更细粒度的资源分配激励系统。
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引用次数: 0
Quantum Annealing vs. QAOA: 127 Qubit Higher-Order Ising Problems on NISQ Computers 量子退火与QAOA: NISQ计算机上的127量子位高阶Ising问题
Elijah Pelofske, Andreas Bärtschi, S. Eidenbenz
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引用次数: 20
CPU Architecture Modelling and Co-design CPU架构建模与协同设计
Bine Brank, D. Pleiter
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引用次数: 0
Overcoming Weak Scaling Challenges in Tree-Based Nearest Neighbor Time Series Mining 克服基于树的最近邻时间序列挖掘中的弱尺度挑战
Amir Raoofy, Roman Karlstetter, Martin Schreiber, C. Trinitis, Martin Schulz
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引用次数: 0
Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline 基于fpga的浅水DG仿真:一种新型代码生成管道的设计与比较
C. Alt, Tobias Kenter, S. Faghih-Naini, Jennifer Faj, Jan-Oliver Opdenhövel, Christian Plessl, V. Aizinger, Jan Hönig, H. Köstler
{"title":"Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline","authors":"C. Alt, Tobias Kenter, S. Faghih-Naini, Jennifer Faj, Jan-Oliver Opdenhövel, Christian Plessl, V. Aizinger, Jan Hönig, H. Köstler","doi":"10.1007/978-3-031-32041-5_5","DOIUrl":"https://doi.org/10.1007/978-3-031-32041-5_5","url":null,"abstract":"","PeriodicalId":92039,"journal":{"name":"ICT systems security and privacy protection : 32nd IFIP TC 11 International Conference, SEC 2017, Rome, Italy, May 29-31, 2017, Proceedings. IFIP TC11 International Information Security Conference (32nd : 2017 : Rome, Italy)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86146015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Steering Customized AI Architectures for HPC Scientific Applications 为HPC科学应用提供定制的AI架构
H. Ltaief, Yuxi Hong, A. Dabah, Rabab Alomairy, Sameh Abdulah, Chris Goreczny, P. Gepner, M. Ravasi, D. Gratadour, D. Keyes
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引用次数: 1
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ICT systems security and privacy protection : 32nd IFIP TC 11 International Conference, SEC 2017, Rome, Italy, May 29-31, 2017, Proceedings. IFIP TC11 International Information Security Conference (32nd : 2017 : Rome, Italy)
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