Rapid advances in microelectronic technologies increasingly require microsystem designers to be also system architects. At the same time architecting systems for submicron technologies can no longer be done in isolation from technology limitations and capabilities. To train future engineers, an effective integration of design technology and architecture is needed at a time when additional demands are being placed due to expanded offering in software/web-centric courses. In this paper, we discuss how this integration can be achieved by teaching microsystem organization and architecture that brings together existing courses in VLSI, CAD and Computer Architectures into a coherent theme.
{"title":"Curricular integration for next generation in microsystem design education","authors":"Rajesh K. Gupta","doi":"10.1109/MSE.1997.612562","DOIUrl":"https://doi.org/10.1109/MSE.1997.612562","url":null,"abstract":"Rapid advances in microelectronic technologies increasingly require microsystem designers to be also system architects. At the same time architecting systems for submicron technologies can no longer be done in isolation from technology limitations and capabilities. To train future engineers, an effective integration of design technology and architecture is needed at a time when additional demands are being placed due to expanded offering in software/web-centric courses. In this paper, we discuss how this integration can be achieved by teaching microsystem organization and architecture that brings together existing courses in VLSI, CAD and Computer Architectures into a coherent theme.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121164026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The use of CAE tools in digital logic and computer circuit design is growing in importance in two separate but closely related areas: first, by allowing the design team to bring new products to market faster, and second, to provide the tools needed to cope with the complexity and density of the integrated circuits used in the products. This paper describes our experiences in commercial quality CAE tools from Xilinx and Altera into our computer engineering courses. These tools include schematic entry and digital analysis in our logic circuits course, and the use of VHDL simulation and synthesis, and place and route tools for PLD and FPGAs in the VLSI and microprocessor courses.
{"title":"Integrating CAE tools into computer engineering courses","authors":"R. J. Duckworth","doi":"10.1109/MSE.1997.612527","DOIUrl":"https://doi.org/10.1109/MSE.1997.612527","url":null,"abstract":"The use of CAE tools in digital logic and computer circuit design is growing in importance in two separate but closely related areas: first, by allowing the design team to bring new products to market faster, and second, to provide the tools needed to cope with the complexity and density of the integrated circuits used in the products. This paper describes our experiences in commercial quality CAE tools from Xilinx and Altera into our computer engineering courses. These tools include schematic entry and digital analysis in our logic circuits course, and the use of VHDL simulation and synthesis, and place and route tools for PLD and FPGAs in the VLSI and microprocessor courses.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126532898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A Rapid System Prototyping course was developed in the Penn State EE Department under the auspices of our Electronics Manufacturing pilot project. Our course emphasizes design methodology, techniques, and practical prototyping tradeoffs (design time-cost-speed-power-area) as applied to the entire electronic system design hierarchy (system-module-chip circuit). A major goal of the class is to provide senior and entry graduate students experience with a design experience using a range of techniques and methodologies for rapid prototyping of electronic systems. The course was facilitated by extensive use of WWW resources; all course "handouts", tutorials, homework assignments, and reference materials were provided to students on the CEDCC Web server.
{"title":"A WWW facilitated rapid system prototyping class","authors":"D. Landis, P. T. Hulina","doi":"10.1109/MSE.1997.612565","DOIUrl":"https://doi.org/10.1109/MSE.1997.612565","url":null,"abstract":"A Rapid System Prototyping course was developed in the Penn State EE Department under the auspices of our Electronics Manufacturing pilot project. Our course emphasizes design methodology, techniques, and practical prototyping tradeoffs (design time-cost-speed-power-area) as applied to the entire electronic system design hierarchy (system-module-chip circuit). A major goal of the class is to provide senior and entry graduate students experience with a design experience using a range of techniques and methodologies for rapid prototyping of electronic systems. The course was facilitated by extensive use of WWW resources; all course \"handouts\", tutorials, homework assignments, and reference materials were provided to students on the CEDCC Web server.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129357077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
With the advance in Computer-Aided Design (CAD) technology, digital design in VLSI has moved from the bottom-up design approach to top-down design methodology with the aid of advanced Electronic Design Automation (EDA) tools. The most common design platform is one in which the tools make use of VHDL as the design medium. It has become the standard approach for designing digital circuit/systems. However, mastering VHDL for design is not as simple as it seems, in that it is simply high level programming to mimic the design hardware, even for experienced designer. An interactive learning tool with the capability of conducting experiments concurrently is proposed to enhance the teaching quality and provide ample training for students in learning VHDL.
{"title":"Interactive learning toolbox for logic synthesis with VHDL","authors":"Angus K. M. Wu","doi":"10.1109/MSE.1997.612555","DOIUrl":"https://doi.org/10.1109/MSE.1997.612555","url":null,"abstract":"With the advance in Computer-Aided Design (CAD) technology, digital design in VLSI has moved from the bottom-up design approach to top-down design methodology with the aid of advanced Electronic Design Automation (EDA) tools. The most common design platform is one in which the tools make use of VHDL as the design medium. It has become the standard approach for designing digital circuit/systems. However, mastering VHDL for design is not as simple as it seems, in that it is simply high level programming to mimic the design hardware, even for experienced designer. An interactive learning tool with the capability of conducting experiments concurrently is proposed to enhance the teaching quality and provide ample training for students in learning VHDL.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131115510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes the Advanced Computer Design Course at the University of Virginia which teaches senior level Computer Engineering majors the art of computer system design using modem virtual prototyping techniques. The students develop an architecture to implement a small 8 bit microprocessor with 32 instructions and then actually implement it in real hardware using Field Programmable Gate Arrays (FPGAs).
{"title":"An undergraduate advanced computer design course using virtual-prototyping","authors":"R. Klenke, J. Aylor","doi":"10.1109/MSE.1997.612548","DOIUrl":"https://doi.org/10.1109/MSE.1997.612548","url":null,"abstract":"This paper describes the Advanced Computer Design Course at the University of Virginia which teaches senior level Computer Engineering majors the art of computer system design using modem virtual prototyping techniques. The students develop an architecture to implement a small 8 bit microprocessor with 32 instructions and then actually implement it in real hardware using Field Programmable Gate Arrays (FPGAs).","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115556782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. Haworth, Alan J. Ross, A. Gundlach, J. Robertson
We describe the first set of chips to be designed and manufactured with the specific objective of use in an education environment. The chips are the result of a collaboration between educators and industry and introduce students to complex microelectronics technology by presenting simple building blocks fabricated using standard semiconductor manufacturing techniques. Current usage indicates that the chips are a valuable resource in microelectronics education.
{"title":"Semiconductor teaching chips","authors":"L. Haworth, Alan J. Ross, A. Gundlach, J. Robertson","doi":"10.1109/MSE.1997.612529","DOIUrl":"https://doi.org/10.1109/MSE.1997.612529","url":null,"abstract":"We describe the first set of chips to be designed and manufactured with the specific objective of use in an education environment. The chips are the result of a collaboration between educators and industry and introduce students to complex microelectronics technology by presenting simple building blocks fabricated using standard semiconductor manufacturing techniques. Current usage indicates that the chips are a valuable resource in microelectronics education.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120858212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes a VHDL based rapid prototyping approach to simulate, synthesize, and implement a prototype computer system using commercial CAD tools, a meta assembler, a retargetable C compiler, and FPGAs in a hardware emulator. This methodology is utilized in a senior design laboratory sequence of two required courses for computer engineering students at Georgia Tech.
{"title":"Using synthesis, simulation, and hardware emulation to prototype a pipelined RISC computer system","authors":"J. O. Hamblen","doi":"10.1109/MSE.1997.612580","DOIUrl":"https://doi.org/10.1109/MSE.1997.612580","url":null,"abstract":"This paper describes a VHDL based rapid prototyping approach to simulate, synthesize, and implement a prototype computer system using commercial CAD tools, a meta assembler, a retargetable C compiler, and FPGAs in a hardware emulator. This methodology is utilized in a senior design laboratory sequence of two required courses for computer engineering students at Georgia Tech.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116054751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Using structured design techniques borrowed from software programming, beginning circuit designers at the University of Cincinnati consistently create correct, working chips containing several thousand gates. Careful choice of topics and easy-to-use tools allow consideration of physical behaviour and optimization techniques and also prepare students for more advanced study of circuit design. Chip testing is accomplished with user-friendly software and hardware created locally by a group of M.S. Students. Initially targeting CMOS tiny chip designs, course materials have recently been modified for programmable logic devices (PLDs). Immediate testability of PLDs provides better feedback, and the associated design tools support high-level hardware description languages (HDLs). This also makes multi-chip student projects feasible.
辛辛那提大学(University of Cincinnati)的初级电路设计师利用借鉴于软件编程的结构化设计技术，不断地创造出包含数千个门的正确的工作芯片。精心选择的主题和易于使用的工具允许考虑物理行为和优化技术，也为学生准备更高级的电路设计研究。芯片测试是由一群M.S.学生在本地创建的用户友好的软件和硬件完成的。最初的目标是CMOS微型芯片设计，课程材料最近已修改为可编程逻辑器件(pld)。pld的即时可测试性提供了更好的反馈，相关的设计工具支持高级硬件描述语言(hdl)。这也使得多芯片学生项目变得可行。
{"title":"Significant microelectronics systems design experience for a heterogeneous class of CS, CE, and EE students","authors":"C. Purdy","doi":"10.1109/MSE.1997.612586","DOIUrl":"https://doi.org/10.1109/MSE.1997.612586","url":null,"abstract":"Using structured design techniques borrowed from software programming, beginning circuit designers at the University of Cincinnati consistently create correct, working chips containing several thousand gates. Careful choice of topics and easy-to-use tools allow consideration of physical behaviour and optimization techniques and also prepare students for more advanced study of circuit design. Chip testing is accomplished with user-friendly software and hardware created locally by a group of M.S. Students. Initially targeting CMOS tiny chip designs, course materials have recently been modified for programmable logic devices (PLDs). Immediate testability of PLDs provides better feedback, and the associated design tools support high-level hardware description languages (HDLs). This also makes multi-chip student projects feasible.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122567191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The paper describes a multidisciplinary, systems building course at Carnegie Mellon University. Over the last eight semesters that the course has been taught, teams of undergraduate and graduate students have designed and fabricated seven new generations of wearable computers, using an evolving artifact- specific, multidisciplinary design methodology. Between the first and last generation, the electronic functionality has increased by a factor of three, the number of mechanical features has increased by a factor of 10, and the software complexity has increased by a factor of 25 while the total design effort measured in hours has increased by less than a factor of two.
{"title":"A multidisciplinary course in rapid prototyping of wearable computers","authors":"D. Siewiorek, A. Smailagic","doi":"10.1109/MSE.1997.612587","DOIUrl":"https://doi.org/10.1109/MSE.1997.612587","url":null,"abstract":"The paper describes a multidisciplinary, systems building course at Carnegie Mellon University. Over the last eight semesters that the course has been taught, teams of undergraduate and graduate students have designed and fabricated seven new generations of wearable computers, using an evolving artifact- specific, multidisciplinary design methodology. Between the first and last generation, the electronic functionality has increased by a factor of three, the number of mechanical features has increased by a factor of 10, and the software complexity has increased by a factor of 25 while the total design effort measured in hours has increased by less than a factor of two.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125315126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Kapadia, Mark S. Lundstrom, J. Fortes, Kaushik Roy
This paper reports on a prototype, network-based virtual laboratory that allows geographically distributed users to share and run existing tools via standard web browsers ("http://www.ecn.purdue.edu/labs/punch"). The software infrastructure for the virtual laboratory is described, and ongoing applications of this infrastructure to microelectronics systems design and education are discussed.
{"title":"Network-based simulation laboratories for microelectronics systems design and education","authors":"N. Kapadia, Mark S. Lundstrom, J. Fortes, Kaushik Roy","doi":"10.1109/MSE.1997.612531","DOIUrl":"https://doi.org/10.1109/MSE.1997.612531","url":null,"abstract":"This paper reports on a prototype, network-based virtual laboratory that allows geographically distributed users to share and run existing tools via standard web browsers (\"http://www.ecn.purdue.edu/labs/punch\"). The software infrastructure for the virtual laboratory is described, and ongoing applications of this infrastructure to microelectronics systems design and education are discussed.","PeriodicalId":120048,"journal":{"name":"Proceedings of International Conference on Microelectronic Systems Education","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1997-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125759276","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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