In the last decade the Moving Target Defense (MTD) has gained popularity as a new cyber security defense paradigm. Moving Target Defense (MTD) intends to change the (presumable) information asymmetry between attacker and defender in favor of the defender by constantly changing a network's appearance as to invalidate previously acquired information. Many papers discussing MTD have been proposed and in recent years MTD techniques for a wide range of applications in enterprise networks, Cloud environments, IoT, automotive CAN buses and smart grids have been proposed. In these papers, MTD is often introduced as a "game changer" and explained with help of nice figurative analogies. Yet, how useful are these repeated changes really to deter the attacker? And even more importantly, could it not be that there are downsides to the constant changes that, ultimately, degrade security? In this position paper we argue that one needs to have a more critical and open minded view on MTD. There are MTD techniques that improve security. But we also provide several examples where they reduce security or where movement does not matter at all and is only introduced as to label a given technique as MTD.
{"title":"A critical view on moving target defense and its analogies","authors":"Alexander Bajic, G. Becker","doi":"10.1145/3387902.3397225","DOIUrl":"https://doi.org/10.1145/3387902.3397225","url":null,"abstract":"In the last decade the Moving Target Defense (MTD) has gained popularity as a new cyber security defense paradigm. Moving Target Defense (MTD) intends to change the (presumable) information asymmetry between attacker and defender in favor of the defender by constantly changing a network's appearance as to invalidate previously acquired information. Many papers discussing MTD have been proposed and in recent years MTD techniques for a wide range of applications in enterprise networks, Cloud environments, IoT, automotive CAN buses and smart grids have been proposed. In these papers, MTD is often introduced as a \"game changer\" and explained with help of nice figurative analogies. Yet, how useful are these repeated changes really to deter the attacker? And even more importantly, could it not be that there are downsides to the constant changes that, ultimately, degrade security? In this position paper we argue that one needs to have a more critical and open minded view on MTD. There are MTD techniques that improve security. But we also provide several examples where they reduce security or where movement does not matter at all and is only introduced as to label a given technique as MTD.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"45 2-3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114132045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Quantum annealing computers are designed to produce high-quality solutions to optimization problems that can be formulated as quadratic unconstrained binary optimization (QUBO) problems. While most of the well known NP-hard problems can easily be represented as quadratic binary problems, such formulations usually contain constraints that have to be added as penalties to the objective function in order to obtain QUBOs. In this paper, we propose a method based on finite automaton representation of the constraints for generating penalty implementations for them, which uses fewer qubits than the alternatives and is general enough to be applied to a whole class of constraints.
{"title":"Automaton-based methodology for implementing optimization constraints for quantum annealing","authors":"H. Djidjev","doi":"10.1145/3387902.3392619","DOIUrl":"https://doi.org/10.1145/3387902.3392619","url":null,"abstract":"Quantum annealing computers are designed to produce high-quality solutions to optimization problems that can be formulated as quadratic unconstrained binary optimization (QUBO) problems. While most of the well known NP-hard problems can easily be represented as quadratic binary problems, such formulations usually contain constraints that have to be added as penalties to the objective function in order to obtain QUBOs. In this paper, we propose a method based on finite automaton representation of the constraints for generating penalty implementations for them, which uses fewer qubits than the alternatives and is general enough to be applied to a whole class of constraints.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117073380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Proceedings of the 17th ACM International Conference on Computing Frontiers","authors":"","doi":"10.1145/3387902","DOIUrl":"https://doi.org/10.1145/3387902","url":null,"abstract":"","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123956689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Meichen Liu, Meimei Li, Degang Sun, Zhixin Shi, Bin Lv, Pengcheng Liu
Recently, high profile data breach incidents have highlighted the importance of insider Intellectual Property(IP) theft research. Matching the patterns of known attack (filtering-based or rule-based) and finding the deviation from normal behavior (anomaly-based) are two typical approaches to prevent insiders from stealing sensitive information. On the one hand, filtering-based or rule-based solutions provide accurate identification of known attacks, and thus they are suitable for IP theft prevention, but they cannot handle the insiders with in-depth knowledge of the protective measures. On the other hand, anomaly-based solutions can find unknown attacks but typically have a high false-positive rate, which limits their applicability to practice. Nowadays, more and more researchers believe that the insider attack could be improved when combining known attack pattern matching with anomaly detection technologies. Therefore, in this paper, we introduce a Data-level Hybrid Framework, dubbed as Terminator, which enabling both detection and prevention. Terminator integrates a prevention module with an anomaly detection module and uses feedback to improve the module for detection or prevention. Different from previous anomaly-based methods that could only detect anomalous activities, Terminator could detect the stealing actions proactively and take real-time actions on these actions. The effectiveness of Terminator is demonstrated by its excellent performances on a collected dataset, involving detailed information in a real-world insider network and attack data simulated by impersonating the genuine users.
{"title":"Terminator: a data-level hybrid framework for intellectual property theft detection and prevention","authors":"Meichen Liu, Meimei Li, Degang Sun, Zhixin Shi, Bin Lv, Pengcheng Liu","doi":"10.1145/3387902.3392329","DOIUrl":"https://doi.org/10.1145/3387902.3392329","url":null,"abstract":"Recently, high profile data breach incidents have highlighted the importance of insider Intellectual Property(IP) theft research. Matching the patterns of known attack (filtering-based or rule-based) and finding the deviation from normal behavior (anomaly-based) are two typical approaches to prevent insiders from stealing sensitive information. On the one hand, filtering-based or rule-based solutions provide accurate identification of known attacks, and thus they are suitable for IP theft prevention, but they cannot handle the insiders with in-depth knowledge of the protective measures. On the other hand, anomaly-based solutions can find unknown attacks but typically have a high false-positive rate, which limits their applicability to practice. Nowadays, more and more researchers believe that the insider attack could be improved when combining known attack pattern matching with anomaly detection technologies. Therefore, in this paper, we introduce a Data-level Hybrid Framework, dubbed as Terminator, which enabling both detection and prevention. Terminator integrates a prevention module with an anomaly detection module and uses feedback to improve the module for detection or prevention. Different from previous anomaly-based methods that could only detect anomalous activities, Terminator could detect the stealing actions proactively and take real-time actions on these actions. The effectiveness of Terminator is demonstrated by its excellent performances on a collected dataset, involving detailed information in a real-world insider network and attack data simulated by impersonating the genuine users.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124033956","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. S. D. Araújo, L. A. J. Marzulo, Tiago A. O. Alves, F. França, I. Koren, S. Kundu
Dynamic Information Flow Tracking has been successfully used to prevent a wide range of attacks and detect illegal access to sensitive information. Most proposed solutions only track the explicit information flow where the taint is propagated through data dependencies. However, recent evasion attacks exploit implicit flows, that use control flow in the application, to manipulate the data thus making the malicious activity undetectable. We propose NIFT - a nested implicit flow tracking mechanism that extends explicit propagation to instructions affected by a control dependency. Our technique generates taint instructions at compile time which are executed by specialized hardware to propagate taint implicitly even in cases of deeply-nested branches. In addition, we propose a restricted taint propagation for data executed in conditional branches that affects only immediate instructions instead of all instructions inside the branch scope. Our technique efficiently locates implicit flows and resolves them with negligible performance overhead. Moreover, it mitigates the over-tainting problem.
{"title":"Building a portable deeply-nested implicit information flow tracking","authors":"L. S. D. Araújo, L. A. J. Marzulo, Tiago A. O. Alves, F. França, I. Koren, S. Kundu","doi":"10.1145/3387902.3392614","DOIUrl":"https://doi.org/10.1145/3387902.3392614","url":null,"abstract":"Dynamic Information Flow Tracking has been successfully used to prevent a wide range of attacks and detect illegal access to sensitive information. Most proposed solutions only track the explicit information flow where the taint is propagated through data dependencies. However, recent evasion attacks exploit implicit flows, that use control flow in the application, to manipulate the data thus making the malicious activity undetectable. We propose NIFT - a nested implicit flow tracking mechanism that extends explicit propagation to instructions affected by a control dependency. Our technique generates taint instructions at compile time which are executed by specialized hardware to propagate taint implicitly even in cases of deeply-nested branches. In addition, we propose a restricted taint propagation for data executed in conditional branches that affects only immediate instructions instead of all instructions inside the branch scope. Our technique efficiently locates implicit flows and resolves them with negligible performance overhead. Moreover, it mitigates the over-tainting problem.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132170660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nasos Grigoropoulos, Manos Koutsoubelias, S. Lalis
Autonomous unmanned vehicles can support a wide range of missions, which are typically coordinated by a human operator. Automating these missions through a computer program can offer great advantages, but at the same time introduces several challenges. In particular, it becomes important to tolerate failures of the mission controller, including the most general type, namely Byzantine failures. To address this challenge, we propose an active replication approach adapted to the characteristics of this particular type of system. Our solution relies on signed messages and requires N = 2 × f + 1 mission controller replicas to tolerate f Byzantine failures. We describe the system model and the mechanisms that need to be in place to achieve the desired functionality, and argue about the correctness of the proposed approach in an informal way. Also, we evaluate the overheads of a prototype implementation through indicative simulation experiments.
自主无人驾驶车辆可以支持广泛的任务，这些任务通常由人类操作员协调。通过计算机程序自动化这些任务可以提供巨大的优势，但同时也带来了一些挑战。特别是，容忍任务控制器的故障变得非常重要，包括最常见的类型，即拜占庭故障。为了应对这一挑战，我们提出了一种适应这种特定类型系统特征的主动复制方法。我们的解决方案依赖于签名消息，需要N = 2 × f + 1个任务控制器副本来容忍f个拜占庭故障。我们描述了系统模型和实现所需功能所需的机制，并以一种非正式的方式讨论了所建议方法的正确性。此外，我们通过指示性仿真实验来评估原型实现的开销。
{"title":"Byzantine fault tolerance for centrally coordinated missions with unmanned vehicles","authors":"Nasos Grigoropoulos, Manos Koutsoubelias, S. Lalis","doi":"10.1145/3387902.3392622","DOIUrl":"https://doi.org/10.1145/3387902.3392622","url":null,"abstract":"Autonomous unmanned vehicles can support a wide range of missions, which are typically coordinated by a human operator. Automating these missions through a computer program can offer great advantages, but at the same time introduces several challenges. In particular, it becomes important to tolerate failures of the mission controller, including the most general type, namely Byzantine failures. To address this challenge, we propose an active replication approach adapted to the characteristics of this particular type of system. Our solution relies on signed messages and requires N = 2 × f + 1 mission controller replicas to tolerate f Byzantine failures. We describe the system model and the mechanisms that need to be in place to achieve the desired functionality, and argue about the correctness of the proposed approach in an informal way. Also, we evaluate the overheads of a prototype implementation through indicative simulation experiments.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"103 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123296064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Stefan Groth, D. Grünewald, J. Teich, Frank Hannig
With approaching exascale performance, applications in the domain of high-performance computing (HPC) have to scale to an ever-increasing amount of compute nodes. The Global Address Space Programming Interface (GASPI) communication API promises to handle this challenge by providing a highly flexible and efficient programming model in a partitioned global address space (PGAS). Suitable applications targeting supercomputers include the domain of mesh-based solvers for partial differential equations (PDEs) due to their high computational intensity. The implementation of such solvers is highly interdisciplinary, which therefore requires an abstraction of hardware-specific parallelization techniques from developing numerical algorithms. We present an open-source run-time system (RTS) that distributes and parallelizes device-agnostic kernels, which define algorithms on unstructured grids. We describe how the RTS abstracts common parts of iterative solvers and further explain how to parallelize and distribute these components. We further show the efficiency of our approach for several microbenchmarks and an implementation of the discontinuous Galerkin method (DGM). The results show that we can almost completely hide all synchronization overhead and that the RTS only imposes a small computational cost.
{"title":"A runtime system for finite element methods in a partitioned global address space","authors":"Stefan Groth, D. Grünewald, J. Teich, Frank Hannig","doi":"10.1145/3387902.3392628","DOIUrl":"https://doi.org/10.1145/3387902.3392628","url":null,"abstract":"With approaching exascale performance, applications in the domain of high-performance computing (HPC) have to scale to an ever-increasing amount of compute nodes. The Global Address Space Programming Interface (GASPI) communication API promises to handle this challenge by providing a highly flexible and efficient programming model in a partitioned global address space (PGAS). Suitable applications targeting supercomputers include the domain of mesh-based solvers for partial differential equations (PDEs) due to their high computational intensity. The implementation of such solvers is highly interdisciplinary, which therefore requires an abstraction of hardware-specific parallelization techniques from developing numerical algorithms. We present an open-source run-time system (RTS) that distributes and parallelizes device-agnostic kernels, which define algorithms on unstructured grids. We describe how the RTS abstracts common parts of iterative solvers and further explain how to parallelize and distribute these components. We further show the efficiency of our approach for several microbenchmarks and an implementation of the discontinuous Galerkin method (DGM). The results show that we can almost completely hide all synchronization overhead and that the RTS only imposes a small computational cost.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121474942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Interest in quantum computing is rapidly growing in the scientific community as such technology could be the key to enable intensive use of machine learning and big data algorithms. Quantum computers can be conceived from basic photonic elements, such as Mach-Zehnder interferometers (MZI), but they still need control mechanisms and sensing elements from traditional VLSI technology. In this study, we present an ongoing study on a potential architecture for these basic photonic circuits. We realized two Photonic Integrated Circuit (PIC) test structures embedding metallic thermistors as phase shifters and silicon photodiodes as output detectors. We present a complete characterization of the phase shifter elements for an effective on-chip PIC interaction. To induce a consistent phase shift still retaining coherence of light, we act on the phase-shifters by means of a closed-loop control. By controlling through Pulse-Width Modulation the phase shifters, we drive the path of photons accurately in the PIC, demonstrating the effectiveness of the proposed configuration for the management of a photonic chip.
{"title":"Analysis of control and sensing interfaces in a photonic integrated chip solution for quantum computing","authors":"Luca Gemma, M. Bernard, M. Ghulinyan, D. Brunelli","doi":"10.1145/3387902.3394034","DOIUrl":"https://doi.org/10.1145/3387902.3394034","url":null,"abstract":"Interest in quantum computing is rapidly growing in the scientific community as such technology could be the key to enable intensive use of machine learning and big data algorithms. Quantum computers can be conceived from basic photonic elements, such as Mach-Zehnder interferometers (MZI), but they still need control mechanisms and sensing elements from traditional VLSI technology. In this study, we present an ongoing study on a potential architecture for these basic photonic circuits. We realized two Photonic Integrated Circuit (PIC) test structures embedding metallic thermistors as phase shifters and silicon photodiodes as output detectors. We present a complete characterization of the phase shifter elements for an effective on-chip PIC interaction. To induce a consistent phase shift still retaining coherence of light, we act on the phase-shifters by means of a closed-loop control. By controlling through Pulse-Width Modulation the phase shifters, we drive the path of photons accurately in the PIC, demonstrating the effectiveness of the proposed configuration for the management of a photonic chip.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123809104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
High performance lossless data compression is an emerged technology that enhances fast and effective data processing such as for communication and for storage applications. The recent devices generate continuous data flow at high rate, that is very fast stream data. Therefore, an elegant hardware-based compression technology is demanded. This paper proposes a lossless data compression called ASE coding. It encodes stream data by applying entropy coding approach. The encoding mechanism works as a lossless data compression. ASE coding instantly assigns the fewest bits to the corresponding compressed data according to the number of occupied entries in a look-up table. This paper shows the performance evaluations to promise ASE coding adaptively shrinks stream data and works on small hardware resources without stalling or buffering.
{"title":"Adaptive entropy coding method for stream-based lossless data compression","authors":"S. Yamagiwa, Eisaku Hayakawa, Koichi Marumo","doi":"10.1145/3387902.3394037","DOIUrl":"https://doi.org/10.1145/3387902.3394037","url":null,"abstract":"High performance lossless data compression is an emerged technology that enhances fast and effective data processing such as for communication and for storage applications. The recent devices generate continuous data flow at high rate, that is very fast stream data. Therefore, an elegant hardware-based compression technology is demanded. This paper proposes a lossless data compression called ASE coding. It encodes stream data by applying entropy coding approach. The encoding mechanism works as a lossless data compression. ASE coding instantly assigns the fewest bits to the corresponding compressed data according to the number of occupied entries in a look-up table. This paper shows the performance evaluations to promise ASE coding adaptively shrinks stream data and works on small hardware resources without stalling or buffering.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122417332","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Approximate accelerators for throughput-demanding error-resilient kernels can be a solution to meet design requirements with acceptable deviation from the exact implementation. However, handcrafting approximate accelerators may impose prohibitive development time and cost overheads. In this scenario, approximate High-Level Synthesis (HLS) has been proposed to deal with the increased design complexity. Nevertheless, current tools are not suitable for exploring throughput optimizations, being instead constrained to perform specific improvements on area, power, and average performance. In this work, we propose the use of HLS to generate Pareto-optimal accelerators for applications facing throughput constraints. We present an approximate HLS tool able to improve the throughput of such accelerators by up to 80% with no additional area costs, while introducing manageable error for most applications.
{"title":"High-level synthesis of throughput-optimized and energy-efficient approximate designs","authors":"Marcos T. Leipnitz, G. Nazar","doi":"10.1145/3387902.3394039","DOIUrl":"https://doi.org/10.1145/3387902.3394039","url":null,"abstract":"Approximate accelerators for throughput-demanding error-resilient kernels can be a solution to meet design requirements with acceptable deviation from the exact implementation. However, handcrafting approximate accelerators may impose prohibitive development time and cost overheads. In this scenario, approximate High-Level Synthesis (HLS) has been proposed to deal with the increased design complexity. Nevertheless, current tools are not suitable for exploring throughput optimizations, being instead constrained to perform specific improvements on area, power, and average performance. In this work, we propose the use of HLS to generate Pareto-optimal accelerators for applications facing throughput constraints. We present an approximate HLS tool able to improve the throughput of such accelerators by up to 80% with no additional area costs, while introducing manageable error for most applications.","PeriodicalId":155089,"journal":{"name":"Proceedings of the 17th ACM International Conference on Computing Frontiers","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121864236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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