Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716598
N. Telagam, S. Lakshmi, K. Nehru
In this paper, we propose a peak to average power ratio (PAPR) reduction scheme for generalised frequency-division multiplexing (GFDM) systems based on parallel concatenation of low-density parity-check codes (PC-LDPC) codes. The proposed scheme maps the PC-LDPC codewords onto subcarriers to construct a symbol of channel coded GFDM. Then, these sub symbols are combined with subcarriers to form symbols, and these symbols are applied to the PAPR expression of the GFDM system for calculation. The BER value is higher at 10dB for the RRC filter-based GFDM system than the RC filter. The RC filter configuration has less BER at 10dB in 0.2 roll-off factor value with 100 iterations and 200 iterations in soft decision algorithm. When the value of Complementary Cumulative Distribution Function (CCDF) =0.001, the PC-LDPC GFDM system reduces the PAPR by 4 to 4.5 dB compared to the uncoded GFDM signal. The coding gain of 0.5dB is observed in Raised cosine pulse shaping filter with PC-LDPC codes.
{"title":"PAPR reduction of GFDM system using Parallel concatenation of LDPC codes","authors":"N. Telagam, S. Lakshmi, K. Nehru","doi":"10.1109/ICAECC54045.2022.9716598","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716598","url":null,"abstract":"In this paper, we propose a peak to average power ratio (PAPR) reduction scheme for generalised frequency-division multiplexing (GFDM) systems based on parallel concatenation of low-density parity-check codes (PC-LDPC) codes. The proposed scheme maps the PC-LDPC codewords onto subcarriers to construct a symbol of channel coded GFDM. Then, these sub symbols are combined with subcarriers to form symbols, and these symbols are applied to the PAPR expression of the GFDM system for calculation. The BER value is higher at 10dB for the RRC filter-based GFDM system than the RC filter. The RC filter configuration has less BER at 10dB in 0.2 roll-off factor value with 100 iterations and 200 iterations in soft decision algorithm. When the value of Complementary Cumulative Distribution Function (CCDF) =0.001, the PC-LDPC GFDM system reduces the PAPR by 4 to 4.5 dB compared to the uncoded GFDM signal. The coding gain of 0.5dB is observed in Raised cosine pulse shaping filter with PC-LDPC codes.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129964869","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716625
K. Krupa, Sukumar Patil, Bhoopendra Singh
The objective of Design and Manufacturing companies is to increase customer satisfaction, productivity with good quality of products. At present many of the design and manufacturing companies are facing quality rejection, lead time issue and inability to meet the customer expectations. By implementing the lean manufacturing system, many problems can be solved by involving employees on the shop floor in Kaizen activities. One of the basic rules of Kaizen is “The continuous incremental improvement of an activity to create more value with less waste giving quantifiable and sustainable benefit”. The main objective of this paper is to provide background of Kaizen implementation in design and manufacturing areas.
{"title":"Importance of Kaizen and Its Implementation in Design and Manufacturing System","authors":"K. Krupa, Sukumar Patil, Bhoopendra Singh","doi":"10.1109/ICAECC54045.2022.9716625","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716625","url":null,"abstract":"The objective of Design and Manufacturing companies is to increase customer satisfaction, productivity with good quality of products. At present many of the design and manufacturing companies are facing quality rejection, lead time issue and inability to meet the customer expectations. By implementing the lean manufacturing system, many problems can be solved by involving employees on the shop floor in Kaizen activities. One of the basic rules of Kaizen is “The continuous incremental improvement of an activity to create more value with less waste giving quantifiable and sustainable benefit”. The main objective of this paper is to provide background of Kaizen implementation in design and manufacturing areas.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124129335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716643
Deekshith Krishnegowda
The first neural network model which was developed for image recognition application consisted of simple perceptrons. It had input, processing unit, and a single output. Neural networks which are used in today’s world consist of many complex MAC (Multiply and Accumulate) units. Be it the simple pattern recognition neural network model or complex models used for autonomous driving applications; adders are used for computing the activation point of neurons. Some adders offer better performance at the cost of area and power while some offer better power at the cost of performance. So, choosing the right type of adder architecture based upon the application becomes a very important criterion when we are trying to develop an inference engine for the neural network in hardware. To determine weight or activation point of a neuron, typically, float32 or float64 number representation is used. Float64 offers better accuracy than float32 but the drawback of using float64 is that it requires huge computation power. So, in this manuscript we compare different high-speed adder topologies, then discuss the implementation of an optimized 64-bit conditional sum and carry select adder that can be used to implement Deep Neural Network with float64 number representation. Analysis between different adder architecture is performed using Synopsys Design Compiler with 45nm Toshiba library for three different metrics: Timing, Area, and Power.
{"title":"Analyzing different high speed adder architecture for Neural Networks","authors":"Deekshith Krishnegowda","doi":"10.1109/ICAECC54045.2022.9716643","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716643","url":null,"abstract":"The first neural network model which was developed for image recognition application consisted of simple perceptrons. It had input, processing unit, and a single output. Neural networks which are used in today’s world consist of many complex MAC (Multiply and Accumulate) units. Be it the simple pattern recognition neural network model or complex models used for autonomous driving applications; adders are used for computing the activation point of neurons. Some adders offer better performance at the cost of area and power while some offer better power at the cost of performance. So, choosing the right type of adder architecture based upon the application becomes a very important criterion when we are trying to develop an inference engine for the neural network in hardware. To determine weight or activation point of a neuron, typically, float32 or float64 number representation is used. Float64 offers better accuracy than float32 but the drawback of using float64 is that it requires huge computation power. So, in this manuscript we compare different high-speed adder topologies, then discuss the implementation of an optimized 64-bit conditional sum and carry select adder that can be used to implement Deep Neural Network with float64 number representation. Analysis between different adder architecture is performed using Synopsys Design Compiler with 45nm Toshiba library for three different metrics: Timing, Area, and Power.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127425203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Often times there is scarcity when it comes to model training of a quality dataset. Sometimes the data that is available is unlabelled, sometimes very few samples are available for some classes. In these cases, few shot learning comes in handy. There are two approaches to few shot learning Data Level approach and Parameter Level approach. The paper consists of analysis of the number of training samples using parameter level approach. Two classes have been used to perform few shot learning. Meta transfer learning is being used, by initialising the parameters of convolutional neutral networks (CNN) learner model from a model trained on ImageNet. It has been performed incrementally on datasets of various sizes. The results and performance of all the models are compared to the results when the entire dataset is used. As well as the advantages of using few shot learning. It has found its applications in a wide range of fields mainly computer vision, natural language processing etc.
{"title":"A Proposed Algorithm to Perform Few Shot Learning with different sampling sizes","authors":"Kashvi Dedhia, Mallika Konkar, Dhruvil Shah, Prachi Tawde","doi":"10.1109/ICAECC54045.2022.9716609","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716609","url":null,"abstract":"Often times there is scarcity when it comes to model training of a quality dataset. Sometimes the data that is available is unlabelled, sometimes very few samples are available for some classes. In these cases, few shot learning comes in handy. There are two approaches to few shot learning Data Level approach and Parameter Level approach. The paper consists of analysis of the number of training samples using parameter level approach. Two classes have been used to perform few shot learning. Meta transfer learning is being used, by initialising the parameters of convolutional neutral networks (CNN) learner model from a model trained on ImageNet. It has been performed incrementally on datasets of various sizes. The results and performance of all the models are compared to the results when the entire dataset is used. As well as the advantages of using few shot learning. It has found its applications in a wide range of fields mainly computer vision, natural language processing etc.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115045243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716676
Ba Ajeethra, Sv Gautham Prasath, R. Arun Balaji, K. A. Kumar
Digital communication and networking had become an integral part of our everyday life. Technological advancements in Digital networking must also include security and confidentiality paradigms. Several previous works on communication systems comprised the problem of storage, sharing, and complexity of keys. On considering the mentioned problems of existing works, this paper proposes secure communication using cryptography and face recognition techniques with cloud computing. The proposed system pertains to a protected communication process, where messages are entitled only after the verification of the authorized sender and receiver using Linear Binary Pattern Histogram (LBPH) face recognition, and Rivest, Shamir, Adleman (RSA) cryptographic technique with the cloud management system. The system generates RSA key pair, which is exported as a Privacy- Enhanced Mail (PEM) file and stored in a remote server through a Secure Shell (SSH) tunnel.The proposed system has found that using 50 samples for face authentication is most efficient and accurate with limited time. Existing works have focused to increase security by adding layers of encryption which in turn increased the complexity to handle keys and decryption processes. This proposed methodology on following a biometric authentication system, stretches itself with an extra efficient layer of security without increasing the complexity of the system.
{"title":"A Cryptography based Face Authentication System for Secured Communication","authors":"Ba Ajeethra, Sv Gautham Prasath, R. Arun Balaji, K. A. Kumar","doi":"10.1109/ICAECC54045.2022.9716676","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716676","url":null,"abstract":"Digital communication and networking had become an integral part of our everyday life. Technological advancements in Digital networking must also include security and confidentiality paradigms. Several previous works on communication systems comprised the problem of storage, sharing, and complexity of keys. On considering the mentioned problems of existing works, this paper proposes secure communication using cryptography and face recognition techniques with cloud computing. The proposed system pertains to a protected communication process, where messages are entitled only after the verification of the authorized sender and receiver using Linear Binary Pattern Histogram (LBPH) face recognition, and Rivest, Shamir, Adleman (RSA) cryptographic technique with the cloud management system. The system generates RSA key pair, which is exported as a Privacy- Enhanced Mail (PEM) file and stored in a remote server through a Secure Shell (SSH) tunnel.The proposed system has found that using 50 samples for face authentication is most efficient and accurate with limited time. Existing works have focused to increase security by adding layers of encryption which in turn increased the complexity to handle keys and decryption processes. This proposed methodology on following a biometric authentication system, stretches itself with an extra efficient layer of security without increasing the complexity of the system.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129182098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716644
K. Sudharshan, A. R. Bhavya
With IoT applications being extensively used in our day to day lives, managing the power consumption of IoT devices has become a genuine concern. Specifically, IoT devices that are used in remote locations without grid availability poses a more difficult challenge in managing power consumption. Since IoT devices are usually compact and the batteries used in these are smaller ones like coin cells and prismatic cells, their mili ampere hour is as low as 150mah and expected operating life is up to 2 years. To reach battery life of 2 years it is essential to operate the device in low power modes of the processor while also performing the function seamlessly. This research is targeted towards identifying various methodologies that assists in the reduction of power consumption in Battery operated IoT devices, especially in the IoT processor via hardware and firmware protocols.
{"title":"Hardware and Software method to Reduce Power Consumption in Battery Operated IoT Devices","authors":"K. Sudharshan, A. R. Bhavya","doi":"10.1109/ICAECC54045.2022.9716644","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716644","url":null,"abstract":"With IoT applications being extensively used in our day to day lives, managing the power consumption of IoT devices has become a genuine concern. Specifically, IoT devices that are used in remote locations without grid availability poses a more difficult challenge in managing power consumption. Since IoT devices are usually compact and the batteries used in these are smaller ones like coin cells and prismatic cells, their mili ampere hour is as low as 150mah and expected operating life is up to 2 years. To reach battery life of 2 years it is essential to operate the device in low power modes of the processor while also performing the function seamlessly. This research is targeted towards identifying various methodologies that assists in the reduction of power consumption in Battery operated IoT devices, especially in the IoT processor via hardware and firmware protocols.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126928036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716602
Mangu Aman Surya, P. H. Lakshmi, Kuruganti Madhu Sri, Amancherla Shanmukha Sai Saketh, Devendra J Patra Kailash, P. Tarun Sai, Parul Mathur, Vineetha Jain, Dhanesh G-Kurup
A simulation test-bed based on OpenGL graphics tool is developed for studying the telemetry communication link of aircraft with ground station. The smooth aircraft movement has been implemented using cubic spline algorithm and antenna beamforming algorithms has been used to track the aircraft movement by estimating the AoA (Angle of Arrival). The paper compares the performances of LMS (Least Mean Square) and RLS (Recursive Least Square) antenna beamforming algorithms to track the movement of aircraft in the presence of noise. The simulation test-bed was able to track the aircraft movement successfully for AOA of less than 75° with signal to noise ratio of more than 4dB.
{"title":"OpenGL Based Simulation Test Bed for Aircraft Ground Telemetry System using Antenna Beam Forming","authors":"Mangu Aman Surya, P. H. Lakshmi, Kuruganti Madhu Sri, Amancherla Shanmukha Sai Saketh, Devendra J Patra Kailash, P. Tarun Sai, Parul Mathur, Vineetha Jain, Dhanesh G-Kurup","doi":"10.1109/ICAECC54045.2022.9716602","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716602","url":null,"abstract":"A simulation test-bed based on OpenGL graphics tool is developed for studying the telemetry communication link of aircraft with ground station. The smooth aircraft movement has been implemented using cubic spline algorithm and antenna beamforming algorithms has been used to track the aircraft movement by estimating the AoA (Angle of Arrival). The paper compares the performances of LMS (Least Mean Square) and RLS (Recursive Least Square) antenna beamforming algorithms to track the movement of aircraft in the presence of noise. The simulation test-bed was able to track the aircraft movement successfully for AOA of less than 75° with signal to noise ratio of more than 4dB.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115270186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716590
P. Yaswanthram, B. A. Sabarish
Face Recognition is considered a biometric technique where it is capable of uniquely identifying and verifying a person just by analysing and comparing the facial patterns on the facial contours. Face Recognition has gained significant importance in security aspects and it has been widely used and accepted biometric. It has given greater importance during pandemic situations in terms of cheapest and widely accepted touchless biometrics. This paper studies the impact of dimensionality reduction on the efficiency or accuracy of machine learning algorithms in face recognition. The analysis is carried out over various algorithms include Random Forests, Support Vector Machine, Linear Regression, Logistic Regression, K-Nearest Neighbor. Based on the analysis, Logistic Regression gives better performance in terms of accuracy and time with an accuracy score of 0.97 within a time of 5.74 sec when implemented without principal component analysis whereas with principal component analysis, Logistic Regression achieved an accuracy score of 0.93 within a time of 0. 15sec. There is a huge difference in computation time approximately 20 times, the difference in accuracy is minimal.
{"title":"Face Recognition Using Machine Learning Models - Comparative Analysis and impact of dimensionality reduction","authors":"P. Yaswanthram, B. A. Sabarish","doi":"10.1109/ICAECC54045.2022.9716590","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716590","url":null,"abstract":"Face Recognition is considered a biometric technique where it is capable of uniquely identifying and verifying a person just by analysing and comparing the facial patterns on the facial contours. Face Recognition has gained significant importance in security aspects and it has been widely used and accepted biometric. It has given greater importance during pandemic situations in terms of cheapest and widely accepted touchless biometrics. This paper studies the impact of dimensionality reduction on the efficiency or accuracy of machine learning algorithms in face recognition. The analysis is carried out over various algorithms include Random Forests, Support Vector Machine, Linear Regression, Logistic Regression, K-Nearest Neighbor. Based on the analysis, Logistic Regression gives better performance in terms of accuracy and time with an accuracy score of 0.97 within a time of 5.74 sec when implemented without principal component analysis whereas with principal component analysis, Logistic Regression achieved an accuracy score of 0.93 within a time of 0. 15sec. There is a huge difference in computation time approximately 20 times, the difference in accuracy is minimal.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115937496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716627
Suma S. Lonkadi, V. Varalakshmi, S. Raviprakash, Kamaljeet Singh, A. V. Nirmal
Defects visualization in bare chips and dice are important for realization of high reliable aerospace systems. Various defects such as cracks, voids, delamination, chip outs, dis-coloration, deep scratches can be detrimental in long term reliability of the Hybrid Microcircuits (HMCs). In spite of various standards in the realization of dice as well as various inspection formulating methodologies still probability of defects induced during fabrication and packaging need to be critically examined. Further handling and assembly of the dice can also induce certain defects due to various stresses which will impact on product quality. This paper provides an overview of various visual defects observed in bare dice and further tests and analysis to know the impact on electronic fabrication process.
{"title":"Defects Determination and Diagnosis in Bare Dice for High Reliable Hybrid Microcircuits","authors":"Suma S. Lonkadi, V. Varalakshmi, S. Raviprakash, Kamaljeet Singh, A. V. Nirmal","doi":"10.1109/ICAECC54045.2022.9716627","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716627","url":null,"abstract":"Defects visualization in bare chips and dice are important for realization of high reliable aerospace systems. Various defects such as cracks, voids, delamination, chip outs, dis-coloration, deep scratches can be detrimental in long term reliability of the Hybrid Microcircuits (HMCs). In spite of various standards in the realization of dice as well as various inspection formulating methodologies still probability of defects induced during fabrication and packaging need to be critically examined. Further handling and assembly of the dice can also induce certain defects due to various stresses which will impact on product quality. This paper provides an overview of various visual defects observed in bare dice and further tests and analysis to know the impact on electronic fabrication process.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115461703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-01-10DOI: 10.1109/ICAECC54045.2022.9716585
S. Thavamani, U. Sinthuja
Internet of Things networks are becoming more popular for monitoring critical environments of various types, resulting in a large increase in the amount of data transmitted. Because of the large number of linked IoT devices, network and security protocols is a major concern. In the sphere of security, detection systems play a critical role: they are based on cutting-edge algorithms. They can recognize or forecast security attacks using techniques such as machine learning, allowing them to secure the underpinning system. We have depicted some of the Deep Learning based techniques and figured out the best technique called Long Short Term Memory (LSTM) with 87% of accuracy to build the Artificial Intelligence based Interpolation Technique for IoT Environment.
{"title":"LSTM based Deep Learning Technique to Forecast Internet of Things Attacks in MQTT Protocol","authors":"S. Thavamani, U. Sinthuja","doi":"10.1109/ICAECC54045.2022.9716585","DOIUrl":"https://doi.org/10.1109/ICAECC54045.2022.9716585","url":null,"abstract":"Internet of Things networks are becoming more popular for monitoring critical environments of various types, resulting in a large increase in the amount of data transmitted. Because of the large number of linked IoT devices, network and security protocols is a major concern. In the sphere of security, detection systems play a critical role: they are based on cutting-edge algorithms. They can recognize or forecast security attacks using techniques such as machine learning, allowing them to secure the underpinning system. We have depicted some of the Deep Learning based techniques and figured out the best technique called Long Short Term Memory (LSTM) with 87% of accuracy to build the Artificial Intelligence based Interpolation Technique for IoT Environment.","PeriodicalId":199351,"journal":{"name":"2022 IEEE Fourth International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128411995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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