This project is a result of the study carried out by the ICL-led consortium under a grant from the Alvey Directorate. The funded study commenced on 1 November 1983. A major Five year Demonstrator Project is described. The consortium in conjunction with the UK Department of Health and Social Security (DHSS) began work on the project in April 1984. The subject of this Demonstrator Project is knowledge-based Decison Support within a legislation based organisation. The project is staffed as follows (numbers represent the Year 5 peak contributions): ICL (15 people) Logica UK Ltd (3.5 people) >University of Lancaster (6 people) University of Surrey (6 people) Imperial College (2 people) In addition the DHSS are providing 3 people full time and various facilities: several consultants will also be utilised.
该项目是由icl领导的财团在Alvey理事会的资助下进行的研究的结果。这项获资助的研究于1983年11月1日展开。描述了一个主要的五年示范项目。该财团与联合王国卫生和社会保障部(DHSS)联合在1984年4月开始进行该项目的工作。这个示范项目的主题是基于知识的决策支持在一个以立法为基础的组织。项目人员如下(数字代表五年级的高峰贡献):ICL(15人)Logica UK Ltd(3.5人)>兰开斯特大学(6人)萨里大学(6人)帝国理工学院(2人)此外，DHSS还提供3名全职人员和各种设施:几位顾问也将使用。
{"title":"The alvey DHSS major demonstrator","authors":"M. W. Morron","doi":"10.1145/800171.809659","DOIUrl":"https://doi.org/10.1145/800171.809659","url":null,"abstract":"This project is a result of the study carried out by the ICL-led consortium under a grant from the Alvey Directorate. The funded study commenced on 1 November 1983. A major Five year Demonstrator Project is described. The consortium in conjunction with the UK Department of Health and Social Security (DHSS) began work on the project in April 1984. The subject of this Demonstrator Project is knowledge-based Decison Support within a legislation based organisation. The project is staffed as follows (numbers represent the Year 5 peak contributions):\u0000 ICL (15 people)\u0000 Logica UK Ltd (3.5 people)\u0000 >University of Lancaster (6 people)\u0000 University of Surrey (6 people)\u0000 Imperial College (2 people)\u0000 In addition the DHSS are providing 3 people full time and various facilities: several consultants will also be utilised.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129680716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Traditionally, computer hardware have been designed independent of the total system's approach. Central processing units can usually provide protection under software and firmware control, but do not provide for software copy protection and data integrity automatically. Storage devices and peripherals have been built to receive and transmit information without being regarded as a valuable resource. The operation, reliability, and performance of computer systems is usually measured with respect to the hardware device, requiring software to gather and correlate data into meaningful units of measure. This session will discuss the security design and functional specifications of fifth generation computer hardware by concentrating on the relationship between storage devices, processor units, and configuration management issues. The relationship is defined as execution stylometry or a means of fingerprinting software to hardware. In today's business environment, more and more dependencies have been based on the availability of information and the validity of that information. Attempts to satisfy the security needs of business through software have proved unsuccessful and ineffective. The opportunities to specify the building blocks and integration criteria in fifth generation systems provide a mechanism for satisfying these security needs.
{"title":"Security design considerations of hardware","authors":"Richard A. Smith","doi":"10.1145/800171.809641","DOIUrl":"https://doi.org/10.1145/800171.809641","url":null,"abstract":"Traditionally, computer hardware have been designed independent of the total system's approach. Central processing units can usually provide protection under software and firmware control, but do not provide for software copy protection and data integrity automatically. Storage devices and peripherals have been built to receive and transmit information without being regarded as a valuable resource. The operation, reliability, and performance of computer systems is usually measured with respect to the hardware device, requiring software to gather and correlate data into meaningful units of measure.\u0000 This session will discuss the security design and functional specifications of fifth generation computer hardware by concentrating on the relationship between storage devices, processor units, and configuration management issues. The relationship is defined as execution stylometry or a means of fingerprinting software to hardware. In today's business environment, more and more dependencies have been based on the availability of information and the validity of that information. Attempts to satisfy the security needs of business through software have proved unsuccessful and ineffective. The opportunities to specify the building blocks and integration criteria in fifth generation systems provide a mechanism for satisfying these security needs.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133953767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
There is as yet no general agreement as to the best solution to the operation of time and negation in data bases. This paper presents an approach to handle these problems in a logic data base system. A simple logic interpreter is introduced that allows for effective reasoning based on the manipulation of a sequence of snapshots. These ideas have been realized in an extension to the query language Query-By-Example, which has been implemented in the logic programming language Prolog.
对于数据库中时间和否定操作的最佳解决办法，目前还没有达成普遍的一致意见。本文提出了一种在逻辑数据库系统中处理这些问题的方法。介绍了一个简单的逻辑解释器，它允许基于快照序列的操作进行有效的推理。这些思想通过对查询语言query - by - example的扩展来实现，并在逻辑编程语言Prolog中实现。
{"title":"A logic interpreter to handle time and negation in logic data bases","authors":"J. Neves","doi":"10.1145/800171.809603","DOIUrl":"https://doi.org/10.1145/800171.809603","url":null,"abstract":"There is as yet no general agreement as to the best solution to the operation of time and negation in data bases. This paper presents an approach to handle these problems in a logic data base system. A simple logic interpreter is introduced that allows for effective reasoning based on the manipulation of a sequence of snapshots. These ideas have been realized in an extension to the query language Query-By-Example, which has been implemented in the logic programming language Prolog.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"256 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134075153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes the organization and operation of a semantic network array processor (SNAP). The architecture consists of an array of identical cells each containing a content addressable memory, microprogram control and communication unit. Each cell is dedicated to one node of the semantic network and its associated relations. The array can perform global associative functions under the supervision of an outside controller. In addition, each cell is equipped with the necessary logic to perform individual functions. A set of primitive instructions were carefully chosen. Some of the applications discussed in this paper include pattern search operations, production systems and inferences. A LISP simulator was developed for this architecture, and some simulation results are presented in this paper.
{"title":"An associative array architecture intended for semantic network processing","authors":"D. Moldovan","doi":"10.1145/800171.809624","DOIUrl":"https://doi.org/10.1145/800171.809624","url":null,"abstract":"This paper describes the organization and operation of a semantic network array processor (SNAP). The architecture consists of an array of identical cells each containing a content addressable memory, microprogram control and communication unit. Each cell is dedicated to one node of the semantic network and its associated relations. The array can perform global associative functions under the supervision of an outside controller. In addition, each cell is equipped with the necessary logic to perform individual functions. A set of primitive instructions were carefully chosen. Some of the applications discussed in this paper include pattern search operations, production systems and inferences. A LISP simulator was developed for this architecture, and some simulation results are presented in this paper.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129806317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This session includes a report on work in progress by a committee developing an interdisciplinary computers and information-based course/curriculum intended for all students at the secondary level. Content, objectives, and a topical outline will be discussed. Audience reaction and input are requested. In the fall of 1983, the AFIPS (American Federation of Information Processing Societies) Education Committee funded a project to develop a technologically oriented, interdisciplinary course /curriculum for all students at the secondary level. A Steering Committee met in September 1983 and recommended that a working committee be formed to produce recommendations on course/curriculum.
{"title":"AFIPS secondary education curriculum in information technology","authors":"R. Austing","doi":"10.1145/800171.809668","DOIUrl":"https://doi.org/10.1145/800171.809668","url":null,"abstract":"This session includes a report on work in progress by a committee developing an interdisciplinary computers and information-based course/curriculum intended for all students at the secondary level. Content, objectives, and a topical outline will be discussed. Audience reaction and input are requested.\u0000 In the fall of 1983, the AFIPS (American Federation of Information Processing Societies) Education Committee funded a project to develop a technologically oriented, interdisciplinary course /curriculum for all students at the secondary level. A Steering Committee met in September 1983 and recommended that a working committee be formed to produce recommendations on course/curriculum.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114410418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The purpose of this project is to develop a system to provide knowledge based decision support within a large legislation based organisation. The system developed will not be made fully operational within the target organisation, the Department of Health and Social Security (DHSS), but will however be constructed to the standards required for real operational use. The project is a collaborative venture involving ICL as the prime contractor, LOGICA, the Universities of Surrey and Lancaster and Imperial College of the University of London. Lastly, but most importantly, the DHSS itself is involved both as end user and co-developer. This project is funded as a large demonstrator as part of the UK ALVEY Programme. The demonstrator system constructed will consist of a fully integrated set of subsystems each supporting a distinct area of DHSS activity (eg. benefit assessment, training). Each subsystem wil be produced by a separate and independent group; therefore a strong framework is required if the design of the demonstrator is to be consistent. This framework should not be regarded as a rigid set of legislative rules but rather as a house style or declaration of design intent.
{"title":"A design framework for the ALVEY/ICL/DHSS demonstrator process","authors":"P. Pettitt","doi":"10.1145/800171.809616","DOIUrl":"https://doi.org/10.1145/800171.809616","url":null,"abstract":"The purpose of this project is to develop a system to provide knowledge based decision support within a large legislation based organisation. The system developed will not be made fully operational within the target organisation, the Department of Health and Social Security (DHSS), but will however be constructed to the standards required for real operational use. The project is a collaborative venture involving ICL as the prime contractor, LOGICA, the Universities of Surrey and Lancaster and Imperial College of the University of London. Lastly, but most importantly, the DHSS itself is involved both as end user and co-developer. This project is funded as a large demonstrator as part of the UK ALVEY Programme.\u0000 The demonstrator system constructed will consist of a fully integrated set of subsystems each supporting a distinct area of DHSS activity (eg. benefit assessment, training). Each subsystem wil be produced by a separate and independent group; therefore a strong framework is required if the design of the demonstrator is to be consistent. This framework should not be regarded as a rigid set of legislative rules but rather as a house style or declaration of design intent.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114604477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Unification is a basic operation in theorem proving, in type inference algorithms, and in logic programming languages such as Prolog. Prolog will play a major role in software development for the Fifth Generation project, and thus developing fast algorithms for unification is an important goal. This paper shows that the running time for a linear unification algorithm can often be improved substantially by use of parallel processing. The same is true for algorithms for some other complete problems in P, namely, the monotone circuit value problem and the path system accessibility problem. Previous theoretical work in computational complexity has suggested that these problems are not parallelizable; in practice this is not the case. To resolve this paradox, we introduce new complexity classes PC and PC* that capture the practical notion of parallelizability we discuss in this paper. We pose several open questions concerning PC and PC*.
{"title":"Parallel algorithms for unification and other complete problems in p","authors":"J. Vitter, Roger A. Simons","doi":"10.1145/800171.809607","DOIUrl":"https://doi.org/10.1145/800171.809607","url":null,"abstract":"Unification is a basic operation in theorem proving, in type inference algorithms, and in logic programming languages such as Prolog. Prolog will play a major role in software development for the Fifth Generation project, and thus developing fast algorithms for unification is an important goal. This paper shows that the running time for a linear unification algorithm can often be improved substantially by use of parallel processing. The same is true for algorithms for some other complete problems in P, namely, the monotone circuit value problem and the path system accessibility problem. Previous theoretical work in computational complexity has suggested that these problems are not parallelizable; in practice this is not the case. To resolve this paradox, we introduce new complexity classes PC and PC* that capture the practical notion of parallelizability we discuss in this paper. We pose several open questions concerning PC and PC*.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134126343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Computers and computing are topics of discussion in many curriculum areas in secondary school. The four courses recommended by this task group, however, have computing as their primary content. The courses are: 1) Introduction to Computer Science I (a full year course) 2) Introduction to Computer Science II (a full year course) 3) Introduction to a High-level Computer Language (a half-year course) 4) Applications and Implications of Computers (a half-year course) Courses 1 and 2 are designed for students with a serious interest in computer science. Course 1 can serve as a single introductory course for some students and also act as a prerequisite for Course 2. At the end of two years of study, students should be prepared to be placed in second level computer science classes in post-secondary educational institutions or to take the Advanced Placement Exam available through the College Entrance Exam Board.
{"title":"Computer science for secondary schools: Course content","authors":"J. Rogers","doi":"10.1145/800171.809671","DOIUrl":"https://doi.org/10.1145/800171.809671","url":null,"abstract":"Computers and computing are topics of discussion in many curriculum areas in secondary school. The four courses recommended by this task group, however, have computing as their primary content. The courses are:\u0000 1) Introduction to Computer Science I (a full year course)\u0000 2) Introduction to Computer Science II (a full year course)\u0000 3) Introduction to a High-level Computer Language (a half-year course)\u0000 4) Applications and Implications of Computers (a half-year course)\u0000 Courses 1 and 2 are designed for students with a serious interest in computer science. Course 1 can serve as a single introductory course for some students and also act as a prerequisite for Course 2. At the end of two years of study, students should be prepared to be placed in second level computer science classes in post-secondary educational institutions or to take the Advanced Placement Exam available through the College Entrance Exam Board.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"203 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134063530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper briefly examines certain of the Intelligent Information Retrieval (IIR) mechanisms used in the RESEDA system, a system equipped with “reasoning” capabilities in the field of complex biographical data management. Particular attention is paid to a description of the different “levels” of inference procedure which can be executed by the system. The intention is to show that the technical solutions to IIR problems implemented in RESEDA are of an equivalent level to those now proposed in the same field by the Japanese project for Fifth Generation Computer Systems.
{"title":"A fifth generation approach to intelligent information retrieval","authors":"G. P. Zarri","doi":"10.1145/800171.809601","DOIUrl":"https://doi.org/10.1145/800171.809601","url":null,"abstract":"This paper briefly examines certain of the Intelligent Information Retrieval (IIR) mechanisms used in the RESEDA system, a system equipped with “reasoning” capabilities in the field of complex biographical data management. Particular attention is paid to a description of the different “levels” of inference procedure which can be executed by the system. The intention is to show that the technical solutions to IIR problems implemented in RESEDA are of an equivalent level to those now proposed in the same field by the Japanese project for Fifth Generation Computer Systems.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"367 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116616439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, the roles of different information systems in an organization are identified using a framework called “Information Wheel”. An information wheel is similar to a physical wheel in that it consists of a hub, spokes, rim and a tire. The parts of a physical wheel are made of material such as steel, rubber and plastics. The parts of the information wheel are made of different information systems.
{"title":"Information Wheel - a framework to identify roles of information systems","authors":"C. Sankar","doi":"10.1145/800171.809614","DOIUrl":"https://doi.org/10.1145/800171.809614","url":null,"abstract":"In this paper, the roles of different information systems in an organization are identified using a framework called “Information Wheel”.\u0000 An information wheel is similar to a physical wheel in that it consists of a hub, spokes, rim and a tire. The parts of a physical wheel are made of material such as steel, rubber and plastics. The parts of the information wheel are made of different information systems.","PeriodicalId":218138,"journal":{"name":"ACM '84","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117327433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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