The importance of the Internet of Things is constantly growing, together with the proliferation of IoT devices which are changing our daily life and empowering industrial processes. However, the most IoT devices and protocols were not designed with security in mind, and economic and energyconsumption constraints make the implementation of security measures a non-trivial problem. One of the most used messaging protocol in IoT, which is MQTT (Message Queuing Telemetry Transport), leaves to developers the task to implement security, as native security services provided by the protocol are very weak. This paper focuses on MQTT authentication, which is definitely insecure in the protocol, even though the implementations can combine MQTT with other mechanisms to obtain a suitable level of security. The aim of the present work is to propose an innovative OTP-authentication scheme for MQTT which uses Ethereum to implement an independent logic channel for the second-factor authentication. The implementation of the proposed scheme relies on the trusted behavior of smart contracts and adopts suitable strategies to preserve the privacy of users.
{"title":"A Blockchain-Based OTP-Authentication Scheme for Constrainded IoT Devices Using MQTT","authors":"F. Buccafurri, Celeste Romolo","doi":"10.1145/3386164.3389095","DOIUrl":"https://doi.org/10.1145/3386164.3389095","url":null,"abstract":"The importance of the Internet of Things is constantly growing, together with the proliferation of IoT devices which are changing our daily life and empowering industrial processes. However, the most IoT devices and protocols were not designed with security in mind, and economic and energyconsumption constraints make the implementation of security measures a non-trivial problem. One of the most used messaging protocol in IoT, which is MQTT (Message Queuing Telemetry Transport), leaves to developers the task to implement security, as native security services provided by the protocol are very weak. This paper focuses on MQTT authentication, which is definitely insecure in the protocol, even though the implementations can combine MQTT with other mechanisms to obtain a suitable level of security. The aim of the present work is to propose an innovative OTP-authentication scheme for MQTT which uses Ethereum to implement an independent logic channel for the second-factor authentication. The implementation of the proposed scheme relies on the trusted behavior of smart contracts and adopts suitable strategies to preserve the privacy of users.","PeriodicalId":231209,"journal":{"name":"Proceedings of the 2019 3rd International Symposium on Computer Science and Intelligent Control","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125071719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The significant increase in the need for high-performance and energy-efficient computing systems has introduced heterogenous computing. However, the incorporation of different architectures into one system complicates the distribution of the workload between architectures. To address this challenge while meeting the goals of high-performance computing systems, several research contributions have been made. This paper reviews some of the proposed workload partitioning approaches for GPU-based, DSP-based and FPGA-based heterogenous systems. This research also covers some comparison studies regarding the FPGA versus DSP and FPGA versus GPU debates, showing that sometimes collaboration between these architectures seems to be the key. The aim of this study is to provide academic and industrial researchers with an insight of techniques to achieve the workload balancing in heterogenous systems and motivate them for further research in the field.
{"title":"High Performance Heterogeneous Multicore Architectures: A Study","authors":"Igla Hoxha, Michael Opoku Agyeman","doi":"10.1145/3386164.3386166","DOIUrl":"https://doi.org/10.1145/3386164.3386166","url":null,"abstract":"The significant increase in the need for high-performance and energy-efficient computing systems has introduced heterogenous computing. However, the incorporation of different architectures into one system complicates the distribution of the workload between architectures. To address this challenge while meeting the goals of high-performance computing systems, several research contributions have been made. This paper reviews some of the proposed workload partitioning approaches for GPU-based, DSP-based and FPGA-based heterogenous systems. This research also covers some comparison studies regarding the FPGA versus DSP and FPGA versus GPU debates, showing that sometimes collaboration between these architectures seems to be the key. The aim of this study is to provide academic and industrial researchers with an insight of techniques to achieve the workload balancing in heterogenous systems and motivate them for further research in the field.","PeriodicalId":231209,"journal":{"name":"Proceedings of the 2019 3rd International Symposium on Computer Science and Intelligent Control","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126698185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Field Programmable Gate Arrays (FPGAs) play a significant role in modern supercomputing by providing benefits of hardware speed as well as programmability. Recently, there has been many contributions about the application of FPGAs in the area of supercomputing. Consequently, this paper presents a brief review of existing work on FPGA-based supercomputing platforms.
{"title":"A Study of FPGA-Based Supercomputing Platforms","authors":"Ola Challabi, Raghad Zenki, Michael Opoku Agyeman","doi":"10.1145/3386164.3386165","DOIUrl":"https://doi.org/10.1145/3386164.3386165","url":null,"abstract":"Field Programmable Gate Arrays (FPGAs) play a significant role in modern supercomputing by providing benefits of hardware speed as well as programmability. Recently, there has been many contributions about the application of FPGAs in the area of supercomputing. Consequently, this paper presents a brief review of existing work on FPGA-based supercomputing platforms.","PeriodicalId":231209,"journal":{"name":"Proceedings of the 2019 3rd International Symposium on Computer Science and Intelligent Control","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125263192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Experimental results have shown that the Neutron and proton induced upset is the root cause of increasing the sensitivity of microelectronics to soft errors. Thus eliminating these errors are the main challenge to overcome while designing and implementing any microelectronic device, error detection and correction technologies are practical ways that could be applied to fulfill such a purpose. Hamming code, Reed-Solomon codes, Parity Matrix codes, and many more techniques, have been developed and used over the last decades targeting memory protection. Which are still delivering qualified performance measures; however, the downside of these approaches is that they necessitate more redundant memory space, transmission delay, and sophisticated reliability architecture. This paper highlights various memory protection technologies, particularly emphasizing on The Decimal matrix code (DMC) with Encoder Reuse Technique (ERT).
{"title":"Protection of Memory Using Code Redundancies: A Brief Study","authors":"Raghad Zenki, Ola Challabi, Michael Opoku Agyeman","doi":"10.1145/3386164.3386167","DOIUrl":"https://doi.org/10.1145/3386164.3386167","url":null,"abstract":"Experimental results have shown that the Neutron and proton induced upset is the root cause of increasing the sensitivity of microelectronics to soft errors. Thus eliminating these errors are the main challenge to overcome while designing and implementing any microelectronic device, error detection and correction technologies are practical ways that could be applied to fulfill such a purpose. Hamming code, Reed-Solomon codes, Parity Matrix codes, and many more techniques, have been developed and used over the last decades targeting memory protection. Which are still delivering qualified performance measures; however, the downside of these approaches is that they necessitate more redundant memory space, transmission delay, and sophisticated reliability architecture. This paper highlights various memory protection technologies, particularly emphasizing on The Decimal matrix code (DMC) with Encoder Reuse Technique (ERT).","PeriodicalId":231209,"journal":{"name":"Proceedings of the 2019 3rd International Symposium on Computer Science and Intelligent Control","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132995941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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