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[1993] Proceedings Seventh International Parallel Processing Symposium最新文献

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Hierarchical interconnection cache networks 分层互连缓存网络
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262870
Sizheng Wei, E. Schenfeld
The hierarchical interconnection cache network (HICN) is a novel network architecture for massively parallel processing systems. The HICN's topology is a hierarchy of multiple, three-stage interconnection cache networks. The first and third stages of each network use small, fast crossbar switches. Large, slow switching (reconfigurable) crossbars are used in the middle stages. HICN exploits a special kind of communication locality, called switching locality, offering greater flexibility and lower latency compared with the classical hierarchical networks. HICN uses small size switches for the communication routing and large size switches for setting up the network (reconfiguration) to match as close as possible the expected communication pattern. The trade-off between the routing speed and the switch size is one major factor of achieving high speed communication in massively parallel interconnection networks. The authors present efficient embeddings of several classical network topologies, such as hypercubes, complete binary trees, and grids, into HICNs. They also show that HICNs are flexibly partitionable.<>
分层互连缓存网络(HICN)是一种面向大规模并行处理系统的新型网络结构。HICN的拓扑结构是由多个三级互连缓存网络组成的层次结构。每个网络的第一阶段和第三阶段使用小型、快速的横排交换机。中间阶段使用大的、慢的交换(可重构)交叉条。HICN利用一种特殊的通信局部性,称为交换局部性,与传统的分层网络相比,它提供了更大的灵活性和更低的延迟。HICN使用小尺寸交换机进行通信路由,使用大尺寸交换机建立网络(重新配置),以尽可能接近预期的通信模式。路由速度和交换机大小之间的权衡是实现大规模并行互连网络中高速通信的一个主要因素。作者提出了几种经典网络拓扑的有效嵌入,如超立方体、完全二叉树和网格,到hicn中。他们还证明了hicn是灵活可分的。
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引用次数: 4
Class and user based parallelism in Raven Raven中基于类和用户的并行性
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262791
D. Acton, G. Neufeld
This paper presents the concurrency features found in Raven, an object-oriented parallel programming system. Raven supports coarse-grained parallelism via class based and user based parallelism. Class based parallelism is provided by the implementor of the class, while user based parallelism is provided by the user, or client of objects. Raven also supports object properties which are determined at object creation time, thereby eliminating the need for separate class hierarchies that support concurrency. Raven is operational on a variety of machine architectures, including a shared memory multiprocessor. Initial experience indicates that sequential code can easily be transformed into parallel code and that a substantial speedup is possible.<>
本文介绍了面向对象并行程序设计系统Raven的并发特性。Raven通过基于类和基于用户的并行性支持粗粒度并行性。基于类的并行性由类的实现者提供,而基于用户的并行性由用户或对象的客户端提供。Raven还支持在对象创建时确定的对象属性,从而消除了对支持并发性的单独类层次结构的需求。Raven可以在多种机器架构上运行,包括共享内存多处理器。最初的经验表明,顺序代码可以很容易地转换为并行代码,并且可以大大加快速度。
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引用次数: 0
The clustered-star graph: a new topology for large interconnection networks 聚类星图:大型互连网络的一种新拓扑
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262824
S. Latifi, N. Bagherzadeh
The authors propose a flexible network called the clustered-star (CS) network. An (n-1)-dimensional CS of order m, denoted by CS/sub n-1//sup m/ is an n-dimensional star with (n-m) of its (n-1)-stars missing. The advantage of CS/sub n-1//sup m/ is that from the network size viewpoint, it is scalable by a factor of 1>
作者提出了一种称为簇星(CS)网络的柔性网络。一个m阶(n-1)维CS,用CS/sub n-1//sup m/表示,是一个n维星,缺少(n-1)颗星中的(n-m)颗。CS/sub n-1//sup m/的优点是,从网络规模的角度来看,它的可扩展性为1倍。
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引用次数: 6
VMPP: a virtual machine for parallel processing VMPP:用于并行处理的虚拟机
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262790
E. Loyot, A. Grimshaw
In the field of parallel processing, there is a great diversity of languages and architectures which become obsolete at a rapid pace. In this environment, portability is an important issue. Unfortunately, most parallel languages are not portable. This portability problem can be solved using a virtual machine approach. In this approach, front-end translators translate various parallel source languages into code for a virtual machine. Back-end translators translate the virtual machine code into executable codes for a variety of parallel architectures. The Virtual Machine for Parallel Processing (VMPP) is designed to provide portability for a variety of high-level parallel programming languages without significantly sacrificing performance.<>
在并行处理领域,存在着各种各样的语言和体系结构,这些语言和体系结构很快就会过时。在这种环境中,可移植性是一个重要的问题。不幸的是,大多数并行语言都是不可移植的。这种可移植性问题可以使用虚拟机方法来解决。在这种方法中,前端翻译人员将各种并行源语言翻译成虚拟机的代码。后端翻译器将虚拟机代码翻译成各种并行体系结构的可执行代码。并行处理虚拟机(VMPP)旨在为各种高级并行编程语言提供可移植性,而不会显著牺牲性能。
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引用次数: 0
Design of efficient reconfigurable networks 高效可重构网络的设计
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262918
Arun Kumar Somani
The author presents a methodology to design an efficient communication reconfigurable network of processor using a circuit switching environment. He assumes that the operation is synchronous and reconfigurations occur at pre-specified times. This network is based on two architectural concepts, the generalized folding cube and the enhanced hypercube architectures. The author demonstrates the effectiveness, versatility, and flexibility of his approach.<>
本文提出了一种利用电路交换环境设计高效的处理器通信可重构网络的方法。他假设操作是同步的,重新配置在预先指定的时间发生。该网络基于两个架构概念,即广义折叠立方体和增强型超立方体架构。作者展示了他的方法的有效性、多功能性和灵活性。
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引用次数: 0
Symbolic synthesis of parallel processing systems 并行处理系统的符号综合
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262827
James J. Liu, M. Ercegovac
The authors derive high-level parallel processing arrays for matrix computations using symbolic transformations. They propose a graphical language MGD (Mesh Graph Descriptor) as the basis for the transformations. The input to the synthesis system is the single-assignment form of matrix algorithms and the output is a structure of the synthesized parallel arrays. The synthesized arrays produced range from fully-parallel systolic arrays to limited-size parallel arrays. The approach is concise, verifiable, and easy to use. An example of LU decomposition illustrates the approach.<>
作者使用符号变换推导出用于矩阵计算的高级并行处理数组。他们提出了一种图形语言MGD(网格图描述符)作为转换的基础。合成系统的输入是矩阵算法的单赋值形式,输出是合成的并行阵列结构。合成的阵列范围从全平行收缩阵列到有限大小的平行阵列。该方法简洁、可验证且易于使用。一个逻辑单元分解的例子说明了这种方法。
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引用次数: 1
A dynamic multiple copy approach for message passing in a virtual cut-through environment 用于在虚拟直通环境中传递消息的动态多重复制方法
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262786
Moncef Hamdaoui, P. Ramanathan
The paper proposes a scheme where nodes adaptively send multiple copies of time-critical messages to increase the probability of their timely delivery. A message is replicated only when the time remaining to its deadline is below a pre-computed threshold. An off-line algorithm for computing the number of copies and the deadline thresholds is presented. Simulation results indicate that the reductions in the expected cost due to missed deadlines are substantial as a result of using the proposed scheme.<>
提出了一种节点自适应发送多份时间关键消息以提高其及时传递概率的方案。只有当距离截止日期的剩余时间低于预先计算的阈值时,才会复制消息。提出了一种计算副本数和截止日期阈值的离线算法。仿真结果表明,由于使用所提出的方案,由于错过最后期限而导致的预期成本大幅降低
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引用次数: 2
Parallel simulated annealing for the n-queen problem n皇后问题的并行模拟退火
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262797
R. Shonkwiler, Farzad Ghannadian, C. Alford
A parallel simulated annealing method, IIP, is applied to the n-queen problem. By this method, identical multiple copies of the single process algorithm are independently run in parallel. This technique gives superlinear speedup, in some cases on the order of 50 using only 8 processors. Convergence to the solution exceeds 99.96% for as few as 4 processors. In addition, simulated annealing was compared with a constant temperature version of itself since the resulting homogeneous Markov chain is amendable to Perron-Frobenius analysis. The two algorithms perform similarly.<>
将并行模拟退火方法IIP应用于n皇后问题。通过这种方法,可以独立地并行运行多个相同的单进程算法副本。这种技术提供了超线性的加速,在某些情况下,仅使用8个处理器就可以达到50的量级。即使只有4个处理器,解决方案的收敛性也超过了99.96%。此外,由于所得的齐次马尔可夫链可用于Perron-Frobenius分析,因此将模拟退火与自身的恒温版本进行了比较。这两种算法的执行类似
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引用次数: 5
An efficient parallel algorithm for min-cost flow on directed series-parallel networks 有向串并联网络最小代价流的一种高效并行算法
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262879
Amit Jain, N. Chandrasekharan
The authors consider the problem of finding the minimum cost of a feasible flow in directed series-parallel networks with real-valued lower and upper bounds for the flows on edges. While strongly polynomial-time algorithms are known for this problem on arbitrary networks, it is known to be 'hard' for parallelization. The authors develop, for the first time, an NC algorithm to solve the min-cost flow problem on directed series-parallel networks, solving a problem posed by H. Booth (1990). The authors algorithm takes O(log/sup 2/m) time using O(m/log m) processors on an EREW PRAM and it is optimal with respect to Booth's algorithm with running time O(m log m). Their algorithm owes its efficiency to the tree contraction technique and the use of simple data structures as opposed to Booth's finger search trees.<>
考虑有向序列-并行网络中可行流的最小代价问题,该网络的边界上有实值上界和下界。虽然已知强多项式时间算法可以在任意网络上解决此问题,但已知并行化是“困难”的。作者首次开发了一种NC算法来解决有向串并联网络上的最小成本流问题,解决了H. Booth(1990)提出的问题。作者的算法在EREW PRAM上使用O(m/log m)处理器,耗时O(log/sup 2/m),与运行时间O(m log m)的Booth算法相比,它是最优的。他们的算法将其效率归功于树收缩技术和使用简单的数据结构,而不是Booth的手指搜索树
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引用次数: 5
Data-parallel functional programming 数据并行函数式编程
Pub Date : 1993-04-13 DOI: 10.1109/IPPS.1993.262811
Steven P. Vanderwiel, J. Davis
This paper describes an implementation scheme that maps sequences (lists) in the functional language FP onto a data-parallel SIMD multiprocessor. The mapping is dynamic (i.e., self-organizing at run-time via an atom vector) and is transparent to the programmer. Furthermore, as the problem size and the capability of the architecture increases, the method described will proportionally scale the degree of parallelism. The authors chose FP as the application language because it is a simple yet expressive language and because FP allows one to create functional forms that yield highly-parallel computations when applied to lists representing matrix or vector data. The target architecture is a MasPar MP-1 with 16 K processors.<>
本文描述了一种将函数式语言FP中的序列(列表)映射到数据并行SIMD多处理器上的实现方案。映射是动态的(即,在运行时通过原子向量进行自组织),并且对程序员是透明的。此外,随着问题规模和体系结构能力的增加,所描述的方法将按比例扩展并行度。作者选择FP作为应用程序语言,因为它是一种简单而富有表现力的语言,而且当应用于表示矩阵或矢量数据的列表时,FP允许创建产生高度并行计算的函数形式。目标架构是带有16k处理器的MasPar MP-1。
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引用次数: 0
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[1993] Proceedings Seventh International Parallel Processing Symposium
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