Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383769
Chongning Na, D. Obradovic, R. Scheiterer, G. Steindl, Franz-Josef Goetz
This paper analyzes the factors that affect the synchronization performance in using the precision time protocol (FTP). We first study the influence of jitter under the assumption of no frequency drifts. Then we study the influence of frequency drift in the absence of jitter. The analytic formulas provide a theoretical ground for the understanding of simulation results as well as guidelines for choosing both system and control parameters when applying FTP.
{"title":"Synchronization Performance of the Precision Time Protocol","authors":"Chongning Na, D. Obradovic, R. Scheiterer, G. Steindl, Franz-Josef Goetz","doi":"10.1109/ISPCS.2007.4383769","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383769","url":null,"abstract":"This paper analyzes the factors that affect the synchronization performance in using the precision time protocol (FTP). We first study the influence of jitter under the assumption of no frequency drifts. Then we study the influence of frequency drift in the absence of jitter. The analytic formulas provide a theoretical ground for the understanding of simulation results as well as guidelines for choosing both system and control parameters when applying FTP.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116324159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383768
A. Treytl, G. Gaderer, B. Hirschler, R. Cohen
Clock synchronization has become one of the enabling techniques to enable real-time on both application-and network level. One of the most promising and currently intensively discussed approaches is IEEE1588, a master slave based synchronization protocol, which is intended to be a protocol not only limited for one application use, but for many domains such as telecom, test and measurement or factory automation. For some of these application domains security is a crucial feature, not only to prevent malicious attacks, but also to avoid accidental disturbances such as wrongly configured devices in the net. For the sake of these security requirements in version 2 of the IEEE1588 standard an informative annex describes an extension of the widely accepted protocol. Nevertheless not only the extension of a protocol with security fields defines a secure system, also a policy has to declare what to do in certain cases. This paper describes this security extension and gives and extensive analysis on the applicable threads as well as an attack of the master and approaches to include version 2 switches in a secure IEEE1588 clock synchronized network.
{"title":"Traps and pitfalls in secure clock synchronization","authors":"A. Treytl, G. Gaderer, B. Hirschler, R. Cohen","doi":"10.1109/ISPCS.2007.4383768","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383768","url":null,"abstract":"Clock synchronization has become one of the enabling techniques to enable real-time on both application-and network level. One of the most promising and currently intensively discussed approaches is IEEE1588, a master slave based synchronization protocol, which is intended to be a protocol not only limited for one application use, but for many domains such as telecom, test and measurement or factory automation. For some of these application domains security is a crucial feature, not only to prevent malicious attacks, but also to avoid accidental disturbances such as wrongly configured devices in the net. For the sake of these security requirements in version 2 of the IEEE1588 standard an informative annex describes an extension of the widely accepted protocol. Nevertheless not only the extension of a protocol with security fields defines a secure system, also a policy has to declare what to do in certain cases. This paper describes this security extension and gives and extensive analysis on the applicable threads as well as an attack of the master and approaches to include version 2 switches in a secure IEEE1588 clock synchronized network.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129737648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383763
U. Schmid
{"title":"A Perspective of Fault-Tolerant Clock Synchronization","authors":"U. Schmid","doi":"10.1109/ISPCS.2007.4383763","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383763","url":null,"abstract":"","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123843571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383790
R. Subrahmanyan
As IEEE 1588 moves from v1 to v2 implementations, particularly in synchronization for telecommunications applications, it is necessary to consider the unique aspects of telecom sync and the impact of these on timing recovery using IEEE 1588. This paper discusses various error considerations that must be applied towards timing recovery in packet-timing implementations, particularly those targeted towards telecom sync. A review of basic rate-recovery concepts is used to identify the various sources of error and their effects. Simulation and experimental results are used to illustrate the impact of different factors on the recovered timing.
{"title":"Implementation Considerations for IEEE 1588v2 Applications in Telecommunications","authors":"R. Subrahmanyan","doi":"10.1109/ISPCS.2007.4383790","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383790","url":null,"abstract":"As IEEE 1588 moves from v1 to v2 implementations, particularly in synchronization for telecommunications applications, it is necessary to consider the unique aspects of telecom sync and the impact of these on timing recovery using IEEE 1588. This paper discusses various error considerations that must be applied towards timing recovery in packet-timing implementations, particularly those targeted towards telecom sync. A review of basic rate-recovery concepts is used to identify the various sources of error and their effects. Simulation and experimental results are used to illustrate the impact of different factors on the recovered timing.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122677862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383785
D. Rosselot
Achieving a high level of synchronization accuracy using IEEE 1588 requires dedicated hardware to timestamp messages as close to the physical layer as possible. Existing solutions often require a significant development cost in time and money, and may also require expensive components, such as high-end microcontrollers with dedicated 1588 hardware. This paper describes an alternative solution: a 10/100 Mb/s Ethernet physical layer device with integrated hardware support for IEEE 1588. Configuration, control, and status are all handled using standard interfaces, allowing hardware timestamps using any microcontroller or FPGA with an integrated Ethernet Mac. This solution provides extremely accurate synchronization by integrating the time-sensitive portions of the protocol within the physical layer.
{"title":"Simple, Accurate Time Synchronization in an Ethernet Physical Layer Device","authors":"D. Rosselot","doi":"10.1109/ISPCS.2007.4383785","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383785","url":null,"abstract":"Achieving a high level of synchronization accuracy using IEEE 1588 requires dedicated hardware to timestamp messages as close to the physical layer as possible. Existing solutions often require a significant development cost in time and money, and may also require expensive components, such as high-end microcontrollers with dedicated 1588 hardware. This paper describes an alternative solution: a 10/100 Mb/s Ethernet physical layer device with integrated hardware support for IEEE 1588. Configuration, control, and status are all handled using standard interfaces, allowing hardware timestamps using any microcontroller or FPGA with an integrated Ethernet Mac. This solution provides extremely accurate synchronization by integrating the time-sensitive portions of the protocol within the physical layer.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127179957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383787
Daniel K6hler
To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.
{"title":"A Practical Implementation of an IEEE1588 supporting Ethernet Switch","authors":"Daniel K6hler","doi":"10.1109/ISPCS.2007.4383787","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383787","url":null,"abstract":"To enable bridging of multiple networking segments and allowing precise time synchronization between all nodes, an Ethernet switch is required which supports the IEEE 1588 protocol enabling distribution of precise timing information. The switch can serve as a master for all connected nodes as well as implement boundary and transparent clocking schemes propagating precise timing of a master to multiple slaves or networks as well as the local device. The article describes the application of IEEE 1588 within an actual FPGA based Ethernet switch hardware solution. Using FPGA technology and near-production hardware the implementation is evaluated and performance results are presented.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128532541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383789
M. Pinchas, R. Cohen
This paper describes a telecom circuit-emulation system that uses the precision time protocol (PTP) aka IEEE1588 for frequency distribution. The advantages of the use of PTP compared with traditional clock recovery mechanism are discussed. The architecture and its main design consideration are reviewed and preliminary performance tests results are demonstrated.
{"title":"A Combined PTP and Circuit-Emulation System","authors":"M. Pinchas, R. Cohen","doi":"10.1109/ISPCS.2007.4383789","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383789","url":null,"abstract":"This paper describes a telecom circuit-emulation system that uses the precision time protocol (PTP) aka IEEE1588 for frequency distribution. The advantages of the use of PTP compared with traditional clock recovery mechanism are discussed. The architecture and its main design consideration are reviewed and preliminary performance tests results are demonstrated.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"327 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122742068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383780
Dirk Mohl Hirschmann, Markus Renz Hirschmann
The boundary blocks (BC) defined in both versions of the IEEE1588 standard respectively draft standard evidence two problems when used in cascaded networks. Namely, there is strong nonlinear decreasing synchronization accuracy and rising resynchronization time after network reconfiguration. To eliminate these effects the concept of transparent clocks (TC) has been introduced in the IEEE 1588 standard version 2. The use of optimized control loops shows a clearly improved reconfiguration behavior and linear decreasing synchronization accuracy over a wide range of cascades. The paper furthermore will present related measurement results of highly (30) cascaded IEEE 1588 enabled switches. The results of the optimized control loops are compared with similar configurations based on TCs and BCs without optimization.
{"title":"Improved synchronization behavior in highly cascaded networks","authors":"Dirk Mohl Hirschmann, Markus Renz Hirschmann","doi":"10.1109/ISPCS.2007.4383780","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383780","url":null,"abstract":"The boundary blocks (BC) defined in both versions of the IEEE1588 standard respectively draft standard evidence two problems when used in cascaded networks. Namely, there is strong nonlinear decreasing synchronization accuracy and rising resynchronization time after network reconfiguration. To eliminate these effects the concept of transparent clocks (TC) has been introduced in the IEEE 1588 standard version 2. The use of optimized control loops shows a clearly improved reconfiguration behavior and linear decreasing synchronization accuracy over a wide range of cascades. The paper furthermore will present related measurement results of highly (30) cascaded IEEE 1588 enabled switches. The results of the optimized control loops are compared with similar configurations based on TCs and BCs without optimization.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127275416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383770
P. Ferrari, A. Flammini, D. Marioli, S. Rinaldi, Andrea Taroni
This work deals with distributed, multi-probe, instrument for performance analysis of Real-Time Ethernet (RTE) network Particularly, the work is focused on synchronization techniques for distributed measurements. In fact, the accuracy of results (typically jitter and delay) strictly depends on synchronization among distributed probes that sample data. Three synchronization techniques have been implemented and experimental results are reported. Synchronization by means of an external dedicated l-PPS signal gives the best results but requires a more complicated instrument structure. On the other hand, a network-oriented synchronization, such as IEEE 1588 FTP or PCTP (PROFINET 10), can simplify time distribution keeping accuracy well below 1 mus.
{"title":"Synchronization of the Probes of a Distributed Instrument for Real-Time Ethernet Networks","authors":"P. Ferrari, A. Flammini, D. Marioli, S. Rinaldi, Andrea Taroni","doi":"10.1109/ISPCS.2007.4383770","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383770","url":null,"abstract":"This work deals with distributed, multi-probe, instrument for performance analysis of Real-Time Ethernet (RTE) network Particularly, the work is focused on synchronization techniques for distributed measurements. In fact, the accuracy of results (typically jitter and delay) strictly depends on synchronization among distributed probes that sample data. Three synchronization techniques have been implemented and experimental results are reported. Synchronization by means of an external dedicated l-PPS signal gives the best results but requires a more complicated instrument structure. On the other hand, a network-oriented synchronization, such as IEEE 1588 FTP or PCTP (PROFINET 10), can simplify time distribution keeping accuracy well below 1 mus.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131097149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-19DOI: 10.1109/ISPCS.2007.4383774
Edward A. Lee, Slobodan Matic
We study event processing in locally distributed realtime systems. The objective is to use event-triggered communication together with a time-synchronization protocol, in particular. IEEE 1588 over Ethernet, to achieve the similar level of determinism as in statically scheduled time-triggered systems. Given a distributed application with component properties and input event rate characterization, we discuss an analytic procedure that bounds performance parameters. These parameters are also necessary for deterministic implementation of the application. The procedure is experimentally evaluated on a setup with standard software and networking components.
{"title":"On Determinism in Event-Triggered Distributed Systems with Time Synchronization","authors":"Edward A. Lee, Slobodan Matic","doi":"10.1109/ISPCS.2007.4383774","DOIUrl":"https://doi.org/10.1109/ISPCS.2007.4383774","url":null,"abstract":"We study event processing in locally distributed realtime systems. The objective is to use event-triggered communication together with a time-synchronization protocol, in particular. IEEE 1588 over Ethernet, to achieve the similar level of determinism as in statically scheduled time-triggered systems. Given a distributed application with component properties and input event rate characterization, we discuss an analytic procedure that bounds performance parameters. These parameters are also necessary for deterministic implementation of the application. The procedure is experimentally evaluated on a setup with standard software and networking components.","PeriodicalId":258197,"journal":{"name":"2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130829887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：