The theme of this conference, "New Developments in Computers" is most appropriate at this time as we enter the first generation of solid state computers, and an era of advanced systems design. Let us consider briefly why new developments occur. Some new developments are made to meet a need expressed by a customer, or user; others are made to meet their anticipated needs. How well the user's needs are met in contrast with the capabilities and costs of available equipment determines the degree of success of any new development. However, the user's view of a new development is not always as enthusiastic as that of its creator. The user's evaluation of the suitability and acceptability of the new development may differ from that of the creator because of variations in the method of evaluation, in technical background, and in the scope of related information, such as "what is available from competitors." Fortunately, there are many prospective users of computers, and their needs differ to such an extent that the field of interest for new developments is very wide. There is a natural urge for the user to partially or fully evaluate all new developments within his field of interest. Obviously, poorly conceived and poorly executed developments fall by the wayside because of lack of customer, or user acceptance.
{"title":"Evaluation of new computer components, equipments, and systems for naval use","authors":"L. Whitelock","doi":"10.1145/1455533.1455537","DOIUrl":"https://doi.org/10.1145/1455533.1455537","url":null,"abstract":"The theme of this conference, \"New Developments in Computers\" is most appropriate at this time as we enter the first generation of solid state computers, and an era of advanced systems design. Let us consider briefly why new developments occur. Some new developments are made to meet a need expressed by a customer, or user; others are made to meet their anticipated needs. How well the user's needs are met in contrast with the capabilities and costs of available equipment determines the degree of success of any new development. However, the user's view of a new development is not always as enthusiastic as that of its creator. The user's evaluation of the suitability and acceptability of the new development may differ from that of the creator because of variations in the method of evaluation, in technical background, and in the scope of related information, such as \"what is available from competitors.\" Fortunately, there are many prospective users of computers, and their needs differ to such an extent that the field of interest for new developments is very wide. There is a natural urge for the user to partially or fully evaluate all new developments within his field of interest. Obviously, poorly conceived and poorly executed developments fall by the wayside because of lack of customer, or user acceptance.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128646424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Synopsis: The Transac S-1000 is a scientific-type computer mechanized with direct-coupled transistor circuits. Double-address instructions are employed with a 36-binary-digit word length. A 4,096-word magnetic-core memory is used for highspeed storage. The machine is designed to accommodate such peripheral equipment as magnetic drum, magnetic tape, punched card, and paper tape. The packaging consists of printed circuitry so that the entire control computer occupies the volume allowed in a standard office desk (approximately 36 cubic feet). The total power dissipation is about 1.2 kilowatts. The speed of operation is at least as fast and in most cases faster then its vacuum-tube counterparts.
{"title":"The Transac S-1000 computer","authors":"J. Maddox, J. O'Toole, S. Wong","doi":"10.1145/1455533.1455538","DOIUrl":"https://doi.org/10.1145/1455533.1455538","url":null,"abstract":"Synopsis: The Transac S-1000 is a scientific-type computer mechanized with direct-coupled transistor circuits. Double-address instructions are employed with a 36-binary-digit word length. A 4,096-word magnetic-core memory is used for highspeed storage. The machine is designed to accommodate such peripheral equipment as magnetic drum, magnetic tape, punched card, and paper tape. The packaging consists of printed circuitry so that the entire control computer occupies the volume allowed in a standard office desk (approximately 36 cubic feet). The total power dissipation is about 1.2 kilowatts. The speed of operation is at least as fast and in most cases faster then its vacuum-tube counterparts.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129162501","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
UNIVAC®-Larc, the Livermore Atomic Research Computer, is being built for the University of California's Radiation Laboratories at Livermore, California. Larc (Fig. 1), is Remington Rand Univac's newest all solid-state large-scale computer, over 100 times faster than today's scientific computers and internally 1,000 times faster than today's business data-processing system. The design is based entirely on existing components. The customer can expect delivery in 1958. My paper is directed primarily at the systems aspect of the design.
{"title":"Univac-Larc, the next step in computer design","authors":"J. P. Eckert","doi":"10.1145/1455533.1455539","DOIUrl":"https://doi.org/10.1145/1455533.1455539","url":null,"abstract":"UNIVAC®-Larc, the Livermore Atomic Research Computer, is being built for the University of California's Radiation Laboratories at Livermore, California. Larc (Fig. 1), is Remington Rand Univac's newest all solid-state large-scale computer, over 100 times faster than today's scientific computers and internally 1,000 times faster than today's business data-processing system. The design is based entirely on existing components. The customer can expect delivery in 1958. My paper is directed primarily at the systems aspect of the design.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123601239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Synopsis: TX-0 is a high-speed digital computer which was built at Lincoln Laboratory to demonstrate and operationally test 5-megapulse transistor circuitry and a 65,536-word magnetic-core memory. The word length is 19 bits; 1 bit is a parity check bit for memory, 16 bits are assigned to memory addressing, and the 2 remaining bits are used to select among three memory-reference instructions and one microprogramming instruction. The logic is performed by standardized packages using surface barrier transistors. Fig. 1 shows TX-0 with the arithmetic element just beyond the console and the memory on the far left. Part I of this paper covers the TX-0 memory, and Part II the TX-0 circuitry.
{"title":"TX-0, a transistor computer with a 256 by 256 memory","authors":"J. Mitchell, K. Olsen","doi":"10.1145/1455533.1455556","DOIUrl":"https://doi.org/10.1145/1455533.1455556","url":null,"abstract":"Synopsis: TX-0 is a high-speed digital computer which was built at Lincoln Laboratory to demonstrate and operationally test 5-megapulse transistor circuitry and a 65,536-word magnetic-core memory. The word length is 19 bits; 1 bit is a parity check bit for memory, 16 bits are assigned to memory addressing, and the 2 remaining bits are used to select among three memory-reference instructions and one microprogramming instruction. The logic is performed by standardized packages using surface barrier transistors. Fig. 1 shows TX-0 with the arithmetic element just beyond the console and the memory on the far left. Part I of this paper covers the TX-0 memory, and Part II the TX-0 circuitry.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132858267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The present status of the co-incident-current matrix memory is largely one of hope for the future, in so far as very large memory systems are concerned. Memories made to use presently available materials are limited by cost and associated engineering problems. The problems arise largely from the use of ferrite cores. The major problem is the nonuniformity of the cores. Procurement, core testing, matrix wiring, matrix testing, and core replacement also present serious difficulties. Complicating these problems are the material properties of the ferrites, such as temperature and strain sensitivity, the necessity for operating on a minor hysteresis loop, and the difficulties encountered in varying the magnetic parameters to fit a core to a system.
{"title":"Megabit memory","authors":"R. Tracy","doi":"10.1145/1455533.1455558","DOIUrl":"https://doi.org/10.1145/1455533.1455558","url":null,"abstract":"The present status of the co-incident-current matrix memory is largely one of hope for the future, in so far as very large memory systems are concerned. Memories made to use presently available materials are limited by cost and associated engineering problems. The problems arise largely from the use of ferrite cores. The major problem is the nonuniformity of the cores. Procurement, core testing, matrix wiring, matrix testing, and core replacement also present serious difficulties. Complicating these problems are the material properties of the ferrites, such as temperature and strain sensitivity, the necessity for operating on a minor hysteresis loop, and the difficulties encountered in varying the magnetic parameters to fit a core to a system.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130276167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The cryotron, a new computer component based on the phenomenon of superconductivity, may have an important influence on future developments in the field of computers and data-handling machines. At the present time the cryotron has a slower switching speed than transistors, but there are reasons for believing that the speed can be increased considerably.
{"title":"A cryotron catalog memory system","authors":"A. Slade, H. Mcmahon","doi":"10.1145/1455533.1455560","DOIUrl":"https://doi.org/10.1145/1455533.1455560","url":null,"abstract":"The cryotron, a new computer component based on the phenomenon of superconductivity, may have an important influence on future developments in the field of computers and data-handling machines. At the present time the cryotron has a slower switching speed than transistors, but there are reasons for believing that the speed can be increased considerably.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128867342","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Synopsis: A new automatic data-processing machine for business applications, utilizing a random-access memory system, is described. Unlike the usual batch method of machine-processing business transactions, the technique used permits transfer of information between any two points in the system and makes multi-choice decisions according to the current status of the information. This in-line operational concept is discussed in detail and the data transfer routes and processing controls are shown. Employing punched card input and printed-record output, the IBM (International Business Machines Corporation) 305 accounting machine is designed to handle 10,000 line-transactions per day.
{"title":"The RAMAC data-processing machine: system organization of the IBM 305","authors":"M. Lesser, J. Haanstra","doi":"10.1145/1455533.1455565","DOIUrl":"https://doi.org/10.1145/1455533.1455565","url":null,"abstract":"Synopsis: A new automatic data-processing machine for business applications, utilizing a random-access memory system, is described. Unlike the usual batch method of machine-processing business transactions, the technique used permits transfer of information between any two points in the system and makes multi-choice decisions according to the current status of the information. This in-line operational concept is discussed in detail and the data transfer routes and processing controls are shown. Employing punched card input and printed-record output, the IBM (International Business Machines Corporation) 305 accounting machine is designed to handle 10,000 line-transactions per day.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122710531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Thank you Mr. Chairman, for your generous introduction which is clearly designed to ensure me, up to this moment, some measure of respect. You were too polite to suspect that what I really need is your sympathy: yesterday afternoon tea and sympathy (preferably from my dear friend, Deborah Kerr), and today luncheon and sympathy from E. J. C. C. It is a terrible thing to be the only confused person among 2,500 pellucid philosophers busily propogating their electric poetry through electric plumbing.
{"title":"Are computers important?","authors":"R. Watson-Watt","doi":"10.1145/1455533.1455550","DOIUrl":"https://doi.org/10.1145/1455533.1455550","url":null,"abstract":"Thank you Mr. Chairman, for your generous introduction which is clearly designed to ensure me, up to this moment, some measure of respect. You were too polite to suspect that what I really need is your sympathy: yesterday afternoon tea and sympathy (preferably from my dear friend, Deborah Kerr), and today luncheon and sympathy from E. J. C. C. It is a terrible thing to be the only confused person among 2,500 pellucid philosophers busily propogating their electric poetry through electric plumbing.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126045421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Synopsis: This paper will be in four parts, the first section will cover a system concept involving an automatic digital datahandling system feeding a high-speed output directly rather than through a buffer such as a tape storage system. Some representative programming details are indicated for this type of system involving the Ordvac computer. The next part covers the design approach, and details of the particular mechanization which was chosen to satisfy the requirement based upon electrographic recording. The electrographic recording technique is reviewed and the various relevant parts of the plotter and its capability are discussed. The third part covers the details of the computer programming required to achieve the direct output described in the first section. Part four covers some of the results obtained on the feasibility model of the printer-plotter in actual use.
{"title":"The Burroughs electrographic printer-plotter for ordnance computing","authors":"H. Epstein, P. Kintner","doi":"10.1145/1455533.1455552","DOIUrl":"https://doi.org/10.1145/1455533.1455552","url":null,"abstract":"Synopsis: This paper will be in four parts, the first section will cover a system concept involving an automatic digital datahandling system feeding a high-speed output directly rather than through a buffer such as a tape storage system. Some representative programming details are indicated for this type of system involving the Ordvac computer. The next part covers the design approach, and details of the particular mechanization which was chosen to satisfy the requirement based upon electrographic recording. The electrographic recording technique is reviewed and the various relevant parts of the plotter and its capability are discussed. The third part covers the details of the computer programming required to achieve the direct output described in the first section. Part four covers some of the results obtained on the feasibility model of the printer-plotter in actual use.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115756867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Over the years there have been many outstanding papers which can be assembled under the collective title "Component Failure Analysis." Included in this group are the tube-life prediction tables, the derating charts for condensors, the maximum current versus useful life curves for diodes, etc.; and each company that has a customer service organization has in its files records loosely titled "Plug-in Failures, Their Cause and Cure." An examination of the records will show that in the majority of cases the "active" elements are at fault. Active elements are defined here as those elements which amplify a changed state of their inputs. It would seem, then, that the path to reliability is to remove as many active elements as possible from the system; that is, given some specific design problem, to time-share the active elements as much as possible in keeping with the flexibility required of the overall design. But this philosophy is not without its attendant apparent disadvantage. To use a minimum of active elements, a maximum of switching elements is required. To utilize the minimum active elements concept, a switching element approaching the ideal is required.
{"title":"A technique for using memory cores as logical elements","authors":"L. J. Andrews","doi":"10.1145/1455533.1455544","DOIUrl":"https://doi.org/10.1145/1455533.1455544","url":null,"abstract":"Over the years there have been many outstanding papers which can be assembled under the collective title \"Component Failure Analysis.\" Included in this group are the tube-life prediction tables, the derating charts for condensors, the maximum current versus useful life curves for diodes, etc.; and each company that has a customer service organization has in its files records loosely titled \"Plug-in Failures, Their Cause and Cure.\" An examination of the records will show that in the majority of cases the \"active\" elements are at fault. Active elements are defined here as those elements which amplify a changed state of their inputs. It would seem, then, that the path to reliability is to remove as many active elements as possible from the system; that is, given some specific design problem, to time-share the active elements as much as possible in keeping with the flexibility required of the overall design. But this philosophy is not without its attendant apparent disadvantage. To use a minimum of active elements, a maximum of switching elements is required. To utilize the minimum active elements concept, a switching element approaching the ideal is required.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1956-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127960215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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