Brokers are critical elements for many publish and subscribe (pub/sub) systems. They are dedicated devices with large computation and storage capacities, but they could suffer from scalability problems when comes to actual large-scale implementations in wireless sensor networks. Inspired by the recent virtual MIMO concept for wireless sensor networks, this paper proposes the idea of ‘virtual brokers’ for large-scale pub/sub systems in sensor networks, and presents in detail the design of a three-stage algorithm for forming a virtual broker around multiple co-located sensor nodes using only network connectivity information. Using computer modeling, we conduct an investigation of our virtual broker formation algorithm and preliminary results demonstrate the potential of our algorithm for scalable formation of virtual brokers.
{"title":"Virtual Brokers for Large-Scale Publish/Subscribe in Wireless Sensor Networks","authors":"Yang Liu, Boon-Chong Seet, A. Al-Anbuky","doi":"10.1109/EUC.2010.42","DOIUrl":"https://doi.org/10.1109/EUC.2010.42","url":null,"abstract":"Brokers are critical elements for many publish and subscribe (pub/sub) systems. They are dedicated devices with large computation and storage capacities, but they could suffer from scalability problems when comes to actual large-scale implementations in wireless sensor networks. Inspired by the recent virtual MIMO concept for wireless sensor networks, this paper proposes the idea of ‘virtual brokers’ for large-scale pub/sub systems in sensor networks, and presents in detail the design of a three-stage algorithm for forming a virtual broker around multiple co-located sensor nodes using only network connectivity information. Using computer modeling, we conduct an investigation of our virtual broker formation algorithm and preliminary results demonstrate the potential of our algorithm for scalable formation of virtual brokers.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125168401","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The security of Wireless Sensor Networks (WSNs) has a direct reliance on secure and efficient key management. This leaves key management as a fundamental research topic in the field of WSNs security. Among the proposed key management schemes for WSNs security, LEAP (Localized Encryption and Authentication Protocol) has been regarded as an efficient protocol over the last years. LEAP supports the establishment of four types of keys. The security of these keys is under the assumption that the initial deployment phase is secure and the initial key is erased from sensor nodes after the initialization phase. However, the initial key is used again for node addition after the initialization phase whereas the new node can be compromised before erasing the key. A time-based key management scheme rethought the security of LEAP. We show the deficiency of the time-based key management scheme and proposed a key management scheme for multi-phase WSNs in this paper. The proposed scheme disperses the damage resulting from the disclosure of the initial key. We show it has better resilience and higher key connectivity probability through the analysis.
{"title":"A Key Management Protocol for Multiphase Hierarchical Wireless Sensor Networks","authors":"B. Tian, Song Han, S. Parvin, T. Dillon","doi":"10.1109/EUC.2010.99","DOIUrl":"https://doi.org/10.1109/EUC.2010.99","url":null,"abstract":"The security of Wireless Sensor Networks (WSNs) has a direct reliance on secure and efficient key management. This leaves key management as a fundamental research topic in the field of WSNs security. Among the proposed key management schemes for WSNs security, LEAP (Localized Encryption and Authentication Protocol) has been regarded as an efficient protocol over the last years. LEAP supports the establishment of four types of keys. The security of these keys is under the assumption that the initial deployment phase is secure and the initial key is erased from sensor nodes after the initialization phase. However, the initial key is used again for node addition after the initialization phase whereas the new node can be compromised before erasing the key. A time-based key management scheme rethought the security of LEAP. We show the deficiency of the time-based key management scheme and proposed a key management scheme for multi-phase WSNs in this paper. The proposed scheme disperses the damage resulting from the disclosure of the initial key. We show it has better resilience and higher key connectivity probability through the analysis.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124197630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Conditional execution is an important ISA feature of the ARM series of processors. Every instruction can be made to execute conditionally, that is, it is treated as a NOP if the condition is not met. The advantage of conditional execution is that it can maintain high performance while reducing hardware complexity since it can avoid introducing pipeline bubbles even when no branch prediction units are needed. However, conditional execution takes up precious instruction space as conditions are encoded into a 4-bit condition code selector on every 32-bit ARM instruction. Besides, only small percentages of instructions are actually conditionalized in modern embedded applications, and conditional execution might not even lead to performance improvement on modern embedded processors. This paper proposes to trade conditional execution for more ISA registers on ARM processors, and the 4-bit condition field will be used to encode the extra registers. GCC has been ported to generate ARM code with the new instruction format and experimental results have shown that performance can be improved by 6% on average for Media Bench II benchmarks when the number of ISA registers is extended from 16 to 32.
{"title":"Trading Conditional Execution for More Registers on ARM Processors","authors":"Huang-Jia Cheng, Yuan-Shin Hwang, Rong-Guey Chang, Cheng-Wei Chen","doi":"10.1109/EUC.2010.18","DOIUrl":"https://doi.org/10.1109/EUC.2010.18","url":null,"abstract":"Conditional execution is an important ISA feature of the ARM series of processors. Every instruction can be made to execute conditionally, that is, it is treated as a NOP if the condition is not met. The advantage of conditional execution is that it can maintain high performance while reducing hardware complexity since it can avoid introducing pipeline bubbles even when no branch prediction units are needed. However, conditional execution takes up precious instruction space as conditions are encoded into a 4-bit condition code selector on every 32-bit ARM instruction. Besides, only small percentages of instructions are actually conditionalized in modern embedded applications, and conditional execution might not even lead to performance improvement on modern embedded processors. This paper proposes to trade conditional execution for more ISA registers on ARM processors, and the 4-bit condition field will be used to encode the extra registers. GCC has been ported to generate ARM code with the new instruction format and experimental results have shown that performance can be improved by 6% on average for Media Bench II benchmarks when the number of ISA registers is extended from 16 to 32.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130319267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Complexity in Distributed Real time Embedded Systems (DRTES) is rising due to richer functionality that is enabled by more powerful hardware. Component-Based Software Engineering (CBSE) and Model Driven Engineering (MDE) help to capture several facets of this complexity. With these two approaches, we build on two main currents in embedded systems research: synchronization and communication. In this paper, we propose a DRTES meta-model to deal with software and hardware aspects of synchronization and communication at a model level. The elements of this meta-model will be used to describe software and hardware specifications and requirements using component as a first class artifact to build such systems. Each component type (generic component) has several instances and multiple views, principally software or hardware one with specific links. The link offers an interface to choose the map between a software and a hardware component at an even greater level using UML profiles derived from DRTES meta-model. This is to allow an automatic exploration at component instance level via Model Driven Engineering. As a proof of concept we examine a test case that has software and hardware synchronization and communication requirements: a GPS.
{"title":"An Environment for Design Software and Hardware Aspects of Clock Synchronization and Communication in DRTES","authors":"B. Hamid, A. Ziani","doi":"10.1109/EUC.2010.19","DOIUrl":"https://doi.org/10.1109/EUC.2010.19","url":null,"abstract":"Complexity in Distributed Real time Embedded Systems (DRTES) is rising due to richer functionality that is enabled by more powerful hardware. Component-Based Software Engineering (CBSE) and Model Driven Engineering (MDE) help to capture several facets of this complexity. With these two approaches, we build on two main currents in embedded systems research: synchronization and communication. In this paper, we propose a DRTES meta-model to deal with software and hardware aspects of synchronization and communication at a model level. The elements of this meta-model will be used to describe software and hardware specifications and requirements using component as a first class artifact to build such systems. Each component type (generic component) has several instances and multiple views, principally software or hardware one with specific links. The link offers an interface to choose the map between a software and a hardware component at an even greater level using UML profiles derived from DRTES meta-model. This is to allow an automatic exploration at component instance level via Model Driven Engineering. As a proof of concept we examine a test case that has software and hardware synchronization and communication requirements: a GPS.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121211619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Authentication schemes play vital roles in computer and communication security. In order to authenticate the remote users, password based schemes have been widely used. In this paper we introduce a secure remote user authentication scheme based on bilinear pairing that satisfies all security requirements which are mentioned for password based authentication schemes using smart card.
{"title":"A Novel Secure Bilinear Pairing Based Remote User Authentication Scheme with Smart Card","authors":"M. Bayat, M. Farash, Amirvala Movahed","doi":"10.1109/EUC.2010.93","DOIUrl":"https://doi.org/10.1109/EUC.2010.93","url":null,"abstract":"Authentication schemes play vital roles in computer and communication security. In order to authenticate the remote users, password based schemes have been widely used. In this paper we introduce a secure remote user authentication scheme based on bilinear pairing that satisfies all security requirements which are mentioned for password based authentication schemes using smart card.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121238928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper we propose a hardware assisted software protection scheme that relies on the use of a resource-limited secure token ({em e.g.} a smart card). The protection consists in externalizing the execution of the sensitive pieces of code of the application to be protected to the token block by block, while the unsensitive code is still executed inside the untrusted computer. We define a generic process: the protection is enforced automatically. Our method relies on static analysis techniques that are used to infer the parts of code to be externalized together with run-time externalization protocol. We have developed a software environment implementing this technology for Java applications.
{"title":"Automated Software Protection through Program Externalization on Memory-Limited Secure Devices","authors":"S. Chaumette, Olivier Ly, Renaud Tabary","doi":"10.1109/EUC.2010.122","DOIUrl":"https://doi.org/10.1109/EUC.2010.122","url":null,"abstract":"In this paper we propose a hardware assisted software protection scheme that relies on the use of a resource-limited secure token ({em e.g.} a smart card). The protection consists in externalizing the execution of the sensitive pieces of code of the application to be protected to the token block by block, while the unsensitive code is still executed inside the untrusted computer. We define a generic process: the protection is enforced automatically. Our method relies on static analysis techniques that are used to infer the parts of code to be externalized together with run-time externalization protocol. We have developed a software environment implementing this technology for Java applications.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131029538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Abhilash Thekkilakattil, A. Pillai, R. Dobrin, S. Punnekkat
Controlling the number of preemptions in real time systems is highly desirable in order to achieve an efficient system design in multiple contexts. For example, the delays due to context switches account for high preemption overheads which detrimentally impact the system schedulability. Preemption control can also be potentially used for the efficient control of critical section behaviors in multi-threaded applications. At the same time, modern processor architectures provide for the ability to selectively choose operating frequencies, primarily targeting energy efficiency as well as system performance. In this paper, we propose the use of CPU Frequency Scaling for controlling the preemptive behavior of real-time tasks. We present a framework for selectively eliminating preemptions, that does not require modifications to the task attributes or to the underlying scheduler. We evaluate the proposed approach by four different heuristics through extensive simulation studies.
{"title":"Preemption Control Using Frequency Scaling in Fixed Priority Scheduling","authors":"Abhilash Thekkilakattil, A. Pillai, R. Dobrin, S. Punnekkat","doi":"10.1109/EUC.2010.47","DOIUrl":"https://doi.org/10.1109/EUC.2010.47","url":null,"abstract":"Controlling the number of preemptions in real time systems is highly desirable in order to achieve an efficient system design in multiple contexts. For example, the delays due to context switches account for high preemption overheads which detrimentally impact the system schedulability. Preemption control can also be potentially used for the efficient control of critical section behaviors in multi-threaded applications. At the same time, modern processor architectures provide for the ability to selectively choose operating frequencies, primarily targeting energy efficiency as well as system performance. In this paper, we propose the use of CPU Frequency Scaling for controlling the preemptive behavior of real-time tasks. We present a framework for selectively eliminating preemptions, that does not require modifications to the task attributes or to the underlying scheduler. We evaluate the proposed approach by four different heuristics through extensive simulation studies.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116884386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shaoyin Cheng, Jinding Wang, Jiajie Wang, Jun Yang, Fan Jiang
The automatic detection of security vulnerabilities in binary program is challenging and lacks efficient tools. Current research and tools are mostly restricted to a specific platform and environment, which induces the trouble to detect all kinds of vulnerabilities with unified approach. Moreover, Existing methods need many manual operations and rely on the experience of researchers. This paper presents a cross-platform system for automatically software vulnerability detection based on uniform intermediate representation. It supports many platforms, including x86, PowerPC and ARM. The system lifts underlying instructions to intermediate representation from several platforms. Platform-independent analysis method is implemented based on intermediate representation by static analysis. It also uses a vulnerability pattern driver extracted from experience and knowledge to drive the automatic vulnerability detection during the analysis. The system called PDVDS has been realized. We have evaluated its effectiveness through validating many known vulnerabilities and detecting three zero-day vulnerabilities.
{"title":"PDVDS: A Pattern-Driven Software Vulnerability Detection System","authors":"Shaoyin Cheng, Jinding Wang, Jiajie Wang, Jun Yang, Fan Jiang","doi":"10.1109/EUC.2010.88","DOIUrl":"https://doi.org/10.1109/EUC.2010.88","url":null,"abstract":"The automatic detection of security vulnerabilities in binary program is challenging and lacks efficient tools. Current research and tools are mostly restricted to a specific platform and environment, which induces the trouble to detect all kinds of vulnerabilities with unified approach. Moreover, Existing methods need many manual operations and rely on the experience of researchers. This paper presents a cross-platform system for automatically software vulnerability detection based on uniform intermediate representation. It supports many platforms, including x86, PowerPC and ARM. The system lifts underlying instructions to intermediate representation from several platforms. Platform-independent analysis method is implemented based on intermediate representation by static analysis. It also uses a vulnerability pattern driver extracted from experience and knowledge to drive the automatic vulnerability detection during the analysis. The system called PDVDS has been realized. We have evaluated its effectiveness through validating many known vulnerabilities and detecting three zero-day vulnerabilities.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115218278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yung-Pyo Kim, Jung-Il Namgung, N. Yun, Hui-Jin Cho, Imtiaz Ahmed Khan, Soo-Hyun Park
Underwater acoustic communication, compared with Wireless Sensor Networks (WSNs) used in terrestrial environment, poses unique challenges due to the harsh underwater environment, such as limited bandwidth capacity, high and variable propagation delays, high bit error rates, and temporary losses connectivity caused by multipath and fading phenomena in spite of using a variety of applications in many areas. In this paper we specify to develop the baseboard using characteristics of ARM9 processor based on low power consumption to enhance the performance, to improve a variety of restrictions. And we describe the process of the underwater communication that demonstrates and designs test-bed of the underwater acoustic sensor network with a similar actual environment.
{"title":"Design and Implementation of the Test-bed for Underwater Acoustic Sensor Network Based on ARM9 Processor","authors":"Yung-Pyo Kim, Jung-Il Namgung, N. Yun, Hui-Jin Cho, Imtiaz Ahmed Khan, Soo-Hyun Park","doi":"10.1109/EUC.2010.49","DOIUrl":"https://doi.org/10.1109/EUC.2010.49","url":null,"abstract":"Underwater acoustic communication, compared with Wireless Sensor Networks (WSNs) used in terrestrial environment, poses unique challenges due to the harsh underwater environment, such as limited bandwidth capacity, high and variable propagation delays, high bit error rates, and temporary losses connectivity caused by multipath and fading phenomena in spite of using a variety of applications in many areas. In this paper we specify to develop the baseboard using characteristics of ARM9 processor based on low power consumption to enhance the performance, to improve a variety of restrictions. And we describe the process of the underwater communication that demonstrates and designs test-bed of the underwater acoustic sensor network with a similar actual environment.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115591687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The Issuer Centric Smart Card Ownership Model (ICOM) gives complete control of smart cards to their respective card issuers, enabling them to install, modify or delete applications remotely, in a secure manner. However, the User Centric Smart Card Ownership Model (UCOM) delegates the ownership of smart cards to their users, entitling them to install or delete any application according to their requirements. In the UCOM there might be no off-card relationship between a smart card and an application provider, referred to as a Service Provider, which is the cornerstone of the ICOM security framework. Therefore, this creates unique security issues like the simulator problem, in which a malicious user may simulate the smart card environment on a computing device and requests installation of an application. Following this, it might be possible to retrieve sensitive application data by reverse engineering. In this paper, we analyse the simulator problem, how it affects the UCOM and propose a possible solution.
{"title":"Simulator Problem in User Centric Smart Card Ownership Model","authors":"Raja Naeem Akram, K. Markantonakis, K. Mayes","doi":"10.1109/EUC.2010.108","DOIUrl":"https://doi.org/10.1109/EUC.2010.108","url":null,"abstract":"The Issuer Centric Smart Card Ownership Model (ICOM) gives complete control of smart cards to their respective card issuers, enabling them to install, modify or delete applications remotely, in a secure manner. However, the User Centric Smart Card Ownership Model (UCOM) delegates the ownership of smart cards to their users, entitling them to install or delete any application according to their requirements. In the UCOM there might be no off-card relationship between a smart card and an application provider, referred to as a Service Provider, which is the cornerstone of the ICOM security framework. Therefore, this creates unique security issues like the simulator problem, in which a malicious user may simulate the smart card environment on a computing device and requests installation of an application. Following this, it might be possible to retrieve sensitive application data by reverse engineering. In this paper, we analyse the simulator problem, how it affects the UCOM and propose a possible solution.","PeriodicalId":265175,"journal":{"name":"2010 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2010-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124964047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：