Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986012
Qing Xu, H. Rastegarfar, Yousra Ben M'Sallem, S. Larochelle, A. Leon-Garcia, L. Rusch
All-optical switching has been proposed to overcome the limitations of electronic switches in terms of scalability, speed, footprint, and power consumption. A key passive optical component to bypass electronic processing limitations is the arrayed waveguide grating (AWG). Switch architectures combining wavelength converters and fiber delay lines provide tunable routing and contention resolution when used with AWGs. An AWG passively routes either single or multiple input port wavelengths to its output ports. A single wavelength per port strategy reduces crosstalk within the AWG, but drastically increases the dimensionality of the device. Physical constraints on AWG design limit the port number for the foreseeable future to under 100. To scale optical switches to emerging network requirements, we can use multiple wavelengths per port. In this paper we examine one multiple wavelength per port architecture and quantify the physical layer impairments due not only to the AWG crosstalk, but also Q-factor degradation due to multiple wavelength conversions, and as a function of the number of recirculations in the contention resolution delay lines. While previous work has addressed this issue in terms of accumulated loss, we focus on accumulated relative intensity noise and amplified spontaneous emission.
{"title":"OOK Q-factor degradation in scalable optical switches","authors":"Qing Xu, H. Rastegarfar, Yousra Ben M'Sallem, S. Larochelle, A. Leon-Garcia, L. Rusch","doi":"10.1109/HPSR.2011.5986012","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986012","url":null,"abstract":"All-optical switching has been proposed to overcome the limitations of electronic switches in terms of scalability, speed, footprint, and power consumption. A key passive optical component to bypass electronic processing limitations is the arrayed waveguide grating (AWG). Switch architectures combining wavelength converters and fiber delay lines provide tunable routing and contention resolution when used with AWGs. An AWG passively routes either single or multiple input port wavelengths to its output ports. A single wavelength per port strategy reduces crosstalk within the AWG, but drastically increases the dimensionality of the device. Physical constraints on AWG design limit the port number for the foreseeable future to under 100. To scale optical switches to emerging network requirements, we can use multiple wavelengths per port. In this paper we examine one multiple wavelength per port architecture and quantify the physical layer impairments due not only to the AWG crosstalk, but also Q-factor degradation due to multiple wavelength conversions, and as a function of the number of recirculations in the contention resolution delay lines. While previous work has addressed this issue in terms of accumulated loss, we focus on accumulated relative intensity noise and amplified spontaneous emission.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133444942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986017
V. Murcia, Meli Delgado, T. R. Vargas, J. C. Guerri, J. Antich
This paper shows that a reasonably better network bandwidth utilization in IPTV or general video delivery networks can be obtained with an automated RSVP-TE LSP reservation mechanism and by adding some video-awareness “intelligence” to certain Label Switching Routers which are part of the service provider's MPLS core network. We have implemented this intelligence on Juniper routers taking advantage of the JUNOS SDK, deployed the solution on a network test bed, and performed some measurements to validate the previous statement.
{"title":"VAIPA: A video-aware internet protocol architecture","authors":"V. Murcia, Meli Delgado, T. R. Vargas, J. C. Guerri, J. Antich","doi":"10.1109/HPSR.2011.5986017","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986017","url":null,"abstract":"This paper shows that a reasonably better network bandwidth utilization in IPTV or general video delivery networks can be obtained with an automated RSVP-TE LSP reservation mechanism and by adding some video-awareness “intelligence” to certain Label Switching Routers which are part of the service provider's MPLS core network. We have implemented this intelligence on Juniper routers taking advantage of the JUNOS SDK, deployed the solution on a network test bed, and performed some measurements to validate the previous statement.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125501460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986006
M. Caria, M. Chamania, A. Jukan
In this paper, we present a simple case study on energy efficiency in IP-over-WDM networks with dynamic circuit capability and compare two different load adaptive schemes, referred to as switch-on and switch-off. While the switch-off technique was already proposed for energy conservation, the switch-on approach is a new paradigm which is based purely on one-time implementations of dynamic circuit capability. Our results show that both approaches can significantly reduce the power consumption and decrease the necessary totally installed capacity, but unlike the switch-off scheme, the switch-on scheme does not affect the path redundancy in the network. Furthermore, switch-on can reduce the number of routing reconfigurations required in the network. While this seems ideal, our results also show that the switch-on scheme uses a large number of small capacity interfaces which may not be suitable from a network planning perspective as it might require frequent capacity upgrades, which alone is an interesting avenue for future research.
{"title":"To switch on or off: A simple case study on energy efficiency in IP-over-WDM networks","authors":"M. Caria, M. Chamania, A. Jukan","doi":"10.1109/HPSR.2011.5986006","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986006","url":null,"abstract":"In this paper, we present a simple case study on energy efficiency in IP-over-WDM networks with dynamic circuit capability and compare two different load adaptive schemes, referred to as switch-on and switch-off. While the switch-off technique was already proposed for energy conservation, the switch-on approach is a new paradigm which is based purely on one-time implementations of dynamic circuit capability. Our results show that both approaches can significantly reduce the power consumption and decrease the necessary totally installed capacity, but unlike the switch-off scheme, the switch-on scheme does not affect the path redundancy in the network. Furthermore, switch-on can reduce the number of routing reconfigurations required in the network. While this seems ideal, our results also show that the switch-on scheme uses a large number of small capacity interfaces which may not be suitable from a network planning perspective as it might require frequent capacity upgrades, which alone is an interesting avenue for future research.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126877627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986029
Voravit Tanyingyong, M. Hidell, Peter Sjödin
OpenFlow is a promising technology that offers a flexible flow-based forwarding scheme based on multiple fields in the packet headers of different protocol layers. It provides a feasibility to adopt new network protocols and innovations thanks to a more flexible forwarding compared to traditional IP forwarding. In this paper, we propose an architectural design to improve lookup performance of PC-based OpenFlow switching in Linux using a standard commodity network interface card based on the Intel 82599 Gigabit Ethernet controller. We introduce a fast data path based on caching of flow table entries in on-board classification hardware on the NIC. We describe our design, and we present an experimental evaluation of its performance. Our results show that the throughput of our fast path gives over 40 percent higher throughput compared to the regular software-based OpenFlow switching.
{"title":"Using hardware classification to improve PC-based OpenFlow switching","authors":"Voravit Tanyingyong, M. Hidell, Peter Sjödin","doi":"10.1109/HPSR.2011.5986029","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986029","url":null,"abstract":"OpenFlow is a promising technology that offers a flexible flow-based forwarding scheme based on multiple fields in the packet headers of different protocol layers. It provides a feasibility to adopt new network protocols and innovations thanks to a more flexible forwarding compared to traditional IP forwarding. In this paper, we propose an architectural design to improve lookup performance of PC-based OpenFlow switching in Linux using a standard commodity network interface card based on the Intel 82599 Gigabit Ethernet controller. We introduce a fast data path based on caching of flow table entries in on-board classification hardware on the NIC. We describe our design, and we present an experimental evaluation of its performance. Our results show that the throughput of our fast path gives over 40 percent higher throughput compared to the regular software-based OpenFlow switching.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132452973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986016
A. Francini
The scalability and energy efficiency of future network equipment will critically depend on the ability to confine the memories that implement the packet buffers within the same traffic management chips that process and forward the packets. Despite massive research efforts aimed at trimming its demand of large buffers for the accommodation of TCP traffic, the bandwidth-delay product (BDP) rule remains to-date the dominant criterion for the sizing of packet buffers in commercial network elements, and arguably the only cause for their implementation in off-chip memories. Only the lack of a valid alternative justifies the lasting popularity of conventional buffer management methods for TCP traffic such as Tail Drop and Random Early Detection (RED), which fail to reconcile small buffer sizes with high-end throughput performance. Our contribution is twofold. First, we show that the RED algorithm is intrinsically flawed because of the way it maps buffer occupancy levels onto packet drop probabilities. Second, we introduce Periodic Early Detection (PED), a buffer management scheme with touchless configuration that sustains 100% link utilization using only 2.5% of the memory required by the BDP rule. While a more comprehensive study of PED's properties is in order, the clear superiority of the scheme under common benchmarking setups places it at the forefront of the candidate enablers for the on-chip implementation of buffer memories.
未来网络设备的可扩展性和能源效率将严重依赖于将实现数据包缓冲的存储器限制在处理和转发数据包的相同流量管理芯片中的能力。尽管大量的研究工作旨在减少其对大型缓冲区的需求，以适应TCP流量，但带宽延迟产品(BDP)规则至今仍然是商业网络元素中数据包缓冲区大小的主要标准，并且可以说是它们在片外存储器中实现的唯一原因。由于缺乏有效的替代方案，TCP流量的传统缓冲区管理方法(如Tail Drop和Random Early Detection, RED)才会持续流行，因为它们无法协调小缓冲区大小和高端吞吐量性能。我们的贡献是双重的。首先，我们表明RED算法本质上是有缺陷的，因为它将缓冲区占用水平映射到数据包丢弃概率的方式。其次，我们引入了周期性早期检测(PED)，这是一种具有非接触式配置的缓冲区管理方案，仅使用BDP规则所需内存的2.5%来维持100%的链路利用率。虽然需要对PED的特性进行更全面的研究，但在常见的基准测试设置下，该方案的明显优势使其处于缓冲存储器片上实现的候选启用器的前列。
{"title":"Beyond RED: Periodic Early Detection for on-chip buffer memories in network elements","authors":"A. Francini","doi":"10.1109/HPSR.2011.5986016","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986016","url":null,"abstract":"The scalability and energy efficiency of future network equipment will critically depend on the ability to confine the memories that implement the packet buffers within the same traffic management chips that process and forward the packets. Despite massive research efforts aimed at trimming its demand of large buffers for the accommodation of TCP traffic, the bandwidth-delay product (BDP) rule remains to-date the dominant criterion for the sizing of packet buffers in commercial network elements, and arguably the only cause for their implementation in off-chip memories. Only the lack of a valid alternative justifies the lasting popularity of conventional buffer management methods for TCP traffic such as Tail Drop and Random Early Detection (RED), which fail to reconcile small buffer sizes with high-end throughput performance. Our contribution is twofold. First, we show that the RED algorithm is intrinsically flawed because of the way it maps buffer occupancy levels onto packet drop probabilities. Second, we introduce Periodic Early Detection (PED), a buffer management scheme with touchless configuration that sustains 100% link utilization using only 2.5% of the memory required by the BDP rule. While a more comprehensive study of PED's properties is in order, the clear superiority of the scheme under common benchmarking setups places it at the forefront of the candidate enablers for the on-chip implementation of buffer memories.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129941264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986003
W. Kabaciński, M. Michalski
In this paper we present rearrangeable log2(N, 0, p) switching fabrics and the control algorithm for the case of an even number of stages. The main topic of this paper is the implementation of a hardware controller for such fabrics. The algorithm is described in VHDL code and realized in ML505 - the demo board for Virtex 5 - FGPA chip from the Xilinx Company. The implementation presented here works very fast, the controller can send out the set of actual signals just 20 nanoseconds after the request has been made.
{"title":"FPGA controller for rearrangeable Log2(N, 0, p) fabrics with an even number of stages","authors":"W. Kabaciński, M. Michalski","doi":"10.1109/HPSR.2011.5986003","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986003","url":null,"abstract":"In this paper we present rearrangeable log2(N, 0, p) switching fabrics and the control algorithm for the case of an even number of stages. The main topic of this paper is the implementation of a hardware controller for such fabrics. The algorithm is described in VHDL code and realized in ML505 - the demo board for Virtex 5 - FGPA chip from the Xilinx Company. The implementation presented here works very fast, the controller can send out the set of actual signals just 20 nanoseconds after the request has been made.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121044317","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986038
P. Tien, Bo-Yu Ke
In this paper, we propose a novel ranked Hopfield neural-network (RHNN) parallel scheduler for a WDM optical interconnection system (WOPIS), containing a set of Clos-like optical switches and a handful of output FDL-based optical buffers. The RHNN scheduler determines an optimal set of neurons (I/O paths) to be enabled, achieving maximal system throughput and priority differentiation subject to the switch- and buffer-contention-free constraints. The RHNN is specially structured with ranked neurons. With each neuron being associated with an input/output path within WOPIS, the RHNN allows higher-rank neurons (higher-priority and/or lower-delay paths) to disable lower-rank neurons that were enabled during previous iterations. Ranking the neurons unfortunately gives rise to a convergence problem. We present two theorems that supply the sufficient conditions for the RHNN scheduler to converge to the optimal solution. We demonstrate via simulation results that, with the computation time of less than one system time slot, the RHNN scheduler achieves near 100% throughput and multi-level prioritized scheduling.
{"title":"A new ranked Hopfield neural networks approach to QoS parallel scheduling for WDM optical interconnection system","authors":"P. Tien, Bo-Yu Ke","doi":"10.1109/HPSR.2011.5986038","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986038","url":null,"abstract":"In this paper, we propose a novel ranked Hopfield neural-network (RHNN) parallel scheduler for a WDM optical interconnection system (WOPIS), containing a set of Clos-like optical switches and a handful of output FDL-based optical buffers. The RHNN scheduler determines an optimal set of neurons (I/O paths) to be enabled, achieving maximal system throughput and priority differentiation subject to the switch- and buffer-contention-free constraints. The RHNN is specially structured with ranked neurons. With each neuron being associated with an input/output path within WOPIS, the RHNN allows higher-rank neurons (higher-priority and/or lower-delay paths) to disable lower-rank neurons that were enabled during previous iterations. Ranking the neurons unfortunately gives rise to a convergence problem. We present two theorems that supply the sufficient conditions for the RHNN scheduler to converge to the optimal solution. We demonstrate via simulation results that, with the computation time of less than one system time slot, the RHNN scheduler achieves near 100% throughput and multi-level prioritized scheduling.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127811059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986023
Minjing Mao, K. Yeung
Capacity efficiency is a key issue in designing survivable Wavelength Division Multiplexing (WDM) networks. In this paper, we propose a two-step routing algorithm for dynamic lightpath protection in a WDM mesh network that is subject to wavelength continuity constraint. In other words, upon each call arrival a pair of link-disjoint active and backup lightpaths is to be found for carrying the call. To enhance the capacity efficiency, the resources on the backup lightpath can be shared for protecting different active lightpaths. Owing to the very different natures of active and backup lightpaths, active lightpath is found using the widest-shortest path (WSP) routing and backup lightpath is found using the shortest-widest path (SWP) routing. A distinct feature of our design is that we require both active and backup lightpaths of a call to use the same wavelength. Two major advantages of this feature are: a) source node can use the same laser for both active and backup lightpaths, and b) the scalability issue related to route advertisement is solved. As compared with some existing schemes, we show that our two-step routing algorithm yields noticeably higher capacity efficiency and lower call blocking probability.
{"title":"Two-step routing for dynamic traffic protection in WDM networks with wavelength continuity constraint","authors":"Minjing Mao, K. Yeung","doi":"10.1109/HPSR.2011.5986023","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986023","url":null,"abstract":"Capacity efficiency is a key issue in designing survivable Wavelength Division Multiplexing (WDM) networks. In this paper, we propose a two-step routing algorithm for dynamic lightpath protection in a WDM mesh network that is subject to wavelength continuity constraint. In other words, upon each call arrival a pair of link-disjoint active and backup lightpaths is to be found for carrying the call. To enhance the capacity efficiency, the resources on the backup lightpath can be shared for protecting different active lightpaths. Owing to the very different natures of active and backup lightpaths, active lightpath is found using the widest-shortest path (WSP) routing and backup lightpath is found using the shortest-widest path (SWP) routing. A distinct feature of our design is that we require both active and backup lightpaths of a call to use the same wavelength. Two major advantages of this feature are: a) source node can use the same laser for both active and backup lightpaths, and b) the scalability issue related to route advertisement is solved. As compared with some existing schemes, we show that our two-step routing algorithm yields noticeably higher capacity efficiency and lower call blocking probability.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130227934","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986032
R. Vilalta, R. Muñoz, R. Casellas, R. Martínez
To achieve cost reductions, simplified operations and flexible scalability in optical transport networks, a challenging approach is to replace the TDM aggregation and transport infrastructure, based on legacy SONET/SDH technology, by a new dynamic network infrastructure that delivers the high-bandwidth transport and deterministic performance of the optical circuit technology (i.e., WSON) along with the efficient aggregation and statistical multiplexing of a packet transport technology (e.g., MPLS-TP) to support IP and Ethernet services. This paper presents the architectural design, implementation and the performance evaluation of the forwarding capabilities of a MPLS-TP/PWE3 node with integrated 10Gbps tunable DWDM transponders to extend the GMPLS-enabled WSON transport network of the ADRENALINE testbed. The node has been implemented using commercial off-the-shelf hardware and open source software. An evaluation of the node is provided by means of analyzing the obtained throughput and CPU usage in two different evaluation scenarios with different traffic grooming strategies.
{"title":"Design and performance evaluation of a GMPLS-enabled MPLS-TP/PWE3 node with integrated 10Gbps tunable DWDM transponders","authors":"R. Vilalta, R. Muñoz, R. Casellas, R. Martínez","doi":"10.1109/HPSR.2011.5986032","DOIUrl":"https://doi.org/10.1109/HPSR.2011.5986032","url":null,"abstract":"To achieve cost reductions, simplified operations and flexible scalability in optical transport networks, a challenging approach is to replace the TDM aggregation and transport infrastructure, based on legacy SONET/SDH technology, by a new dynamic network infrastructure that delivers the high-bandwidth transport and deterministic performance of the optical circuit technology (i.e., WSON) along with the efficient aggregation and statistical multiplexing of a packet transport technology (e.g., MPLS-TP) to support IP and Ethernet services. This paper presents the architectural design, implementation and the performance evaluation of the forwarding capabilities of a MPLS-TP/PWE3 node with integrated 10Gbps tunable DWDM transponders to extend the GMPLS-enabled WSON transport network of the ADRENALINE testbed. The node has been implemented using commercial off-the-shelf hardware and open source software. An evaluation of the node is provided by means of analyzing the obtained throughput and CPU usage in two different evaluation scenarios with different traffic grooming strategies.","PeriodicalId":269137,"journal":{"name":"2011 IEEE 12th International Conference on High Performance Switching and Routing","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121389727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-07-04DOI: 10.1109/HPSR.2011.5986022
Sujogya Banerjee, Shahrzad Shirazipourazad, P. Ghosh, Arunabha Sen
Robustness or fault-tolerance capability of a network is an important design parameter in both wired and wireless networks. Connectivity of a network is traditionally considered to be the primary metric for evaluation of its fault-tolerance capability. However, connectivity κ(G) (for random faults) or region-based connectivity κR(G) (for spatially correlated or region-based faults, where the faults are confined to a region R) of a network G, does not provide any information about the network state, (i.e., whether the network is connected or not) once the number of faults exceeds κ(G) or κR(G). If the number of faults exceeds κ(G) or κR(G), one would like to know, (i) the number of connected components into which G decomposes, (ii) the size of the largest connected component, (iii) the size of the smallest connected component. In this paper, we introduce a set of new metrics that computes these values. We focus on one particular metric called region-based component decomposition number (RBCDN), that measures the number of connected components in which the network decomposes once all the nodes of a region fail. We study the computational complexity of finding RBCDN of a network. In addition, we study the problem of least cost design of a network with a target value of RBCDN. We show that the optimal design problem is NP-complete and present an approximation algorithm with a performance bound of O(log K + 4log n), where n denotes the number of nodes in the graph and K denotes a target value of RBCDN. We evaluate the performance of our algorithm by comparing it with the performance of the optimal solution. Experimental results demonstrate that our algorithm produces near optimal solution in a fraction of time needed to find an optimal solution.
网络的鲁棒性或容错能力是有线和无线网络的重要设计参数。网络的连通性传统上被认为是评估其容错能力的主要指标。然而，网络G的连通性κ(G)(用于随机故障)或基于区域的连通性κR(G)(用于空间相关或基于区域的故障，其中故障仅限于区域R)，一旦故障数量超过κ(G)或κR(G)，则无法提供有关网络状态(即网络是否连通)的任何信息。如果故障数超过κ(G)或κ r (G)，我们想知道，(i) G分解成的连接分量的数量，(ii)最大连接分量的大小，(iii)最小连接分量的大小。在本文中，我们引入了一组新的度量来计算这些值。我们关注一个特定的度量，称为基于区域的组件分解数(RBCDN)，它测量了当一个区域的所有节点失效时网络分解的连接组件的数量。我们研究了寻找网络RBCDN的计算复杂度。此外，我们还研究了以RBCDN为目标值的网络的最小成本设计问题。我们证明了最优设计问题是np完全的，并提出了一个性能界为O(log K + 4log n)的近似算法，其中n表示图中的节点数，K表示RBCDN的目标值。我们通过将算法与最优解的性能进行比较来评估算法的性能。实验结果表明，我们的算法在寻找最优解所需的一小部分时间内产生了接近最优解。
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