Pub Date : 2014-12-01DOI: 10.1109/PADSW.2014.7097779
Yeh-Ching Chung, Yanmin Zhu
On behalf of the 20th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2014) Organizing Committee, we are very pleased to announce that more than three hundred researchers and contributors from the world submitted their papers to share their research results and new ideas. The objective of this conference to provide a major international forum for scientists, engineers, and users to exchange and share their experiences, new ideas, and latest research results on all aspects of parallel and distributed computing systems.
{"title":"Message from the program co-chairs IEEE ICPADS 2014","authors":"Yeh-Ching Chung, Yanmin Zhu","doi":"10.1109/PADSW.2014.7097779","DOIUrl":"https://doi.org/10.1109/PADSW.2014.7097779","url":null,"abstract":"On behalf of the 20th IEEE International Conference on Parallel and Distributed Systems (ICPADS 2014) Organizing Committee, we are very pleased to announce that more than three hundred researchers and contributors from the world submitted their papers to share their research results and new ideas. The objective of this conference to provide a major international forum for scientists, engineers, and users to exchange and share their experiences, new ideas, and latest research results on all aspects of parallel and distributed computing systems.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128549132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/PADSW.2014.7097778
D. Panda, J. Sheu
It is a great honor to extend our personal greeting to each and every one of you who are attending the 20th IEEE International Conference on Parallel and Distributed Systems (IEEE ICPADS 2014) in the wonderful city of Hsinchu. Since established in 1992, this is the fourth time we have this conference in Hisnchu, Taiwan. ICPADS has been a major international forum to bring together scientists, engineers, and users from all over the world to discuss and exchange the advancement in of parallel and distributed systems technology.
{"title":"Message from the general co-chairs IEEE ICPADS 2014","authors":"D. Panda, J. Sheu","doi":"10.1109/PADSW.2014.7097778","DOIUrl":"https://doi.org/10.1109/PADSW.2014.7097778","url":null,"abstract":"It is a great honor to extend our personal greeting to each and every one of you who are attending the 20th IEEE International Conference on Parallel and Distributed Systems (IEEE ICPADS 2014) in the wonderful city of Hsinchu. Since established in 1992, this is the fourth time we have this conference in Hisnchu, Taiwan. ICPADS has been a major international forum to bring together scientists, engineers, and users from all over the world to discuss and exchange the advancement in of parallel and distributed systems technology.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133928687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the era of cloud computing, data centers are well-known to be bounded by the power wall issue. This issue lowers the profit of service providers and obstructs the expansions of data center's scale. As virtual machine's behavior was not explored sufficiently in classic data center's power-saving strategies, in this paper we address the power consumption issue in the setting of a virtualized data center. We propose an efficient power-aware resource scheduling strategy that reduces data center's power consumption effectively based on VM live migration which is a key technical feature of cloud computing. Our scheduling algorithm leverages the Xen platform and consolidates VM workloads periodically to reduce the number of running servers. To satisfy each VM's service level agreements, our strategy keeps adjusting VM placements between scheduling rounds. We developed a power-aware data center simulator to test our algorithm. The simulator runs in time domain and includes server's segmented linear power model. We validated our simulator using measured server power trace. Our simulation shows that compared with event-driven schedulers, our strategy improves data center power budget by 35% for random workloads resembling web-requests, and improve data center power budget by 22.7% for workloads exhibiting stable resource requirements like ScaLAPACK.
{"title":"An Efficient Power-Aware Resource Scheduling Strategy in Virtualized Datacenters","authors":"Yazhou Zu, Tian Huang, Yongxin Zhu","doi":"10.1109/.26","DOIUrl":"https://doi.org/10.1109/.26","url":null,"abstract":"In the era of cloud computing, data centers are well-known to be bounded by the power wall issue. This issue lowers the profit of service providers and obstructs the expansions of data center's scale. As virtual machine's behavior was not explored sufficiently in classic data center's power-saving strategies, in this paper we address the power consumption issue in the setting of a virtualized data center. We propose an efficient power-aware resource scheduling strategy that reduces data center's power consumption effectively based on VM live migration which is a key technical feature of cloud computing. Our scheduling algorithm leverages the Xen platform and consolidates VM workloads periodically to reduce the number of running servers. To satisfy each VM's service level agreements, our strategy keeps adjusting VM placements between scheduling rounds. We developed a power-aware data center simulator to test our algorithm. The simulator runs in time domain and includes server's segmented linear power model. We validated our simulator using measured server power trace. Our simulation shows that compared with event-driven schedulers, our strategy improves data center power budget by 35% for random workloads resembling web-requests, and improve data center power budget by 22.7% for workloads exhibiting stable resource requirements like ScaLAPACK.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114696225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Data-intensive services have become one of the most challenging applications in cloud computing. The classical service composition problem will face new challenges as the services and correspondent data grow. A typical environment is the large scale scientific project AMS, which we are processing huge amount of data streams. In this paper, we will resolve service composition problem by considering the multi-objective data-intensive features. We propose to apply ant colony optimization algorithms and implemented them with simulated workflows in different scenarios. To evaluate the proposed algorithm, we compared it with a multi-objective genetic algorithm with respect to five performance metrics.
{"title":"Multi-objective Ant Colony System for Data-Intensive Service Provision","authors":"Lijuan Wang, Jun Shen, Junzhou Luo","doi":"10.1109/.14","DOIUrl":"https://doi.org/10.1109/.14","url":null,"abstract":"Data-intensive services have become one of the most challenging applications in cloud computing. The classical service composition problem will face new challenges as the services and correspondent data grow. A typical environment is the large scale scientific project AMS, which we are processing huge amount of data streams. In this paper, we will resolve service composition problem by considering the multi-objective data-intensive features. We propose to apply ant colony optimization algorithms and implemented them with simulated workflows in different scenarios. To evaluate the proposed algorithm, we compared it with a multi-objective genetic algorithm with respect to five performance metrics.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121367295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Single-processor chips have given way to multicore chips to enable a cost-effective implementation of computer systems. Toward continuous performance scaling, Network-On-Chip (NOC) is the communication architecture supporting the core count increase to hundreds or thousands in multicore chips. Low-power, low-latency, and high-bandwidth support in the NOC design is critical for meeting performance and energy targets of the overall system. Much of previous work has focused on improving the NOC design but without more fully taking into consideration the communication characteristics and the interplay with cache memory that can be exploited in the NOC design. In this paper, low spatial locality within cache blocks is exploited in reducing memory traffic toward energy savings in the NOC. We present a spatial locality predictor that separately manages different degrees of spatial locality across shared and private blocks for better prediction accuracy. To further optimize performance and power in the NOC, we present the adaptive control of the predictor and packet data resizing techniques. Evaluations for the 16-core system running PARSEC benchmarks reveal that our spatial-locality based packet resizing improves NOC power consumption on average by 21% (up to 33%).
{"title":"Adaptive Packet Resizing by Spatial Locality and Data Sharing for Energy-Efficient NOC","authors":"Bo Gao, Yuho Jin","doi":"10.1109/.16","DOIUrl":"https://doi.org/10.1109/.16","url":null,"abstract":"Single-processor chips have given way to multicore chips to enable a cost-effective implementation of computer systems. Toward continuous performance scaling, Network-On-Chip (NOC) is the communication architecture supporting the core count increase to hundreds or thousands in multicore chips. Low-power, low-latency, and high-bandwidth support in the NOC design is critical for meeting performance and energy targets of the overall system. Much of previous work has focused on improving the NOC design but without more fully taking into consideration the communication characteristics and the interplay with cache memory that can be exploited in the NOC design. In this paper, low spatial locality within cache blocks is exploited in reducing memory traffic toward energy savings in the NOC. We present a spatial locality predictor that separately manages different degrees of spatial locality across shared and private blocks for better prediction accuracy. To further optimize performance and power in the NOC, we present the adaptive control of the predictor and packet data resizing techniques. Evaluations for the 16-core system running PARSEC benchmarks reveal that our spatial-locality based packet resizing improves NOC power consumption on average by 21% (up to 33%).","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"213 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120877958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-05DOI: 10.1109/ICPADS.2007.4447800
Jehn-Ruey Jiang
A two part, sectioned tapered cylindrical hanger and stabilizer threaded on its inner periphery which threads are broken circumferentially by longitudinally extending slots defining right angle edges which frictionally grip an enclosed metal well surface casing section. The cylindrical hanger sections are further slotted on their outer periphery longitudinally to facilitate lodging of the hanger in the casing conductor to fixedly locate the upper end of the surface well casing within the conductor in concentric relation therewith. The surface well casing extends the length of the hole, and during the installation procedure, concrete is forced downwardly through the center of the casing and caused to rise between the casing and the wall of the bore hole to lock the lower end of the surface casing to the bore hole. The vertical edges of the semi-circular hanger sections abut and are locked together by locking bars fitting within opposing recesses within the upper ends of the semi-annular hanger sections. T-bar handles threaded to the sections facilitate their transport and mounting to the upper end of the casing conducter.
{"title":"Message from P2P-NVE Program Chair","authors":"Jehn-Ruey Jiang","doi":"10.1109/ICPADS.2007.4447800","DOIUrl":"https://doi.org/10.1109/ICPADS.2007.4447800","url":null,"abstract":"A two part, sectioned tapered cylindrical hanger and stabilizer threaded on its inner periphery which threads are broken circumferentially by longitudinally extending slots defining right angle edges which frictionally grip an enclosed metal well surface casing section. The cylindrical hanger sections are further slotted on their outer periphery longitudinally to facilitate lodging of the hanger in the casing conductor to fixedly locate the upper end of the surface well casing within the conductor in concentric relation therewith. The surface well casing extends the length of the hole, and during the installation procedure, concrete is forced downwardly through the center of the casing and caused to rise between the casing and the wall of the bore hole to lock the lower end of the surface casing to the bore hole. The vertical edges of the semi-circular hanger sections abut and are locked together by locking bars fitting within opposing recesses within the upper ends of the semi-annular hanger sections. T-bar handles threaded to the sections facilitate their transport and mounting to the upper end of the casing conducter.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116330398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-05DOI: 10.1109/ICPADS.2007.4447798
N. Vun, Wooi-Boon Goh
This paper describes how a course in embedded processors and peripherals can be effectively designed for a group of busy working professionals who come from diverse industrial backgrounds. With the increasing emphasis in life-long learning and adult education, we believe the experiences and pedagogical strategies shared here is increasingly relevant to many educators. The rationale behind these proposed strategies for both learning and assessment is described.
{"title":"Issues and challenges of embedded processor education for working professionals","authors":"N. Vun, Wooi-Boon Goh","doi":"10.1109/ICPADS.2007.4447798","DOIUrl":"https://doi.org/10.1109/ICPADS.2007.4447798","url":null,"abstract":"This paper describes how a course in embedded processors and peripherals can be effectively designed for a group of busy working professionals who come from diverse industrial backgrounds. With the increasing emphasis in life-long learning and adult education, we believe the experiences and pedagogical strategies shared here is increasingly relevant to many educators. The rationale behind these proposed strategies for both learning and assessment is described.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125870995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-05DOI: 10.1109/ICPADS.2007.4447783
Yu-Lun Huang, Jwusheng Hu
Operating systems play an important role in interacting with hardware and software, while embedded operating systems deal more with hardware-specific functions, optimization and customization. To emphasize the education in embedded operating systems, in this paper, we present the design methodologies of two courses in this area: Embedded Operating Systems and Real-Time Embedded Operating Systems for SoC. The former course focus on the basic concepts of embedded kernel primitives. The latter one emphasizes more on the insight of the real-time kernel and its scheduling protocols. Both courses consist of comprehensive hands-on practices to provide students more opportunities to fully participate in this blooming field.
{"title":"Design methodology and hands-on practices for Embedded Operating Systems","authors":"Yu-Lun Huang, Jwusheng Hu","doi":"10.1109/ICPADS.2007.4447783","DOIUrl":"https://doi.org/10.1109/ICPADS.2007.4447783","url":null,"abstract":"Operating systems play an important role in interacting with hardware and software, while embedded operating systems deal more with hardware-specific functions, optimization and customization. To emphasize the education in embedded operating systems, in this paper, we present the design methodologies of two courses in this area: Embedded Operating Systems and Real-Time Embedded Operating Systems for SoC. The former course focus on the basic concepts of embedded kernel primitives. The latter one emphasizes more on the insight of the real-time kernel and its scheduling protocols. Both courses consist of comprehensive hands-on practices to provide students more opportunities to fully participate in this blooming field.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121852424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-05DOI: 10.1109/ICPADS.2007.4447799
Shiao-Li Tsao, Tai-Yi Huang, J. Zao, J. Muppala, C. Shih
It is our pleasure to welcome you to the First Asia-Pacific Workshop on Embedded System Education and Research (APESER 2007). This workshop is held in conjunction with the 13th International Conference on Parallel and Distributed Systems (ICPADS'07), Hsinchu, Taiwan. Embedded system design as a discipline has long been pursued in the industry in various application domains including avionics, aerospace, automobile, and industrial control. Within the Asia-Pacific region, the embedded system industry has reached a high level of success. This has resulted in a growing demand for highly-trained and skilled manpower to meet the ever growing demand for trained human resources. This has spurred a growing emphasis on embedded systems education in most of the universities in the Asia-Pacific region. This workshop was conceived for providing a forum for faculty in the Asia-Pacific region to meet and share their experiences, both in education and research on embedded systems. We hope that this gathering will result in an interesting and intellectually inspiring atmosphere for exchange of ideas. We received a total of 25 papers in response to our call for papers from a number of countries, including China, Hong Kong, Japan, Singapore, Taiwan and USA. Out of these a total of 16 papers were selected for presentation at the workshop. We were abundantly assisted in the selection process by the technical program committee consisting of 16 members from different countries in Asia Pacific region. The committee members were very helpful in distributing the call for papers and reviewing several submitted manuscripts. All manuscripts submitted to the symposium were subjected to rigorous review procedure, with at least 2 reviewers submitting their evaluations for each paper, while several papers received 3 or 4 reviews. This was very instrumental in enabling us to put together a technical program of excellent quality, as evidenced by the papers included in the proceedings. We would like to thank the ICPADS'07 Workshop Organizing Committee for giving us this opportunity to organize APESER 2007 for the first time. Our thanks also go to all the authors for their valuable contributions and to all the Technical Program Committee members and reviewers for providing timely and in-depth reviews. Last but not the least; we thank the attendees of APESER 2007. We welcome you all again to this workshop. We sincerely hope that the workshop will provide you with an enjoyable opportunity for intellectual cross-pollination of ideas. We also hope that your visit to Taiwan will prove to be profitable in more than one way.
{"title":"Message from APESER organization committee","authors":"Shiao-Li Tsao, Tai-Yi Huang, J. Zao, J. Muppala, C. Shih","doi":"10.1109/ICPADS.2007.4447799","DOIUrl":"https://doi.org/10.1109/ICPADS.2007.4447799","url":null,"abstract":"It is our pleasure to welcome you to the First Asia-Pacific Workshop on Embedded System Education and Research (APESER 2007). This workshop is held in conjunction with the 13th International Conference on Parallel and Distributed Systems (ICPADS'07), Hsinchu, Taiwan. Embedded system design as a discipline has long been pursued in the industry in various application domains including avionics, aerospace, automobile, and industrial control. Within the Asia-Pacific region, the embedded system industry has reached a high level of success. This has resulted in a growing demand for highly-trained and skilled manpower to meet the ever growing demand for trained human resources. This has spurred a growing emphasis on embedded systems education in most of the universities in the Asia-Pacific region. This workshop was conceived for providing a forum for faculty in the Asia-Pacific region to meet and share their experiences, both in education and research on embedded systems. We hope that this gathering will result in an interesting and intellectually inspiring atmosphere for exchange of ideas. We received a total of 25 papers in response to our call for papers from a number of countries, including China, Hong Kong, Japan, Singapore, Taiwan and USA. Out of these a total of 16 papers were selected for presentation at the workshop. We were abundantly assisted in the selection process by the technical program committee consisting of 16 members from different countries in Asia Pacific region. The committee members were very helpful in distributing the call for papers and reviewing several submitted manuscripts. All manuscripts submitted to the symposium were subjected to rigorous review procedure, with at least 2 reviewers submitting their evaluations for each paper, while several papers received 3 or 4 reviews. This was very instrumental in enabling us to put together a technical program of excellent quality, as evidenced by the papers included in the proceedings. We would like to thank the ICPADS'07 Workshop Organizing Committee for giving us this opportunity to organize APESER 2007 for the first time. Our thanks also go to all the authors for their valuable contributions and to all the Technical Program Committee members and reviewers for providing timely and in-depth reviews. Last but not the least; we thank the attendees of APESER 2007. We welcome you all again to this workshop. We sincerely hope that the workshop will provide you with an enjoyable opportunity for intellectual cross-pollination of ideas. We also hope that your visit to Taiwan will prove to be profitable in more than one way.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124185524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-12-05DOI: 10.1109/ICPADS.2007.4447780
N. Vun, Wooi-Boon Goh
This paper describes the considerations taken in designing cost effective embedded processor development kits to support the take-home self-practice pedagogical strategy. Since each student is issued with such a take-home development kit, special design considerations were given to the choice of processor, the on-board peripheral support, the mode of software development and the development tool support. Two embedded processor development platforms of different complexity are described. One is an 8051 based kit and the other is based on the ARM RISC processor.
{"title":"The design of effective low cost embedded processor development kits for supporting take-home self-practice pedagogies","authors":"N. Vun, Wooi-Boon Goh","doi":"10.1109/ICPADS.2007.4447780","DOIUrl":"https://doi.org/10.1109/ICPADS.2007.4447780","url":null,"abstract":"This paper describes the considerations taken in designing cost effective embedded processor development kits to support the take-home self-practice pedagogical strategy. Since each student is issued with such a take-home development kit, special design considerations were given to the choice of processor, the on-board peripheral support, the mode of software development and the development tool support. Two embedded processor development platforms of different complexity are described. One is an 8051 based kit and the other is based on the ARM RISC processor.","PeriodicalId":281075,"journal":{"name":"International Conference on Parallel and Distributed Systems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128401668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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