he current trend towards multi-core processors has renewedthe interest in the development and correctness of concurrent algorithms.Most of these algorithms rely on locks to protect critical sectionsfrom unwanted interference. Recently a new class of nonblockingalgorithms has been developed which do not rely on critical sections,but on atomic compare-and-set instructions. Such lock-free algorithmsare less vulnerable to the typical problems of concurrent algorithms:deadlocks, livelocks and priority inversion. On the other hand, thelack of a uniform principle to rule out interference results inincreased complexity. This makes it harder to understand thesealgorithms and to verify their correctness.The paper gives a simple example to demonstrate thecentral correctness criteria of linearizability (a safety property)and lock-freeness (a liveness property) for lock-free algorithms.It then sketches our approach to the modular verification oflock-free algorithms which uses rely-guarantee reasoning anda powerful temporal logic to derive refinement proof obligationsthat can be verified with the interactive theorem prover KIV.Finally an overview over related work and techniques that arerelevant to automate proofs is given.
{"title":"Formal Verification of Lock-Free Algorithms","authors":"G. Schellhorn, S. Bäumler","doi":"10.1109/ACSD.2009.10","DOIUrl":"https://doi.org/10.1109/ACSD.2009.10","url":null,"abstract":"he current trend towards multi-core processors has renewedthe interest in the development and correctness of concurrent algorithms.Most of these algorithms rely on locks to protect critical sectionsfrom unwanted interference. Recently a new class of nonblockingalgorithms has been developed which do not rely on critical sections,but on atomic compare-and-set instructions. Such lock-free algorithmsare less vulnerable to the typical problems of concurrent algorithms:deadlocks, livelocks and priority inversion. On the other hand, thelack of a uniform principle to rule out interference results inincreased complexity. This makes it harder to understand thesealgorithms and to verify their correctness.The paper gives a simple example to demonstrate thecentral correctness criteria of linearizability (a safety property)and lock-freeness (a liveness property) for lock-free algorithms.It then sketches our approach to the modular verification oflock-free algorithms which uses rely-guarantee reasoning anda powerful temporal logic to derive refinement proof obligationsthat can be verified with the interactive theorem prover KIV.Finally an overview over related work and techniques that arerelevant to automate proofs is given.","PeriodicalId":307821,"journal":{"name":"2009 Ninth International Conference on Application of Concurrency to System Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129369286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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