Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695552
T. Kikkawa, T. Hosoda, S. Akiyama, Y. Kotani, Toshihiro Wakabayashi, Tsutomu Ogino, K. Imanishi, Akitoshi Mochizuki, K. Itabashi, K. Shono, Y. Asai, K. Joshin, T. Ohki, M. Kanamura, M. Nishimori, T. Imada, J. Kotani, A. Yamada, N. Nakamura, T. Hirose, Keiji Watanabe
In this paper, we describe 600 V GaN high electron mobility transistors (HEMTs) technologies on a 6-inch Si substrate using an Au-free Si-LSI mass production line. Metal insulator semiconductor (MIS) HEMTs were fabricated using AlN as a gate insulator. The AlN layer was deposited by thermal atomic layer deposition (ALD) method using the mass-production-type vertical reactor which was capable for over 100 wafer depositions per run. High-temperature breakdown voltage of over 600 V was confirmed. Uniform static on-resistance (RON) across a 6-inch wafer was demonstrated using the AlN based gate insulator. Stable dynamic RON characteristics till 600 V were also verified using packaged GaN HEMT devices, suggesting that GaN on Si technology in this study is ready for manufacturing. Power factor control (PFC) circuit board operation was also demonstrated at high frequency up to 1 MHz.
在本文中，我们描述了600 V GaN高电子迁移率晶体管(hemt)技术在6英寸Si衬底上使用无金Si- lsi量产线。采用AlN作为栅极绝缘体制备了金属绝缘体半导体hemt。采用热原子层沉积法(ALD)沉积AlN层，采用可批量生产的立式反应器，每运行可沉积100片以上。高温击穿电压超过600 V。使用AlN基栅绝缘体演示了6英寸晶圆上均匀的静态导通电阻(RON)。使用封装的GaN HEMT器件也验证了600 V前的稳定动态RON特性，这表明本研究中的GaN on Si技术已经准备好用于制造。功率因数控制(PFC)电路板操作也演示了在高达1兆赫的高频。
{"title":"600 V GaN HEMT on 6-inch Si substrate using Au-free Si-LSI process for power applications","authors":"T. Kikkawa, T. Hosoda, S. Akiyama, Y. Kotani, Toshihiro Wakabayashi, Tsutomu Ogino, K. Imanishi, Akitoshi Mochizuki, K. Itabashi, K. Shono, Y. Asai, K. Joshin, T. Ohki, M. Kanamura, M. Nishimori, T. Imada, J. Kotani, A. Yamada, N. Nakamura, T. Hirose, Keiji Watanabe","doi":"10.1109/WIPDA.2013.6695552","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695552","url":null,"abstract":"In this paper, we describe 600 V GaN high electron mobility transistors (HEMTs) technologies on a 6-inch Si substrate using an Au-free Si-LSI mass production line. Metal insulator semiconductor (MIS) HEMTs were fabricated using AlN as a gate insulator. The AlN layer was deposited by thermal atomic layer deposition (ALD) method using the mass-production-type vertical reactor which was capable for over 100 wafer depositions per run. High-temperature breakdown voltage of over 600 V was confirmed. Uniform static on-resistance (RON) across a 6-inch wafer was demonstrated using the AlN based gate insulator. Stable dynamic RON characteristics till 600 V were also verified using packaged GaN HEMT devices, suggesting that GaN on Si technology in this study is ready for manufacturing. Power factor control (PFC) circuit board operation was also demonstrated at high frequency up to 1 MHz.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125329335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695585
Pucheng Liu, K. Kakushima, H. Iwai, A. Nakajima, T. Makino, M. Ogura, S. Nishizawa, H. Ohashi
Electrical properties of two-dimensional hole gas (2DHG) at GaN/Al0.23Ga0.77N heterointerface have been investigated. Existence of 2DHG at the interface is confirmed by capacitance-voltage and Hall Effect measurement. We have discussed transport mechanism of 2DHG by comparison with hole generated by conventional Mg impurity, based on experimental evaluations by X-ray diffraction, transmission electron microscope, atomic force microscope, secondary ion mass spectroscopy, and temperature dependence Hall Effect measurements.
{"title":"Characterization of two-dimensional hole gas at GaN/AlGaN heterointerface","authors":"Pucheng Liu, K. Kakushima, H. Iwai, A. Nakajima, T. Makino, M. Ogura, S. Nishizawa, H. Ohashi","doi":"10.1109/WIPDA.2013.6695585","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695585","url":null,"abstract":"Electrical properties of two-dimensional hole gas (2DHG) at GaN/Al0.23Ga0.77N heterointerface have been investigated. Existence of 2DHG at the interface is confirmed by capacitance-voltage and Hall Effect measurement. We have discussed transport mechanism of 2DHG by comparison with hole generated by conventional Mg impurity, based on experimental evaluations by X-ray diffraction, transmission electron microscope, atomic force microscope, secondary ion mass spectroscopy, and temperature dependence Hall Effect measurements.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124510664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695594
N. Videau, T. Meynard, V. Bley, D. Flumian, E. Sarraute, G. Fontès, J. Brandelero
More compact power converters can be realized with the recently introduced gallium nitride (GaN) power devices. However, power board layout becomes more critical. In order to reduce switching losses, voltage overshoot and to achieve fast and safe drive, the stray inductances should be minimized. In this paper, a 5-phase DC-DC interleaved buck converter with an InterCell Transformer (ICT) integrated in a multilayer PCB using GaN EPC 100V devices is described. It appears that the routing of power decoupling capacitors is the result of a tradeoff between stray inductance and cooling with a single heatsink for the 5 phases. The power board (110mm×62mm, 51g) reaches 97% efficiency with a 48V to 24V conversion at 1.8kW and an effective output current frequency of 1.5MHz.
{"title":"5-phase interleaved buck converter with gallium nitride transistors","authors":"N. Videau, T. Meynard, V. Bley, D. Flumian, E. Sarraute, G. Fontès, J. Brandelero","doi":"10.1109/WIPDA.2013.6695594","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695594","url":null,"abstract":"More compact power converters can be realized with the recently introduced gallium nitride (GaN) power devices. However, power board layout becomes more critical. In order to reduce switching losses, voltage overshoot and to achieve fast and safe drive, the stray inductances should be minimized. In this paper, a 5-phase DC-DC interleaved buck converter with an InterCell Transformer (ICT) integrated in a multilayer PCB using GaN EPC 100V devices is described. It appears that the routing of power decoupling capacitors is the result of a tradeoff between stray inductance and cooling with a single heatsink for the 5 phases. The power board (110mm×62mm, 51g) reaches 97% efficiency with a 48V to 24V conversion at 1.8kW and an effective output current frequency of 1.5MHz.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126543976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695590
J. Moses, Luke L. Jenkins, Jeffrey M. Aggas, William E. Abell, S. Henning, John Tennant, C. Wilson, R. Dean
With the growing popularity of GaN HEMTs, the reliability of the transistors after prolonged exposure and use at high temperatures is of increasing importance. Previous work has shown that GaN FETs can operate at temperatures higher greater than 500°C for short amounts of time, but need to be tested at rated operating temperatures. In order to determine whether commercial GaN HEMTs can be reliable at a more typical operating temperature, three EPC parts were tested. The EPC2001, EPC2014, and EPC2015 parts were characterized before temperature testing with a curve tracer. The parts were tested at and above their rated voltage for 1000 hours at a constant 125°C. After the 1000 hours of testing, each EPC part was characterized again on the curve tracer. No failures were observed during the 1000 hours of testing, but during the posttest characterization the RDS(ON) of all the parts increased, parts failed at their rated maximum of 6 V to the gate, and some of the EPC2014s failed at all voltages.
{"title":"GaN HEMT reliability at 125 °C for 1000 hours","authors":"J. Moses, Luke L. Jenkins, Jeffrey M. Aggas, William E. Abell, S. Henning, John Tennant, C. Wilson, R. Dean","doi":"10.1109/WIPDA.2013.6695590","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695590","url":null,"abstract":"With the growing popularity of GaN HEMTs, the reliability of the transistors after prolonged exposure and use at high temperatures is of increasing importance. Previous work has shown that GaN FETs can operate at temperatures higher greater than 500°C for short amounts of time, but need to be tested at rated operating temperatures. In order to determine whether commercial GaN HEMTs can be reliable at a more typical operating temperature, three EPC parts were tested. The EPC2001, EPC2014, and EPC2015 parts were characterized before temperature testing with a curve tracer. The parts were tested at and above their rated voltage for 1000 hours at a constant 125°C. After the 1000 hours of testing, each EPC part was characterized again on the curve tracer. No failures were observed during the 1000 hours of testing, but during the posttest characterization the RDS(ON) of all the parts increased, parts failed at their rated maximum of 6 V to the gate, and some of the EPC2014s failed at all voltages.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130085898","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695581
G. Samudra, Yung C. Liang, Yuling Li, Y. Yeo
This paper reports the studies of the temperature dependence on the current collapse behaviours of AlGaN/GaN high electron mobility transistors (HEMTs). A physical-based model is proposed to analyse the trapping and de-trapping process along the surface with the effect of temperature included for the first time. The temperature-dependent gate leakage current is treated as the source for electron trapping and it can be predicted by the proposed model quantitatively. Then the relationship of the capture cross section of the surface trap on the electric field is investigated with respect to temperature variations. By applying the Poole-Frenkel emission mechanism, the dynamics of the trapped electrons at different temperatures are described in this model. The analytical results on current recovery time-constant are then verified by comparing with the laboratory measurement as well as the numerical results obtained from Sentaurus TCAD simulations.
{"title":"Modelling of temperature dependence on current collapse phenomenon in AlGaN/GaN HEMT devices","authors":"G. Samudra, Yung C. Liang, Yuling Li, Y. Yeo","doi":"10.1109/WIPDA.2013.6695581","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695581","url":null,"abstract":"This paper reports the studies of the temperature dependence on the current collapse behaviours of AlGaN/GaN high electron mobility transistors (HEMTs). A physical-based model is proposed to analyse the trapping and de-trapping process along the surface with the effect of temperature included for the first time. The temperature-dependent gate leakage current is treated as the source for electron trapping and it can be predicted by the proposed model quantitatively. Then the relationship of the capture cross section of the surface trap on the electric field is investigated with respect to temperature variations. By applying the Poole-Frenkel emission mechanism, the dynamics of the trapped electrons at different temperatures are described in this model. The analytical results on current recovery time-constant are then verified by comparing with the laboratory measurement as well as the numerical results obtained from Sentaurus TCAD simulations.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131515241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695571
R. Dupuis, Jeomoh Kim, T. Kao, Yi-Che Lee, Z. Lochner, M. Ji, J. Ryou, Theeradetch Detchphrom, S. Shen
We report high performance GaN-based npn heterojunction bipolar transistors (HBTs) grown by metalorganic chemical vapor deposition (MOCVD) with state-of-the-art high collector current density (JC) and low knee voltage (Vknee). For HBTs grown on sapphire, the common-emitter I-V characteristics show high JC > 16 kA/cm2 with an offset voltage (Voffset) of <; 0.25V, Vknee <; 2.4 V and BVCEO = 105 V. High-temperature performance is also evaluated for InGaN HBTs grown on a free-standing GaN substrate. The device shows the peak current gain reduces from 93 at 25 C to 35 at 250C. Higher free hole concentration in the p-InGaN base is observed at elevated temperature that helps reduce the base resistance and Vknee in high-temperature InGaN HBTs operation.
{"title":"Bipolar III-N high-power electronic devices","authors":"R. Dupuis, Jeomoh Kim, T. Kao, Yi-Che Lee, Z. Lochner, M. Ji, J. Ryou, Theeradetch Detchphrom, S. Shen","doi":"10.1109/WIPDA.2013.6695571","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695571","url":null,"abstract":"We report high performance GaN-based npn heterojunction bipolar transistors (HBTs) grown by metalorganic chemical vapor deposition (MOCVD) with state-of-the-art high collector current density (JC) and low knee voltage (Vknee). For HBTs grown on sapphire, the common-emitter I-V characteristics show high JC > 16 kA/cm2 with an offset voltage (Voffset) of <; 0.25V, Vknee <; 2.4 V and BVCEO = 105 V. High-temperature performance is also evaluated for InGaN HBTs grown on a free-standing GaN substrate. The device shows the peak current gain reduces from 93 at 25 C to 35 at 250C. Higher free hole concentration in the p-InGaN base is observed at elevated temperature that helps reduce the base resistance and Vknee in high-temperature InGaN HBTs operation.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115829829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695575
A. Koehler, T. Anderson, B. Weaver, M. Tadjer, K. Hobart, F. Kub
SiNx-passivated AlGaN/GaN high electron mobility transistors (HEMTs) on Si substrates demonstrated high tolerance to 2 MeV proton irradiation, up to a dose of 6 × 1014 cm-2. Radiation-induced changes were observed in Hall mobility, two-dimensional electron gas sheet carrier density, sheet resistance, ON-resistance, transconductance, threshold voltage, and dynamic ON-resistance. Dynamic ON-resistance was measured by pulsing to ON-state from OFF-state quiescent points with drain voltages up to 20 V. The dynamic ON-resistance measured from high OFF-state quiescent voltages was more sensitive to irradiation than the DC and Hall parameters, making the dynamic ON-resistance measurement useful in characterizing radiation-induced degradation.
{"title":"Degradation of dynamic ON-resistance of AlGaN/GaN HEMTs under proton irradiation","authors":"A. Koehler, T. Anderson, B. Weaver, M. Tadjer, K. Hobart, F. Kub","doi":"10.1109/WIPDA.2013.6695575","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695575","url":null,"abstract":"SiNx-passivated AlGaN/GaN high electron mobility transistors (HEMTs) on Si substrates demonstrated high tolerance to 2 MeV proton irradiation, up to a dose of 6 × 1014 cm-2. Radiation-induced changes were observed in Hall mobility, two-dimensional electron gas sheet carrier density, sheet resistance, ON-resistance, transconductance, threshold voltage, and dynamic ON-resistance. Dynamic ON-resistance was measured by pulsing to ON-state from OFF-state quiescent points with drain voltages up to 20 V. The dynamic ON-resistance measured from high OFF-state quiescent voltages was more sensitive to irradiation than the DC and Hall parameters, making the dynamic ON-resistance measurement useful in characterizing radiation-induced degradation.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114589659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695555
Benjamin K. Rhea, C. Wilson, Luke L. Jenkins, R. Dean
The overall power system can generally be divided into three stages: front end, middle stage and point-of-load (POL). The overall efficiency of the power supply chain is dependent on the multiplicity effect which means each stage should be taken into account. Increases in efficiency of the POL converter have the benefit of reducing extra heat generation near the load, reducing overall power dissipation, and reducing the cooling requirement. A 12-1 V buck converter with 94% peak efficiency is presented that takes into account the many factors contributing to the losses in efficiency such as switching losses and conductance losses. All of these factors should be considered for an optimal design that maximizes efficiency. The switching losses have been reduced leaving the inductor as the dominant source of loss. Therefore, the choice of the inductor is dependent on whether the design is for peak efficiency at light loads or optimization of efficiency at higher loads.
{"title":"The impact of inductor selection on a 12-1 V GaN POL converter with over 94% peak efficiency and higher load optimization","authors":"Benjamin K. Rhea, C. Wilson, Luke L. Jenkins, R. Dean","doi":"10.1109/WIPDA.2013.6695555","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695555","url":null,"abstract":"The overall power system can generally be divided into three stages: front end, middle stage and point-of-load (POL). The overall efficiency of the power supply chain is dependent on the multiplicity effect which means each stage should be taken into account. Increases in efficiency of the POL converter have the benefit of reducing extra heat generation near the load, reducing overall power dissipation, and reducing the cooling requirement. A 12-1 V buck converter with 94% peak efficiency is presented that takes into account the many factors contributing to the losses in efficiency such as switching losses and conductance losses. All of these factors should be considered for an optimal design that maximizes efficiency. The switching losses have been reduced leaving the inductor as the dominant source of loss. Therefore, the choice of the inductor is dependent on whether the design is for peak efficiency at light loads or optimization of efficiency at higher loads.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122009431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695565
Matthew Jones, B. Ratliff, Ya-Chi Chen, C. Neft, A. Bhunia
An electrical and thermal optimization study is conducted for a high-temperature gate drive circuit, developed to drive custom-designed, 50 A, 600 V silicon-carbide (SiC) power modules consisting of multiple normally-off JFET dice (SemiSouth SJEC120R100) in parallel and rated at 175 °C device junction temperature. The gate drive and power modules are intended for use in a bi-directional DC-DC converter. The gate drive circuit is designed for operation in an enclosure in 120°C ambient air. Primary cooling of the gate drive is through the back of the circuit board to an aluminum plate, the base of which is cooled with engine coolant (water-ethylene glycol mixture) at an inlet temperature of 100°C. The power module consists of a single pole, with the close-coupled gate drive circuit providing independent and isolated drive for the two switches. The gate drive circuit is capable of operating the switches at PWM carrier frequencies up to 50 kHz, with duty cycles ranging from 0 to 98%.
对高温栅极驱动电路进行了电气和热优化研究，该电路用于驱动定制设计的50 a, 600 V碳化硅(SiC)功率模块，该模块由多个常关JFET器件(semissouth SJEC120R100)并联组成，额定器件结温为175°C。栅极驱动和电源模块用于双向DC-DC转换器。栅极驱动电路设计用于在120°C环境空气的外壳中运行。栅极驱动的一次冷却是通过电路板的背面到铝板上，铝板的底部用发动机冷却剂(水-乙二醇混合物)冷却，入口温度为100°C。电源模块由单极组成，紧耦合栅极驱动电路为两个开关提供独立和隔离的驱动。门驱动电路能够以高达50 kHz的PWM载波频率操作开关，占空比范围从0到98%。
{"title":"High-temperature gate drive circuit for silicon-carbide JFETs","authors":"Matthew Jones, B. Ratliff, Ya-Chi Chen, C. Neft, A. Bhunia","doi":"10.1109/WIPDA.2013.6695565","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695565","url":null,"abstract":"An electrical and thermal optimization study is conducted for a high-temperature gate drive circuit, developed to drive custom-designed, 50 A, 600 V silicon-carbide (SiC) power modules consisting of multiple normally-off JFET dice (SemiSouth SJEC120R100) in parallel and rated at 175 °C device junction temperature. The gate drive and power modules are intended for use in a bi-directional DC-DC converter. The gate drive circuit is designed for operation in an enclosure in 120°C ambient air. Primary cooling of the gate drive is through the back of the circuit board to an aluminum plate, the base of which is cooled with engine coolant (water-ethylene glycol mixture) at an inlet temperature of 100°C. The power module consists of a single pole, with the close-coupled gate drive circuit providing independent and isolated drive for the two switches. The gate drive circuit is capable of operating the switches at PWM carrier frequencies up to 50 kHz, with duty cycles ranging from 0 to 98%.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122077252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-10-01DOI: 10.1109/WIPDA.2013.6695579
B. Hughes, J. Lazar, S. Hulsey, A. Garrido, D. Zehnder, Marcel Musni, R. Chu, K. Boutros
New techniques for measuring and analyzing losses in GaN power converters are presented. A 2.4kW synchronous boost converter, switching 300V at 1MHz with normally-off, AlN-base gate, AlGaN/GaN HFETs [1], serves as a vehicle to substantiate the results. An infrared camera is utilized to accurately measure temperatures of the upper and lower switches, as a function of switched current. These temperature measurements are correlated to loss in the respective switches, utilizing temperature data obtained via DC loss measurements. The higher temperature observed in the lower switch results from the switching loss in that switch, and is clearly evident in the thermal images. Analysis of the temperature dependence exposes the loss due to dynamic on-resistance and the switching loss. The extracted parameters accurately model both the efficiency and junction temperatures versus switching current.
{"title":"Analyzing losses using junction temperature of 300V 2.4kW 96% efficient, 1MHz GaN synchronous boost converter","authors":"B. Hughes, J. Lazar, S. Hulsey, A. Garrido, D. Zehnder, Marcel Musni, R. Chu, K. Boutros","doi":"10.1109/WIPDA.2013.6695579","DOIUrl":"https://doi.org/10.1109/WIPDA.2013.6695579","url":null,"abstract":"New techniques for measuring and analyzing losses in GaN power converters are presented. A 2.4kW synchronous boost converter, switching 300V at 1MHz with normally-off, AlN-base gate, AlGaN/GaN HFETs [1], serves as a vehicle to substantiate the results. An infrared camera is utilized to accurately measure temperatures of the upper and lower switches, as a function of switched current. These temperature measurements are correlated to loss in the respective switches, utilizing temperature data obtained via DC loss measurements. The higher temperature observed in the lower switch results from the switching loss in that switch, and is clearly evident in the thermal images. Analysis of the temperature dependence exposes the loss due to dynamic on-resistance and the switching loss. The extracted parameters accurately model both the efficiency and junction temperatures versus switching current.","PeriodicalId":313351,"journal":{"name":"The 1st IEEE Workshop on Wide Bandgap Power Devices and Applications","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121091613","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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