Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526227
S. Datta, Shampa De
In this paper a substation model is represented with current technologies which gives a new look to the idea of a substations. A transitory comparison of a voltage with respect to time distribution is shown for the presence of components in a 230/11 kV substation with application of single-line-to-ground fault, double-line-to-ground fault and an external surge with the effect of lightning included as a whole affecting all the components. Positive sequence resistance and zero sequence resistances are varied accordingly for change in condition of the parameters and equipment. Simulation of a 230/11 kV substation model is shown by different circumstances with the help of ATP/EMTP is shown in this paper.
{"title":"Study of 230/11 kV Substation Under Different Type of Faults","authors":"S. Datta, Shampa De","doi":"10.1109/ICCECE.2017.8526227","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526227","url":null,"abstract":"In this paper a substation model is represented with current technologies which gives a new look to the idea of a substations. A transitory comparison of a voltage with respect to time distribution is shown for the presence of components in a 230/11 kV substation with application of single-line-to-ground fault, double-line-to-ground fault and an external surge with the effect of lightning included as a whole affecting all the components. Positive sequence resistance and zero sequence resistances are varied accordingly for change in condition of the parameters and equipment. Simulation of a 230/11 kV substation model is shown by different circumstances with the help of ATP/EMTP is shown in this paper.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"261 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122689666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526215
Chandan Baneriee, Sayak Paul, Moinak Ghoshal
The researches in the world of Machine Learning and Artificial Intelligence are increasing as the modern day progresses. By finding manifold applications in wide range of fields the art of Machine Learning only promises to get better. Predictive models form the core of Machine Learning. Better the accuracy better the model is and so is the solution to a particular problem. Ensemble Learning algorithms are a set of algorithms which are used to enhance the predictive accuracy of a predictive model. In this work, a comparative study of different Ensemble Learning techniques has been presented using the Wisconsin Breast Cancer dataset. The primary objective behind using Ensemble learning here is a classification task. This comparative study should help the researchers to find the suitable Ensemble Learning technique for improving their results.
{"title":"A Comparative Study of Different Ensemble Learning Techniques Using Wisconsin Breast Cancer Dataset","authors":"Chandan Baneriee, Sayak Paul, Moinak Ghoshal","doi":"10.1109/ICCECE.2017.8526215","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526215","url":null,"abstract":"The researches in the world of Machine Learning and Artificial Intelligence are increasing as the modern day progresses. By finding manifold applications in wide range of fields the art of Machine Learning only promises to get better. Predictive models form the core of Machine Learning. Better the accuracy better the model is and so is the solution to a particular problem. Ensemble Learning algorithms are a set of algorithms which are used to enhance the predictive accuracy of a predictive model. In this work, a comparative study of different Ensemble Learning techniques has been presented using the Wisconsin Breast Cancer dataset. The primary objective behind using Ensemble learning here is a classification task. This comparative study should help the researchers to find the suitable Ensemble Learning technique for improving their results.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"45 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116111894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526231
Anirban Chowdhury, R. Roy, K. Mandal
A nature inspired, meta-heuristic algorithm, Cuckoo Search using Lévy Flights, is applied on a multiobjective, constrained problem to find the optimal allocation of a single and two distributed generators (DG), taking into consideration of security limits. During sizing and optimal allocation of the DG/DGs, technical, social and economic conditions have been taken into account. The multi-objective function is based on indices namely, voltage profile enhancement index (VPEI), emission cost benefit index (ECBI) and benefit cost ratio (BCR), so as to analyze the effect of the DG/DGs on IEEE IEEE 33 and IEEE 69 bus systems. This manuscript presents a comparative study of single DG and twin DG allocation of same capacity in total as well as the performance of the proposed algorithm in calculating the optimal size of DG considering the technical, social and economic impacts.
{"title":"Cost Modelling, Sizing and Multi-Point Allocation of Solar Powered DG Using Multi-Objective Cuckoo Search Via Lévy Flights Considering Economic, Technical and Environmental Impacts Along with Voltage Stability","authors":"Anirban Chowdhury, R. Roy, K. Mandal","doi":"10.1109/ICCECE.2017.8526231","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526231","url":null,"abstract":"A nature inspired, meta-heuristic algorithm, Cuckoo Search using Lévy Flights, is applied on a multiobjective, constrained problem to find the optimal allocation of a single and two distributed generators (DG), taking into consideration of security limits. During sizing and optimal allocation of the DG/DGs, technical, social and economic conditions have been taken into account. The multi-objective function is based on indices namely, voltage profile enhancement index (VPEI), emission cost benefit index (ECBI) and benefit cost ratio (BCR), so as to analyze the effect of the DG/DGs on IEEE IEEE 33 and IEEE 69 bus systems. This manuscript presents a comparative study of single DG and twin DG allocation of same capacity in total as well as the performance of the proposed algorithm in calculating the optimal size of DG considering the technical, social and economic impacts.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116589615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526204
Hindol Bhattacharya, Samiran Chattopadhyay, M. Chattopadhyay
Big data analytics based data exploration and utilization holds immense prospects for the future of businesses. However, as the name suggests, processing such a huge amount of data is challenging. Hadoop with its parallel processing solutions, assists in processing big data in reasonable time. The heart of Hadoop is its distributed File System; and indeed how data is placed in the file system dictates the speed of the data processing. Hence, over the years efficient data placement algorithms has been one of the key research area in big data analytics. Evaluation of such algorithms traditionally requires deploying HDFS on hardware clusters and implementing the data placement algorithm on it. It is often difficult for researchers to acquire required hardware and build a hardware clusters. Even when such clusters are available, scalability becomes an issue. Moreover, real life data center like cluster is not available to many researchers. Simulation provides low cost alternative to evaluation of big data placement algorithms on HDFS. One of the key metrices that is optimized in data placement algorithms is to minimize communication costs and latency. Thus a network simulation based simulation framework would fit the role perfectly. NS3 is one of the most prominent network simulation tool available for researchers. However, full HDFS support for data placement research is still not implemented. This work proposes to extend the NS3 simulation environment for HDFS support and eventual use for data placement algorithm evaluation.
{"title":"NS3 Based HDFS Data Placement Algorithm Evaluation Framework","authors":"Hindol Bhattacharya, Samiran Chattopadhyay, M. Chattopadhyay","doi":"10.1109/ICCECE.2017.8526204","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526204","url":null,"abstract":"Big data analytics based data exploration and utilization holds immense prospects for the future of businesses. However, as the name suggests, processing such a huge amount of data is challenging. Hadoop with its parallel processing solutions, assists in processing big data in reasonable time. The heart of Hadoop is its distributed File System; and indeed how data is placed in the file system dictates the speed of the data processing. Hence, over the years efficient data placement algorithms has been one of the key research area in big data analytics. Evaluation of such algorithms traditionally requires deploying HDFS on hardware clusters and implementing the data placement algorithm on it. It is often difficult for researchers to acquire required hardware and build a hardware clusters. Even when such clusters are available, scalability becomes an issue. Moreover, real life data center like cluster is not available to many researchers. Simulation provides low cost alternative to evaluation of big data placement algorithms on HDFS. One of the key metrices that is optimized in data placement algorithms is to minimize communication costs and latency. Thus a network simulation based simulation framework would fit the role perfectly. NS3 is one of the most prominent network simulation tool available for researchers. However, full HDFS support for data placement research is still not implemented. This work proposes to extend the NS3 simulation environment for HDFS support and eventual use for data placement algorithm evaluation.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128111419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526199
N. Gogoi, P. Sahu
We have proposed a compact optical power splitter using two-mode interference (TMI) coupling in an index guided surface plasmonic waveguide. The device is made up of silicon core, silver upper and lower cladding and silicon dioxide side claddings. By using a numerical analysis based on effective index methods, the coupling characteristics of the device are studied and its application as a compact optical power splitter is shown theoretically for a wavelength of O.6328ILm. The device length for a 3dB power splitting ratio is estimated as 334 nm which is about rv313 times and ~1.31 times smaller than a previously published works.
{"title":"SPP Based Compact Optical Power Splitter Using Two-Mode Interference Coupling","authors":"N. Gogoi, P. Sahu","doi":"10.1109/ICCECE.2017.8526199","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526199","url":null,"abstract":"We have proposed a compact optical power splitter using two-mode interference (TMI) coupling in an index guided surface plasmonic waveguide. The device is made up of silicon core, silver upper and lower cladding and silicon dioxide side claddings. By using a numerical analysis based on effective index methods, the coupling characteristics of the device are studied and its application as a compact optical power splitter is shown theoretically for a wavelength of O.6328ILm. The device length for a 3dB power splitting ratio is estimated as 334 nm which is about rv313 times and ~1.31 times smaller than a previously published works.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"72 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114005716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526193
I. Sil, Sagar Mukherjee, Kalyan Biswas
This paper presents a Complementary Metal Oxide Semiconductor (CMOS) based Thermoelectric Power Generator (TPG) to harvest unused heat and convert it to usable electrical current. Detailed simulation and analysis of various model has been shown for thermoelectric power generator (TPG) to achieve improved performance. Thermal analysis using the ANSYS software has been done for various models to show the increase in output current of the thermocouple. Different techniques like change in heat sink material, formation of cavities, change in contact materials, change in thermocouple length and width to improve the temperature difference between hot and cold junction and the output current. Comparison has been made for different devices by changing parameters to select the best model to deliver more electrical current. Large Seebeck effects are found in doped Poly-Silicon, which makes it a suitable choice for CMOS based thermoelectric devices. Thin film of poly-Si is deposited and patterned to form thermocouples, and an array of thermocouples, i.e., a thermopile, could be arranged in a tiny area. For a device in the size of $500mu text{m}^{2}$ with effective length (L) of each thermocouple is $5 mu text{m}$, an output current of O.4mA is obtained with a 5K temperature difference across two sides.
本文介绍了一种基于互补金属氧化物半导体(CMOS)的热电发电机(TPG)，用于收集未使用的热量并将其转换为可用的电流。为了提高热电发电机的性能，对各种模型进行了详细的仿真和分析。利用ANSYS软件对各种模型进行了热分析，显示了热电偶输出电流的增加。通过改变散热片材料、形成空腔、改变触点材料、改变热电偶长度和宽度等不同的技术来改善冷热端温差和输出电流。通过改变参数，对不同的器件进行了比较，以选择提供更大电流的最佳型号。在掺杂多晶硅中发现了较大的塞贝克效应，这使其成为基于CMOS的热电器件的合适选择。多晶硅薄膜的沉积和图像化，形成热电偶，热电偶阵列，即热电堆，可以安排在一个很小的区域。对于尺寸为$500mu text{m}^{2}$的器件，每个热电偶的有效长度(L)为$5 mu text{m}$，可获得0.4 ma的输出电流，两侧温差为5K。
{"title":"Simulation and Analysis of CMOS Based Micro Thermoelectric Power Generator","authors":"I. Sil, Sagar Mukherjee, Kalyan Biswas","doi":"10.1109/ICCECE.2017.8526193","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526193","url":null,"abstract":"This paper presents a Complementary Metal Oxide Semiconductor (CMOS) based Thermoelectric Power Generator (TPG) to harvest unused heat and convert it to usable electrical current. Detailed simulation and analysis of various model has been shown for thermoelectric power generator (TPG) to achieve improved performance. Thermal analysis using the ANSYS software has been done for various models to show the increase in output current of the thermocouple. Different techniques like change in heat sink material, formation of cavities, change in contact materials, change in thermocouple length and width to improve the temperature difference between hot and cold junction and the output current. Comparison has been made for different devices by changing parameters to select the best model to deliver more electrical current. Large Seebeck effects are found in doped Poly-Silicon, which makes it a suitable choice for CMOS based thermoelectric devices. Thin film of poly-Si is deposited and patterned to form thermocouples, and an array of thermocouples, i.e., a thermopile, could be arranged in a tiny area. For a device in the size of $500mu text{m}^{2}$ with effective length (L) of each thermocouple is $5 mu text{m}$, an output current of O.4mA is obtained with a 5K temperature difference across two sides.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126128991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526226
Umang Soni, BK Sha, H. Ratha
Count Down Time (CDT) and Accumulated Time of the Day (ATD) are essential parameters for any flight testing in a test range. Conventional CDT systems are hardware based and are bulky, costly and very difficult to reconfigure. Soft CDT system is an alternative system having all the functionalities of the existing CDT system. Ethernet based communication is used to overcome the inherent problems associated with the serial communication in the existing system. The system is designed over PC based platform in LabVIEW environment to provide simplified, reconfigurable and easy to handle CDT scheme. High speed video test results are carried out to verify the delay attributed to Ethernet communication in the proposed system.
{"title":"Soft Count Down Time Generation and Dissemination System Over LabVIEW Environment","authors":"Umang Soni, BK Sha, H. Ratha","doi":"10.1109/ICCECE.2017.8526226","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526226","url":null,"abstract":"Count Down Time (CDT) and Accumulated Time of the Day (ATD) are essential parameters for any flight testing in a test range. Conventional CDT systems are hardware based and are bulky, costly and very difficult to reconfigure. Soft CDT system is an alternative system having all the functionalities of the existing CDT system. Ethernet based communication is used to overcome the inherent problems associated with the serial communication in the existing system. The system is designed over PC based platform in LabVIEW environment to provide simplified, reconfigurable and easy to handle CDT scheme. High speed video test results are carried out to verify the delay attributed to Ethernet communication in the proposed system.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132261713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526233
Saptarshi Mitra, Bappaditya Jana, Jayanta Poray
During last few decades' most of the commercial transactions transformed to e-Commerce applications. Some of the widely used ways of e-Transactions are Electronic Fund Transfer (EFT), Credit/Debit Cards, Net-banking, e-Wallets, mobile banking. Mostly it has been observed that there is innumerable number of attacks in cashless e-Commerce transactions, where intruders try to manipulate data for evil purpose. Use of cryptographic technique is one of the popular way to avoid such attacks and to prevent cross-site snatching vulnerabilities, insecure permissions, and other possible threats. In this paper we have used a novel technique based on triple Data Encryption Standard (DES) and compared the security level of this method with other frequently used encryption algorithms such as RSA and Hash function and we observed that if we can fix the issues regarding key transfer and process slow down, it will upgrade the overall security level.
{"title":"Implementation of a Novel Security Technique Using Triple DES in Cashless Transaction","authors":"Saptarshi Mitra, Bappaditya Jana, Jayanta Poray","doi":"10.1109/ICCECE.2017.8526233","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526233","url":null,"abstract":"During last few decades' most of the commercial transactions transformed to e-Commerce applications. Some of the widely used ways of e-Transactions are Electronic Fund Transfer (EFT), Credit/Debit Cards, Net-banking, e-Wallets, mobile banking. Mostly it has been observed that there is innumerable number of attacks in cashless e-Commerce transactions, where intruders try to manipulate data for evil purpose. Use of cryptographic technique is one of the popular way to avoid such attacks and to prevent cross-site snatching vulnerabilities, insecure permissions, and other possible threats. In this paper we have used a novel technique based on triple Data Encryption Standard (DES) and compared the security level of this method with other frequently used encryption algorithms such as RSA and Hash function and we observed that if we can fix the issues regarding key transfer and process slow down, it will upgrade the overall security level.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124969106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526179
S. De, M. Jyothish, Sunanda Thunder
s-This paper derives an expression for nonregenerative recirculating loop and proposes a concept of modeling all-optical buffer in optical packet switches using optical recirculating loop. We simulate a generalized optical delay produced by a recirculating loop which has been used to emulate optical buffers. The theorem developed in this paper can be exploited to model all-optical recirculating buffers. The paper establishes a relation between maximum delay and maximum number of pulses. The algebraic expression has been derived with assumption that no amplifier has been used.
{"title":"Analytic Modeling of Optical Recirculating Loop to Define the Constraints of Using it as Optical Buffer","authors":"S. De, M. Jyothish, Sunanda Thunder","doi":"10.1109/ICCECE.2017.8526179","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526179","url":null,"abstract":"s-This paper derives an expression for nonregenerative recirculating loop and proposes a concept of modeling all-optical buffer in optical packet switches using optical recirculating loop. We simulate a generalized optical delay produced by a recirculating loop which has been used to emulate optical buffers. The theorem developed in this paper can be exploited to model all-optical recirculating buffers. The paper establishes a relation between maximum delay and maximum number of pulses. The algebraic expression has been derived with assumption that no amplifier has been used.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131405715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-12-01DOI: 10.1109/ICCECE.2017.8526229
Shreya Adhvaryyu, Chiranjib Mukherjee, D. Seri
The Unified Power Flow Controller (UPFC), which is the most versatile and suitable Flexible AC Transmission Systems (FACTS) device, can maintain a stable and secure operation of modern deregulated power systems as it can control power flow and power flow variables independently or simultaneously. In this paper, MiPower software is used to find the optimal placement of UPFC considering practical constraints. In order to reduce the search space and computation time, performance assessment of the device is executed only at the weaker lines of the system. The weaker buses and weaker lines are identified using Fast Voltage Stability Index (FVSI). The losses of UPFC itself such as switching losses of converters, losses due to coupling transformers and power transmission losses in UPFC are taken into account for power flow calculation. Considering practical upper and lower limits of voltage magnitude, an innovative voltage profile enhancement index (VPEI) is formulated. In this paper, objective functions, namely, overall improvement in FVSI, VPEI, reduction in losses and expenditure of UPFC are considered altogether in order to determine the optimal location of UPFC on IEEE 30-bus test system.
{"title":"Security Constrained Optimal Power Flow with Optimally Allocated UPFC Based on Technical and Economic Criteria","authors":"Shreya Adhvaryyu, Chiranjib Mukherjee, D. Seri","doi":"10.1109/ICCECE.2017.8526229","DOIUrl":"https://doi.org/10.1109/ICCECE.2017.8526229","url":null,"abstract":"The Unified Power Flow Controller (UPFC), which is the most versatile and suitable Flexible AC Transmission Systems (FACTS) device, can maintain a stable and secure operation of modern deregulated power systems as it can control power flow and power flow variables independently or simultaneously. In this paper, MiPower software is used to find the optimal placement of UPFC considering practical constraints. In order to reduce the search space and computation time, performance assessment of the device is executed only at the weaker lines of the system. The weaker buses and weaker lines are identified using Fast Voltage Stability Index (FVSI). The losses of UPFC itself such as switching losses of converters, losses due to coupling transformers and power transmission losses in UPFC are taken into account for power flow calculation. Considering practical upper and lower limits of voltage magnitude, an innovative voltage profile enhancement index (VPEI) is formulated. In this paper, objective functions, namely, overall improvement in FVSI, VPEI, reduction in losses and expenditure of UPFC are considered altogether in order to determine the optimal location of UPFC on IEEE 30-bus test system.","PeriodicalId":325599,"journal":{"name":"2017 International Conference on Computer, Electrical & Communication Engineering (ICCECE)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134034832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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