Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658584
Yeong-Jae Woo, Jin-Soo Kim
NAND flash-based solid state drives (SSDs) are replacing magnetic disks because of their fast random access performance, shock resistance, and low power consumption. However, the number of program and erase cycles that can be performed on NAND flash is limited. To overcome this limitation, SSDs require a sophisticated wear-leveling algorithm which distributes program/erase cycles evenly across all flash blocks. While most of existing wear-leveling algorithms are only based on the erase counts of flash blocks, our empirical study indicates that the erase count alone is not a good wear index which tells us how much a flash block is worn out. This paper proposes a new wear index for MLC NAND flash memory which takes into account more diverse properties of NAND flash memory. To show the effectiveness of the proposed wear index, we also develop a wear-leveling algorithm, named Equalizer. In our evaluation with three realistic workloads, Equalizer based on the proposed wear index improves the effective lifetime of SSDs by up to 145% compared to the existing wear-leveling technique based on the erase count.
{"title":"Diversifying wear index for MLC NAND flash memory to extend the lifetime of SSDs","authors":"Yeong-Jae Woo, Jin-Soo Kim","doi":"10.1109/EMSOFT.2013.6658584","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658584","url":null,"abstract":"NAND flash-based solid state drives (SSDs) are replacing magnetic disks because of their fast random access performance, shock resistance, and low power consumption. However, the number of program and erase cycles that can be performed on NAND flash is limited. To overcome this limitation, SSDs require a sophisticated wear-leveling algorithm which distributes program/erase cycles evenly across all flash blocks. While most of existing wear-leveling algorithms are only based on the erase counts of flash blocks, our empirical study indicates that the erase count alone is not a good wear index which tells us how much a flash block is worn out. This paper proposes a new wear index for MLC NAND flash memory which takes into account more diverse properties of NAND flash memory. To show the effectiveness of the proposed wear index, we also develop a wear-leveling algorithm, named Equalizer. In our evaluation with three realistic workloads, Equalizer based on the proposed wear index improves the effective lifetime of SSDs by up to 145% compared to the existing wear-leveling technique based on the erase count.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"191 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121431963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658595
G. Giannopoulou, N. Stoimenov, Pengcheng Huang, L. Thiele
A common trend in real-time safety-critical embedded systems is to integrate multiple applications on a single platform. Such systems are known as mixed-criticality (MC) systems as the applications are usually characterized by different criticality levels (CLs). Nowadays, multicore platforms are promoted due to cost and performance benefits. However, certification of multicore MC systems is challenging because concurrently executed applications with different CLs may block each other when accessing shared platform resources. Most of the existing research on multicore MC scheduling ignores the effects of resource sharing on the execution times of applications. This paper proposes a MC scheduling strategy which explicitly accounts for these effects. Applications are executed by a flexible time-triggered criticality-monotonic scheduling scheme. Schedulers on different cores are dynamically synchronized such that only a statically known subset of applications of the same CL can interfere on shared resources, e. g.,memories, buses. Therefore, the timing effects of resource sharing are bounded and we quantify them at design time. We combine this scheduling strategy with a mapping optimization technique for achieving better resource utilization. The efficiency of the approach is demonstrated through extensive simulations as well as comparisons with traditional temporal partitioning and state-of-the-art scheduling algorithms. It is also validated on a real-world avionics system.
{"title":"Scheduling of mixed-criticality applications on resource-sharing multicore systems","authors":"G. Giannopoulou, N. Stoimenov, Pengcheng Huang, L. Thiele","doi":"10.1109/EMSOFT.2013.6658595","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658595","url":null,"abstract":"A common trend in real-time safety-critical embedded systems is to integrate multiple applications on a single platform. Such systems are known as mixed-criticality (MC) systems as the applications are usually characterized by different criticality levels (CLs). Nowadays, multicore platforms are promoted due to cost and performance benefits. However, certification of multicore MC systems is challenging because concurrently executed applications with different CLs may block each other when accessing shared platform resources. Most of the existing research on multicore MC scheduling ignores the effects of resource sharing on the execution times of applications. This paper proposes a MC scheduling strategy which explicitly accounts for these effects. Applications are executed by a flexible time-triggered criticality-monotonic scheduling scheme. Schedulers on different cores are dynamically synchronized such that only a statically known subset of applications of the same CL can interfere on shared resources, e. g.,memories, buses. Therefore, the timing effects of resource sharing are bounded and we quantify them at design time. We combine this scheduling strategy with a mapping optimization technique for achieving better resource utilization. The efficiency of the approach is demonstrated through extensive simulations as well as comparisons with traditional temporal partitioning and state-of-the-art scheduling algorithms. It is also validated on a real-world avionics system.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133896445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658588
Magnus Persson, Martin Törngren, A. Qamar, Jonas Westman, M. Biehl, S. Tripakis, H. Vangheluwe, J. Denil
Embedded systems, with their tight technology integration, and multiple requirements and stakeholders, are characterized by tightly interrelated processes, information and tools. Embedded systems will as a consequence be described by multiple, heterogeneous and interrelated descriptions such as for example requirements documents, design and analysis models, software and hardware descriptions. We refer to a system designed this way as a multi-view (MV) system. The main contribution of this paper is a characterization of model-based approaches to MV systems. The characterization takes three main perspectives for the relations between viewpoints: semantic relations (content), relations over time (process), and manipulation of views (operations). We complement these perspectives by investigating MV system challenges and by a survey of related approaches. The characterization aims to provide a basis for a better understanding, design and implementation of MV systems, and thereby to overcome the current fragmented points of view on integrated multi-view modeling (MVM).
{"title":"A characterization of integrated multi-view modeling in the context of embedded and cyber-physical systems","authors":"Magnus Persson, Martin Törngren, A. Qamar, Jonas Westman, M. Biehl, S. Tripakis, H. Vangheluwe, J. Denil","doi":"10.1109/EMSOFT.2013.6658588","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658588","url":null,"abstract":"Embedded systems, with their tight technology integration, and multiple requirements and stakeholders, are characterized by tightly interrelated processes, information and tools. Embedded systems will as a consequence be described by multiple, heterogeneous and interrelated descriptions such as for example requirements documents, design and analysis models, software and hardware descriptions. We refer to a system designed this way as a multi-view (MV) system. The main contribution of this paper is a characterization of model-based approaches to MV systems. The characterization takes three main perspectives for the relations between viewpoints: semantic relations (content), relations over time (process), and manipulation of views (operations). We complement these perspectives by investigating MV system challenges and by a survey of related approaches. The characterization aims to provide a basis for a better understanding, design and implementation of MV systems, and thereby to overcome the current fragmented points of view on integrated multi-view modeling (MVM).","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115634696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658602
P. Prabhakar, Jun Liu, R. Murray
Pre-orders on systems are the basis for abstraction based verification of systems. In this paper, we investigate pre-orders for reasoning about stability with respect to inputs of hybrid systems. First, we present a superposition type theorem which gives a characterization of the classical incremental input-to-state stability of continuous systems in terms of the traditional ε-δ definition of stability. We use this as the basis for defining a notion of incremental input-to-state stability of hybrid systems. Next, we present a pre-order on hybrid systems which preserves incremental input-to-state stability, by extending the classical definitions of bisimulation relations on systems with input, with uniform continuity constraints. We show that the uniform continuity is a necessary requirement by exhibiting counter-examples to show that weaker notions of input bisimulation with just continuity requirements do not suffice to preserve stability. Finally, we demonstrate that the definitions are useful, by exhibiting concrete abstraction functions which satisfy the definitions of pre-orders.
{"title":"Pre-orders for reasoning about stability properties with respect to input of hybrid systems","authors":"P. Prabhakar, Jun Liu, R. Murray","doi":"10.1109/EMSOFT.2013.6658602","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658602","url":null,"abstract":"Pre-orders on systems are the basis for abstraction based verification of systems. In this paper, we investigate pre-orders for reasoning about stability with respect to inputs of hybrid systems. First, we present a superposition type theorem which gives a characterization of the classical incremental input-to-state stability of continuous systems in terms of the traditional ε-δ definition of stability. We use this as the basis for defining a notion of incremental input-to-state stability of hybrid systems. Next, we present a pre-order on hybrid systems which preserves incremental input-to-state stability, by extending the classical definitions of bisimulation relations on systems with input, with uniform continuity constraints. We show that the uniform continuity is a necessary requirement by exhibiting counter-examples to show that weaker notions of input bisimulation with just continuity requirements do not suffice to preserve stability. Finally, we demonstrate that the definitions are useful, by exhibiting concrete abstraction functions which satisfy the definitions of pre-orders.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124006127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658589
Ethan K. Jackson, Gabor Simko, J. Sztipanovits
Embedded systems are highly constrained, and modern constraint solvers can be used to synthesize architectures satisfying constraints. However, solvers may enumerate solutions with bias yielding a skewed view of the solution space. In this paper we formalize enumerators, enumeration bias, and build empirically diverse enumerators. An ideal diverse enumerator uniformly draws equivalence classes of solutions. We develop an algorithm, called symmetry-directed randomized partitioning, for constructing empirically diverse enumerators from modern unmodified constraint solvers. We show that our diverse enumerator is significantly closer to the ideal compared to baseline and randomized solvers.
{"title":"Diversely enumerating system-level architectures","authors":"Ethan K. Jackson, Gabor Simko, J. Sztipanovits","doi":"10.1109/EMSOFT.2013.6658589","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658589","url":null,"abstract":"Embedded systems are highly constrained, and modern constraint solvers can be used to synthesize architectures satisfying constraints. However, solvers may enumerate solutions with bias yielding a skewed view of the solution space. In this paper we formalize enumerators, enumeration bias, and build empirically diverse enumerators. An ideal diverse enumerator uniformly draws equivalence classes of solutions. We develop an algorithm, called symmetry-directed randomized partitioning, for constructing empirically diverse enumerators from modern unmodified constraint solvers. We show that our diverse enumerator is significantly closer to the ideal compared to baseline and randomized solvers.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123014920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-29DOI: 10.1109/EMSOFT.2013.6658605
Kwanghwan Kim, H. Cha
Android provides a WakeLock mechanism for application developers to ensure the proper execution of applications without having to enter the sleep state of a device. When using the WakeLock mechanism, application developers should bear the responsibility of adequately releasing the acquired lock. Otherwise, the energy will unnecessarily be wasted due to a locked application. This paper presents a scheme, called WakeScope, to handle WakeLock misuse. The scheme is designed to detect and notify of a misuse case of WakeLock handling, which may arise with an application and even with an Android runtime system, and thus provides a practical tool to prevent energy waste in mobile devices. Our experiments with real applications show that WakeScope accurately detects the misused case, with runtime overhead of approximately 1.2% in CPU usage.
{"title":"WakeScope: Runtime WakeLock anomaly management scheme for Android platform","authors":"Kwanghwan Kim, H. Cha","doi":"10.1109/EMSOFT.2013.6658605","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658605","url":null,"abstract":"Android provides a WakeLock mechanism for application developers to ensure the proper execution of applications without having to enter the sleep state of a device. When using the WakeLock mechanism, application developers should bear the responsibility of adequately releasing the acquired lock. Otherwise, the energy will unnecessarily be wasted due to a locked application. This paper presents a scheme, called WakeScope, to handle WakeLock misuse. The scheme is designed to detect and notify of a misuse case of WakeLock handling, which may arise with an application and even with an Android runtime system, and thus provides a practical tool to prevent energy waste in mobile devices. Our experiments with real applications show that WakeScope accurately detects the misused case, with runtime overhead of approximately 1.2% in CPU usage.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129215652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-09-01DOI: 10.1109/EMSOFT.2013.6658597
H. Hoffmann, M. Maggio, M. Santambrogio, A. Leva, A. Agarwal
A number of techniques have been proposed to provide runtime performance guarantees while minimizing power consumption. One drawback of existing approaches is that they work only on a fixed set of components (or actuators) that must be specified at design time. If new components become available, these management systems must be redesigned and reimplemented. In this paper, we propose PTRADE, a novel performance management framework that is general with respect to the components it manages. PTRADE can be deployed to work on a new system with different components without redesign and reimplementation. PTRADE's generality is demonstrated through the management of performance goals for a variety of benchmarks on two different Linux/x86 systems and a simulated 128-core system, each with different components governing power and performance tradeoffs. Our experimental results show that PTRADE provides generality while meeting performance goals with low error and close to optimal power consumption.
{"title":"A generalized software framework for accurate and efficient management of performance goals","authors":"H. Hoffmann, M. Maggio, M. Santambrogio, A. Leva, A. Agarwal","doi":"10.1109/EMSOFT.2013.6658597","DOIUrl":"https://doi.org/10.1109/EMSOFT.2013.6658597","url":null,"abstract":"A number of techniques have been proposed to provide runtime performance guarantees while minimizing power consumption. One drawback of existing approaches is that they work only on a fixed set of components (or actuators) that must be specified at design time. If new components become available, these management systems must be redesigned and reimplemented. In this paper, we propose PTRADE, a novel performance management framework that is general with respect to the components it manages. PTRADE can be deployed to work on a new system with different components without redesign and reimplementation. PTRADE's generality is demonstrated through the management of performance goals for a variety of benchmarks on two different Linux/x86 systems and a simulated 128-core system, each with different components governing power and performance tradeoffs. Our experimental results show that PTRADE provides generality while meeting performance goals with low error and close to optimal power consumption.","PeriodicalId":325726,"journal":{"name":"2013 Proceedings of the International Conference on Embedded Software (EMSOFT)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133161417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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