Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043950
Elisha Elikem Kofi Senoo, Ebenezer Akansah, Israel Mendonça, M. Aritsugi
Performance, energy efficiency, and other run-time attributes are usually prioritized by stakeholders in the embedded software industry as evaluation metrics, which often results in a trade-off of maintainability, reusability and other design-time qualities. But the need for shorter maintenance cycles is becoming more and more important, as more IoT devices and systems get adopted. Object-oriented programming (OOP) SOLID principles are well adopted practices in software development projects in achieving design-time qualities including maintainability and reusability. Despite the fact that maintainability and reusability are the design-time qualities that drive embedded software refactoring, the absence of a standard embedded software framework results in redundant and wasted development effort. In this study, we apply OOP SOLID principles to implement selected sensors to create an open-source library. This work can help beginners to quickly get started with sensors, and also help embedded software developers to build highly scalable and maintainable systems.
{"title":"Implementing SOLID principles for IoT Arduino sensor code","authors":"Elisha Elikem Kofi Senoo, Ebenezer Akansah, Israel Mendonça, M. Aritsugi","doi":"10.1109/JAC-ECC56395.2022.10043950","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043950","url":null,"abstract":"Performance, energy efficiency, and other run-time attributes are usually prioritized by stakeholders in the embedded software industry as evaluation metrics, which often results in a trade-off of maintainability, reusability and other design-time qualities. But the need for shorter maintenance cycles is becoming more and more important, as more IoT devices and systems get adopted. Object-oriented programming (OOP) SOLID principles are well adopted practices in software development projects in achieving design-time qualities including maintainability and reusability. Despite the fact that maintainability and reusability are the design-time qualities that drive embedded software refactoring, the absence of a standard embedded software framework results in redundant and wasted development effort. In this study, we apply OOP SOLID principles to implement selected sensors to create an open-source library. This work can help beginners to quickly get started with sensors, and also help embedded software developers to build highly scalable and maintainable systems.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132410522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043893
Mohammed Essam, A. Shalaby, M. Taher
There is an increasing interest in hardware accelerators, both in academia and industry. The industry invests in application-level accelerators, like Graphics Processing Units (GPUs) or Field programmable Gate Array (FPGA) accelerators connected to the PCIe bus. Hardware accelerators outperform general purpose Central Processing Units (CPUs) in terms of power consumption and performance. Hardware accelerators seek to optimize arithmetic operations, since it is the heart of the computation circuitry in different algorithms and applications. In this context, posit is proposed to replace IEEE Standard 754-2008 floating point and offers more efficient arithmetic units in terms of accuracy and Power-Performance-Area (PPA) matrix. In this paper, we introduce a low power Verilog HDL design and implementation of Posit Arithmetic Unit (PAU) for efficient hardware accelerators. Our regular proposed PAU is synthesized on Xilinx ZYNQ-7000. The results show34% area improvement and 14% power saving, while our compact PAU achieves 25% area reduction and 45% power saving.
{"title":"Design and Implementation of Low Power Posit Arithmetic Unit for Efficient Hardware Accelerators","authors":"Mohammed Essam, A. Shalaby, M. Taher","doi":"10.1109/JAC-ECC56395.2022.10043893","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043893","url":null,"abstract":"There is an increasing interest in hardware accelerators, both in academia and industry. The industry invests in application-level accelerators, like Graphics Processing Units (GPUs) or Field programmable Gate Array (FPGA) accelerators connected to the PCIe bus. Hardware accelerators outperform general purpose Central Processing Units (CPUs) in terms of power consumption and performance. Hardware accelerators seek to optimize arithmetic operations, since it is the heart of the computation circuitry in different algorithms and applications. In this context, posit is proposed to replace IEEE Standard 754-2008 floating point and offers more efficient arithmetic units in terms of accuracy and Power-Performance-Area (PPA) matrix. In this paper, we introduce a low power Verilog HDL design and implementation of Posit Arithmetic Unit (PAU) for efficient hardware accelerators. Our regular proposed PAU is synthesized on Xilinx ZYNQ-7000. The results show34% area improvement and 14% power saving, while our compact PAU achieves 25% area reduction and 45% power saving.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125361046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043938
Mohammed A. B. Mahmoud
The topic of handwritten digit recognition (HDR) has drawn more and more attention in recent years. The biggest drawback of HDR is the lack of an efficient model that can categorise the handwritten numbers that users present via digital devices. Various methods have been developed to enhance HDR in Arabic, using on sophisticated deep learning techniques such convolution neural networks (CNNs), which are learning using a backpropagation algorithm that has many drawbacks, including: 1) Local minima possibility, 2) long learning time, 3) Non-assured convergence, 4) Selective learning data and 5) Black box: the inner mapping techniques of the BP are remaining unclear and not grasped. To overcome these limitations, this paper introduces the use of pseudoinverse learning autoencoder (PILAE) algorithm. The PILAE is not a gradient descent strategy; however, it is not required to specify the learning rate or suggest the quantity of hidden layers and the drawback of gradient vanishing. According to experimental findings, the introduced technique improves test accuracy while maximising computational efficiency.
{"title":"Arabic handwritten digit classification without gradients: Pseudoinverse Learners","authors":"Mohammed A. B. Mahmoud","doi":"10.1109/JAC-ECC56395.2022.10043938","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043938","url":null,"abstract":"The topic of handwritten digit recognition (HDR) has drawn more and more attention in recent years. The biggest drawback of HDR is the lack of an efficient model that can categorise the handwritten numbers that users present via digital devices. Various methods have been developed to enhance HDR in Arabic, using on sophisticated deep learning techniques such convolution neural networks (CNNs), which are learning using a backpropagation algorithm that has many drawbacks, including: 1) Local minima possibility, 2) long learning time, 3) Non-assured convergence, 4) Selective learning data and 5) Black box: the inner mapping techniques of the BP are remaining unclear and not grasped. To overcome these limitations, this paper introduces the use of pseudoinverse learning autoencoder (PILAE) algorithm. The PILAE is not a gradient descent strategy; however, it is not required to specify the learning rate or suggest the quantity of hidden layers and the drawback of gradient vanishing. According to experimental findings, the introduced technique improves test accuracy while maximising computational efficiency.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"300 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123464596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043954
Emad A. Elsheikh
Recently, computer vision has grown considerably in roboticsarms such as packaging and sorting for Industrial applications. The real challenge is how to improve the present sorting system based on artificial intelligence (AI) in the four points to identify, manipulate, select, and sort objects depending on their features. Therefore, this paper proposes an automatic sorting system based on Deep Learning (DL) and control in a robotic arm using an embedded PD-FLC. The proposed algorithm is divided into three stages; The first stage introduces building a Model for the identification and classification of fruits using the concept of Supervised deep learning (SDL) using the convolution neural network (CNN) algorithm. The model is trained using our data set of images that consider 12 classes of fruits named (Fruits-dataset). The second stage uses the pre-trained model and a web camera to automatically identify and classify the detected objects into 12 categories of fruits in real-time. The third stage uses an embedded proportional derivative fuzzy logic controller (PDFLC) to control the position of a 3DOF robotic arm to locate the classified object in the desired location. Our proposed SDLCNN model is tested to classify the fruits under different environment states (outdoor and indoor) in different color modes and intensities. The proposed SDL-CNN algorithm is compared with different state-of-the-art methods. Correspondingly, the obtained results show the effectiveness, high accuracy, and low cost of the developed design with the capability of real-time identifying and classifying the fruits.
{"title":"An Efficient Classification Process using Supervised Deep Learning and Robot Positioning based on Embedded PD-FLC","authors":"Emad A. Elsheikh","doi":"10.1109/JAC-ECC56395.2022.10043954","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043954","url":null,"abstract":"Recently, computer vision has grown considerably in roboticsarms such as packaging and sorting for Industrial applications. The real challenge is how to improve the present sorting system based on artificial intelligence (AI) in the four points to identify, manipulate, select, and sort objects depending on their features. Therefore, this paper proposes an automatic sorting system based on Deep Learning (DL) and control in a robotic arm using an embedded PD-FLC. The proposed algorithm is divided into three stages; The first stage introduces building a Model for the identification and classification of fruits using the concept of Supervised deep learning (SDL) using the convolution neural network (CNN) algorithm. The model is trained using our data set of images that consider 12 classes of fruits named (Fruits-dataset). The second stage uses the pre-trained model and a web camera to automatically identify and classify the detected objects into 12 categories of fruits in real-time. The third stage uses an embedded proportional derivative fuzzy logic controller (PDFLC) to control the position of a 3DOF robotic arm to locate the classified object in the desired location. Our proposed SDLCNN model is tested to classify the fruits under different environment states (outdoor and indoor) in different color modes and intensities. The proposed SDL-CNN algorithm is compared with different state-of-the-art methods. Correspondingly, the obtained results show the effectiveness, high accuracy, and low cost of the developed design with the capability of real-time identifying and classifying the fruits.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126524481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043877
Mohamed Abdel Fouly, T. Soliman, A. Taloba
A few years ago, information size increased unexpectedly and a data explosion happened. In this world of growing information, a change in database generation may also be required. Historically, we used a structured query language that works best with structured data. Now, we want to work with unstructured data as well as with structured data. The solution is to use not only SQL (NoSQL) database, this means not only structured query language. Recently, NoSQL databases are widely used in many organizations. Moreover, the data is kept in external services like Database as a Service (DaaS), where server-side and client-side security concerns are created. Additionally, the database’s query processing by several clients using complicated techniques and a shared resource environment may lead to ineffective data processing and retrieval. An effective data processing technique among several customers can be used to retrieve data in a secure and effective manner. In this paper, we present an Efficient Secure Query Processing Algorithm for Unstructured Data (ESQPA_U) for efficient query processing by applying data compression techniques before transferring the encrypted results from the server to clients. We have solved security concerns by using CryptDB to encrypt a database on the server to protect the data. Encryption methods have recently been suggested to give customers secrecy in cloud storage. The queries can be processed using encrypted data using this technique without having to first decrypt it. In order to evaluate ESQPA_U performance, it is contrasted with CryptDB existing query processing method. According to results, storage space is more effective and can save up to 57% of its original space.
{"title":"Developing an Efficient Secure Query Processing Algorithm for Unstructured Data on Encrypted Databases","authors":"Mohamed Abdel Fouly, T. Soliman, A. Taloba","doi":"10.1109/JAC-ECC56395.2022.10043877","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043877","url":null,"abstract":"A few years ago, information size increased unexpectedly and a data explosion happened. In this world of growing information, a change in database generation may also be required. Historically, we used a structured query language that works best with structured data. Now, we want to work with unstructured data as well as with structured data. The solution is to use not only SQL (NoSQL) database, this means not only structured query language. Recently, NoSQL databases are widely used in many organizations. Moreover, the data is kept in external services like Database as a Service (DaaS), where server-side and client-side security concerns are created. Additionally, the database’s query processing by several clients using complicated techniques and a shared resource environment may lead to ineffective data processing and retrieval. An effective data processing technique among several customers can be used to retrieve data in a secure and effective manner. In this paper, we present an Efficient Secure Query Processing Algorithm for Unstructured Data (ESQPA_U) for efficient query processing by applying data compression techniques before transferring the encrypted results from the server to clients. We have solved security concerns by using CryptDB to encrypt a database on the server to protect the data. Encryption methods have recently been suggested to give customers secrecy in cloud storage. The queries can be processed using encrypted data using this technique without having to first decrypt it. In order to evaluate ESQPA_U performance, it is contrasted with CryptDB existing query processing method. According to results, storage space is more effective and can save up to 57% of its original space.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133832661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10044036
Tamer S. Mostafa, Shaimaa A. Kroush, El- Sayed M. El- Rabaie
The OR-XOR-NOT gates are considered in this paper. They can be constructed in different topologies such as ring resonator, self-collimation, waveguide, and cavity-based structures. Linear and nonlinear materials are used to implement these gates in literature. In this paper, the proposed design is formed in a linear photonic crystal square lattice floor with ring resonator topology and interference based operation. By applying sensitivity analysis and by organizing the location of some rods; the OR-XOR NOT gates are verified. Simultaneous operation, minimum area structure and high bit rate are the remarkable figures of merits for this design. The minimum size of $56.16mathrm{mu m}^{2}$ is obtained. The bit rates of $5.02mathrm{~Tb}/mathrm{s}$, and 3.1Tpbs are calculated for OR, and XOR respectively. As the NOT-gate operation is a part of the XOR; so, it can be verified in this paper. The phase shift between the input powers and their effect are examined carefully. The threshold power level is considered as 0.3. Comparative tables are organized for both gates based on ring resonator topology. The fabrication methods are discussed and evaluated. These structures are designed, simulated and optimized at $1.55mumathrm{m}$ wavelength to verify OR-XOR-NOT gates.
{"title":"Simultaneous Operation of Photonic Crystal ORXOR- NOT Gates with Minimum Size and High Bit Rate Ring Resonator-Interference Based Structure","authors":"Tamer S. Mostafa, Shaimaa A. Kroush, El- Sayed M. El- Rabaie","doi":"10.1109/JAC-ECC56395.2022.10044036","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10044036","url":null,"abstract":"The OR-XOR-NOT gates are considered in this paper. They can be constructed in different topologies such as ring resonator, self-collimation, waveguide, and cavity-based structures. Linear and nonlinear materials are used to implement these gates in literature. In this paper, the proposed design is formed in a linear photonic crystal square lattice floor with ring resonator topology and interference based operation. By applying sensitivity analysis and by organizing the location of some rods; the OR-XOR NOT gates are verified. Simultaneous operation, minimum area structure and high bit rate are the remarkable figures of merits for this design. The minimum size of $56.16mathrm{mu m}^{2}$ is obtained. The bit rates of $5.02mathrm{~Tb}/mathrm{s}$, and 3.1Tpbs are calculated for OR, and XOR respectively. As the NOT-gate operation is a part of the XOR; so, it can be verified in this paper. The phase shift between the input powers and their effect are examined carefully. The threshold power level is considered as 0.3. Comparative tables are organized for both gates based on ring resonator topology. The fabrication methods are discussed and evaluated. These structures are designed, simulated and optimized at $1.55mumathrm{m}$ wavelength to verify OR-XOR-NOT gates.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133625107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043873
Mariam Abdelrahman, Ahmed Nasser, Ahmed Magdy, M. Elsabrouty
In this paper, the capacity enhancement problem in multi-user networks is considered through the assistance of reconfigurable intelligent surfaces (RIS). RIS can manage the interference among cells by optimizing its phase and amplitude reflection coefficients, which is a non-convex problem. For an improved solution, we propose a Multi-armed Bandit (MAB) based technique to optimize the RIS phase shift for interference management while preserving users’ quality of service. In the proposed MAB, RIS phase shifts represent the arms, and the sum rate represents the corresponding reward. Two MAB algorithms are utilized to select the suitable arm from the available space, namely, the $epsilon-$Greedy and the Decaying $epsilon-$Greedy. The simulation results prove that the adopted RIS with phase shift optimization can significantly improve the rate for all users compared to the traditional network.
{"title":"Multi-Armed Bandit based Capacity Enhancement Approach for Reconfigurable Intelligent Surface Assisted Multi-cell System.","authors":"Mariam Abdelrahman, Ahmed Nasser, Ahmed Magdy, M. Elsabrouty","doi":"10.1109/JAC-ECC56395.2022.10043873","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043873","url":null,"abstract":"In this paper, the capacity enhancement problem in multi-user networks is considered through the assistance of reconfigurable intelligent surfaces (RIS). RIS can manage the interference among cells by optimizing its phase and amplitude reflection coefficients, which is a non-convex problem. For an improved solution, we propose a Multi-armed Bandit (MAB) based technique to optimize the RIS phase shift for interference management while preserving users’ quality of service. In the proposed MAB, RIS phase shifts represent the arms, and the sum rate represents the corresponding reward. Two MAB algorithms are utilized to select the suitable arm from the available space, namely, the $epsilon-$Greedy and the Decaying $epsilon-$Greedy. The simulation results prove that the adopted RIS with phase shift optimization can significantly improve the rate for all users compared to the traditional network.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123908356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043907
Ahmed Magdy, Mostafa Khamis
Functional simulation is still the primary workhorse for verifying the correctness of hardware designs. Code coverage is a key contributor to any verification process, as it is strongly correlated to test-bench quality metering and effectiveness of the whole verification flow. It also measures the extent of design verification provided by a set of functional simulation vectors which should compute the statement execution counts (controllability information). Code coverage exclusion has always been associated with the verification process to have reasonable coverage results and for the purpose of debugging a particular segment of the design. Keeping tracing of the excluded parts along with the frequent editing has become a hurdle to a lot of designers. In this paper, we present a novel adaptive exclusion methodology based on source code annotation. This tool acts as a third-party tool that works side by side with any functional simulation tool. Furthermore, the reliability of the tool for any source modifications and its performance overhead were evaluated empirically through extensive simulations over very large industrial projects, showing that the average execution time overhead for 10 million lines of code project is on average 0.4% only.
{"title":"A CAD Tool of Adaptive Coverage Exclusions for Complex Industrial HDL Designs","authors":"Ahmed Magdy, Mostafa Khamis","doi":"10.1109/JAC-ECC56395.2022.10043907","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043907","url":null,"abstract":"Functional simulation is still the primary workhorse for verifying the correctness of hardware designs. Code coverage is a key contributor to any verification process, as it is strongly correlated to test-bench quality metering and effectiveness of the whole verification flow. It also measures the extent of design verification provided by a set of functional simulation vectors which should compute the statement execution counts (controllability information). Code coverage exclusion has always been associated with the verification process to have reasonable coverage results and for the purpose of debugging a particular segment of the design. Keeping tracing of the excluded parts along with the frequent editing has become a hurdle to a lot of designers. In this paper, we present a novel adaptive exclusion methodology based on source code annotation. This tool acts as a third-party tool that works side by side with any functional simulation tool. Furthermore, the reliability of the tool for any source modifications and its performance overhead were evaluated empirically through extensive simulations over very large industrial projects, showing that the average execution time overhead for 10 million lines of code project is on average 0.4% only.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125833558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043939
Hussein Abdeltawab
Combined Heat and Power (CHP) is an excellent method for maximizing the efficiency of a multicarrier energy system. Generated heat from a CHP can be used to supply a thermal load or storage. Since the CHP-generated heat depends on the generated electric power, some excessive heat may be wasted if storage is not a viable option. This work proposes a day-ahead energy management system (EMS) with redundant heat trading. The system contains Electric Vehicle (EV), Photovoltaic (PV), hot water tank storage, gas boiler, and Electric heater to meet the electric and thermal energy demands in a multicarrier energy system. To account for uncertainties, various scenarios for the electrical/thermal load, PV power, and temperature are considered. A Monte-Carlo-based two-level EMS is developed to calculate the required heat reserve to trade heat while accounting for all uncertainties. Simulation results show that the proposed EMS can predict the necessary reserve for guaranteeing reliable day-ahead heat commitment.
{"title":"Optimal Stochastic Dispatch of Combined Heat Power System with Guaranteed Heat Trading","authors":"Hussein Abdeltawab","doi":"10.1109/JAC-ECC56395.2022.10043939","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043939","url":null,"abstract":"Combined Heat and Power (CHP) is an excellent method for maximizing the efficiency of a multicarrier energy system. Generated heat from a CHP can be used to supply a thermal load or storage. Since the CHP-generated heat depends on the generated electric power, some excessive heat may be wasted if storage is not a viable option. This work proposes a day-ahead energy management system (EMS) with redundant heat trading. The system contains Electric Vehicle (EV), Photovoltaic (PV), hot water tank storage, gas boiler, and Electric heater to meet the electric and thermal energy demands in a multicarrier energy system. To account for uncertainties, various scenarios for the electrical/thermal load, PV power, and temperature are considered. A Monte-Carlo-based two-level EMS is developed to calculate the required heat reserve to trade heat while accounting for all uncertainties. Simulation results show that the proposed EMS can predict the necessary reserve for guaranteeing reliable day-ahead heat commitment.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134381874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-12-19DOI: 10.1109/JAC-ECC56395.2022.10043958
H. Atallah, R. Hussein, Adel B. Abdelrahman
In this paper, a triple band wireless power transfer (TB-WPT) system is presented using coupled spirals defected ground structures (Ss-DGSs) band stop filter (BSF). The simulated efficiencies are 98 %, 99 %, and 89 % at 0.26 GHz, 0.37 GHz, and 0.56 GHz, respectively. The suggested work has a size of 30×15mm2 with a transmission distance of 9 mm. Due to its compact size and satisfactory performance, the design can be useful for modern wireless communication technology.
{"title":"Design of a Triple Band Wireless Power Transfer (TB-WPT) system for Multiple Applications","authors":"H. Atallah, R. Hussein, Adel B. Abdelrahman","doi":"10.1109/JAC-ECC56395.2022.10043958","DOIUrl":"https://doi.org/10.1109/JAC-ECC56395.2022.10043958","url":null,"abstract":"In this paper, a triple band wireless power transfer (TB-WPT) system is presented using coupled spirals defected ground structures (Ss-DGSs) band stop filter (BSF). The simulated efficiencies are 98 %, 99 %, and 89 % at 0.26 GHz, 0.37 GHz, and 0.56 GHz, respectively. The suggested work has a size of 30×15mm2 with a transmission distance of 9 mm. Due to its compact size and satisfactory performance, the design can be useful for modern wireless communication technology.","PeriodicalId":326002,"journal":{"name":"2022 10th International Japan-Africa Conference on Electronics, Communications, and Computations (JAC-ECC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131654363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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