Pub Date : 2016-07-06DOI: 10.1109/CITS.2016.7546447
Amrit Kharel, Lei Cao
Decoding of Raptor codes consists of decoding of both the LT part and the precode part of the codes. When LT decoding is performed, a scenario may arise where the message passing-based decoding process is unable to provide non-zero log-likelihood ratio (LLR) updates to a fraction of input symbols even if it is mathematically possible to do so. The problem is even more critical for codes with short block-lengths and for smaller overheads. We show that this problem degrades the overall decoding performance of Raptor codes over binary input additive white Gaussian noise (BIAWGN) channel. To combat this problem, the Gauss-Jordan elimination (GJE) is used to assist decoding so that the decoder can continuously provide non-zero LLR updates to all the input symbols connected in the decoding graph. Through simulation results we show that the GJE-assisted method provides significantly better bit error rate (BER) performance of Raptor codes than the traditional method across a wide range of signal to noise ratio (SNR) and transmission overheads.
{"title":"Improved decoding for Raptor codes with short block-lengths over BIAWGN channel","authors":"Amrit Kharel, Lei Cao","doi":"10.1109/CITS.2016.7546447","DOIUrl":"https://doi.org/10.1109/CITS.2016.7546447","url":null,"abstract":"Decoding of Raptor codes consists of decoding of both the LT part and the precode part of the codes. When LT decoding is performed, a scenario may arise where the message passing-based decoding process is unable to provide non-zero log-likelihood ratio (LLR) updates to a fraction of input symbols even if it is mathematically possible to do so. The problem is even more critical for codes with short block-lengths and for smaller overheads. We show that this problem degrades the overall decoding performance of Raptor codes over binary input additive white Gaussian noise (BIAWGN) channel. To combat this problem, the Gauss-Jordan elimination (GJE) is used to assist decoding so that the decoder can continuously provide non-zero LLR updates to all the input symbols connected in the decoding graph. Through simulation results we show that the GJE-assisted method provides significantly better bit error rate (BER) performance of Raptor codes than the traditional method across a wide range of signal to noise ratio (SNR) and transmission overheads.","PeriodicalId":340958,"journal":{"name":"2016 International Conference on Computer, Information and Telecommunication Systems (CITS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127133715","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-07-06DOI: 10.1109/CITS.2016.7546388
Haibo Yu, Guoqiang Bai
Cofactorization, checking smoothness of mid-size integers, is usually adopted in General Number Field Sieve. In this paper, we present a specific cofactorization hardware implementation, which performs smoothness test for mid-size integers at a much higher throughput than previous works. The proposed design, based on highly-parallel and pipeline structure, can analysis a 125-bit integer and determine in less than 130 clock cycles whether it could factor completely over a factor base. Besides, the algorithm used in architecture can be performed by multiplication, addition and some logical operations only, which brings simple circuit structure, low hardware cost and short time delay. Moreover, the comparison results show that our architecture achieves a speedup of one or two orders of magnitude over implementation based on Elliptic Curve Method. Our design therefore can be a good solution to cofactorization.
{"title":"Specific hardware implementation for cofactorization in GNFS","authors":"Haibo Yu, Guoqiang Bai","doi":"10.1109/CITS.2016.7546388","DOIUrl":"https://doi.org/10.1109/CITS.2016.7546388","url":null,"abstract":"Cofactorization, checking smoothness of mid-size integers, is usually adopted in General Number Field Sieve. In this paper, we present a specific cofactorization hardware implementation, which performs smoothness test for mid-size integers at a much higher throughput than previous works. The proposed design, based on highly-parallel and pipeline structure, can analysis a 125-bit integer and determine in less than 130 clock cycles whether it could factor completely over a factor base. Besides, the algorithm used in architecture can be performed by multiplication, addition and some logical operations only, which brings simple circuit structure, low hardware cost and short time delay. Moreover, the comparison results show that our architecture achieves a speedup of one or two orders of magnitude over implementation based on Elliptic Curve Method. Our design therefore can be a good solution to cofactorization.","PeriodicalId":340958,"journal":{"name":"2016 International Conference on Computer, Information and Telecommunication Systems (CITS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126929804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-07-06DOI: 10.1109/CITS.2016.7546449
Yin Jia, Tingting Lin, Xuejia Lai
White box attack context assumes that attackers have full access to the implementation and dynamic execution of cryptographic algorithms. How to protect keys in such an attack context has become a new challenge to implementation of cryptographic algorithms. In 2002, Chow et al. proposed a white box AES implementation whose construction could also be applied to other iterated block ciphers. This implementation was later improved and attacked several times. However those attacks greatly depend on the structure of specific cipher and its implementation. We propose a generic attack against a typical white box implementation of iterated block ciphers with Chow's techniques, which can be applied to block ciphers of different structures. Our attack relies on the connection of input-output difference probability distribution between block ciphers and their white box implementation, and recovers the subkey efficiently.
{"title":"A generic attack against white box implementation of block ciphers","authors":"Yin Jia, Tingting Lin, Xuejia Lai","doi":"10.1109/CITS.2016.7546449","DOIUrl":"https://doi.org/10.1109/CITS.2016.7546449","url":null,"abstract":"White box attack context assumes that attackers have full access to the implementation and dynamic execution of cryptographic algorithms. How to protect keys in such an attack context has become a new challenge to implementation of cryptographic algorithms. In 2002, Chow et al. proposed a white box AES implementation whose construction could also be applied to other iterated block ciphers. This implementation was later improved and attacked several times. However those attacks greatly depend on the structure of specific cipher and its implementation. We propose a generic attack against a typical white box implementation of iterated block ciphers with Chow's techniques, which can be applied to block ciphers of different structures. Our attack relies on the connection of input-output difference probability distribution between block ciphers and their white box implementation, and recovers the subkey efficiently.","PeriodicalId":340958,"journal":{"name":"2016 International Conference on Computer, Information and Telecommunication Systems (CITS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126064773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-07-01DOI: 10.1109/CITS.2016.7546431
Wenjie Chen, Tong Li, Zhu Xiao, Dong Wang
Device-to-Device (D2D) communications and small cell networks, as promising technologies to improve spectral efficiency and system throughput for future cellular networks, have received increasing attentions. In this paper, we model D2D communications in the two-tier heterogeneous macro-small cell networks. We propose not only two novel resource sharing strategies for D2D users, namely dedicated resource sharing strategy and cross-tier resource sharing strategy, but theirs corresponding power control strategies as well. In order to minimize cross-tier interference for the two-tier cellular networks, we formulate the optimization problem of power control and channel allocation, as a convex optimization problem and a 0-1 assignment problem, respectively. The system-level simulations demonstrate that the proposed schemes significantly increase the throughput compared to cellular-only transmission. Simulation results also reveal the D2D communications can be regarded as an interference mitigation technology for the two-tier heterogeneous networks and present the high potential of D2D communications.
{"title":"On mitigating interference under device-to-device communication in macro-small cell networks","authors":"Wenjie Chen, Tong Li, Zhu Xiao, Dong Wang","doi":"10.1109/CITS.2016.7546431","DOIUrl":"https://doi.org/10.1109/CITS.2016.7546431","url":null,"abstract":"Device-to-Device (D2D) communications and small cell networks, as promising technologies to improve spectral efficiency and system throughput for future cellular networks, have received increasing attentions. In this paper, we model D2D communications in the two-tier heterogeneous macro-small cell networks. We propose not only two novel resource sharing strategies for D2D users, namely dedicated resource sharing strategy and cross-tier resource sharing strategy, but theirs corresponding power control strategies as well. In order to minimize cross-tier interference for the two-tier cellular networks, we formulate the optimization problem of power control and channel allocation, as a convex optimization problem and a 0-1 assignment problem, respectively. The system-level simulations demonstrate that the proposed schemes significantly increase the throughput compared to cellular-only transmission. Simulation results also reveal the D2D communications can be regarded as an interference mitigation technology for the two-tier heterogeneous networks and present the high potential of D2D communications.","PeriodicalId":340958,"journal":{"name":"2016 International Conference on Computer, Information and Telecommunication Systems (CITS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116838080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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