Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626967
A. Chowdhury
In an attempt to re-regulate the distribution segment of an electric power system, public utility commissions (PUCs) are increasingly adopting a reward/penalty framework in order to guarantee acceptable electric supply reliability. This reward/penalty framework is commonly known as performance based ratemaking (PBR). A PBR framework is introduced to provide distribution utilities with incentives for economic efficiency gains in the competitive generation and transmission markets. A distribution utility's historical reliability performance records could be utilized to create practical PBR mechanisms. This paper presents actual reliability performance history from two different Canadian utilities used to develop PBR frameworks for use in a re-regulated environment. An analysis of financial risk related to historic reliability data is presented by including reliability index probability distributions in a PBR plan. In addition, this paper identifies a number of factors and issues that should be considered in generating a PBR plan for a distribution utility. A brief analysis of cause contributions to reliability indices also is performed and presented in this paper. The historic reliability based PBR framework developed in this paper finds practical applications in the emerging deregulated electricity market
{"title":"Distribution system risk assessment based on historical reliability performance","authors":"A. Chowdhury","doi":"10.1109/EIT.2005.1626967","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626967","url":null,"abstract":"In an attempt to re-regulate the distribution segment of an electric power system, public utility commissions (PUCs) are increasingly adopting a reward/penalty framework in order to guarantee acceptable electric supply reliability. This reward/penalty framework is commonly known as performance based ratemaking (PBR). A PBR framework is introduced to provide distribution utilities with incentives for economic efficiency gains in the competitive generation and transmission markets. A distribution utility's historical reliability performance records could be utilized to create practical PBR mechanisms. This paper presents actual reliability performance history from two different Canadian utilities used to develop PBR frameworks for use in a re-regulated environment. An analysis of financial risk related to historic reliability data is presented by including reliability index probability distributions in a PBR plan. In addition, this paper identifies a number of factors and issues that should be considered in generating a PBR plan for a distribution utility. A brief analysis of cause contributions to reliability indices also is performed and presented in this paper. The historic reliability based PBR framework developed in this paper finds practical applications in the emerging deregulated electricity market","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131483719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626994
M. Ramkumar, N. Memon, R. Simha
We present an efficient, scalable, and renewable hierarchical random key predistribution (KPD) scheme as an enabler for a low complexity security infrastructure. As the proposed KPD scheme employs only symmetric cryptographic primitives it permits resource constrained nodes to take part in the deployment. Further, two nodes need to exchange only their IDs before they can establish a shared secret. The proposed KPD scheme provides scalable security for different levels of the hierarchy depending on available resources. In addition higher levels of the hierarchy are protected from security breaches in lower levels
{"title":"A hierarchical key pre-distribution scheme","authors":"M. Ramkumar, N. Memon, R. Simha","doi":"10.1109/EIT.2005.1626994","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626994","url":null,"abstract":"We present an efficient, scalable, and renewable hierarchical random key predistribution (KPD) scheme as an enabler for a low complexity security infrastructure. As the proposed KPD scheme employs only symmetric cryptographic primitives it permits resource constrained nodes to take part in the deployment. Further, two nodes need to exchange only their IDs before they can establish a shared secret. The proposed KPD scheme provides scalable security for different levels of the hierarchy depending on available resources. In addition higher levels of the hierarchy are protected from security breaches in lower levels","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131289070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626986
Z. Arnavut, F. Sahin
Palette images are widely used in World Wide Web (WWW) and game cartridges applications. Many image used in the WWW are stored and transmitted after they are compressed losslessly with the standard graphics interchange format (GIF), or portable network graphic (PNG). Well known two dimensional compression scheme; such as JPEG-LS and CALIC, fails to yield better compression than GIF or PNG, due to the fact that the pixel value represent indices that point to color values in a look-up table. The GIF standard uses Lempel-Ziv compression, which treats the image as a one-dimensional sequence of index values, ignoring two-dimensional nature. Bzip, another universal compressor, yields even better compression gain that the GIF, PNG, JPEG-LS, and CALIC. Variants of block sorting coders, such as Bzip2, utilize Burrows-Wheeler transformation (BWT) by Burrows M. and Wheeler D. J. (1994), followed by move-to-front (MTF) transformation by Bentley J. L. (1986), Elias, P (1987) before using a statistical coder at the final stage. In this paper, we show that the compression performance of block sorting coder can be improved almost 14% on average by utilizing inversion ranks instead of the move-to-front coding
调色板图像广泛用于万维网(WWW)和游戏卡带应用程序。万维网中使用的许多图像都是用标准图形交换格式(GIF)或便携式网络图形(PNG)进行无损压缩后存储和传输的。众所周知的二维压缩格式;如JPEG-LS和CALIC，不能产生比GIF或PNG更好的压缩，因为像素值表示指向查找表中颜色值的索引。GIF标准使用Lempel-Ziv压缩，它将图像视为索引值的一维序列，忽略二维性质。Bzip是另一种通用压缩器，比GIF、PNG、JPEG-LS和CALIC产生更好的压缩效果。块排序编码器的变体，如Bzip2，利用Burrows M.和Wheeler D. J.(1994)的Burrows-Wheeler变换(BWT)，然后是Bentley J. L. (1986)， Elias, P .(1987)的移动到前面(MTF)变换，然后在最后阶段使用统计编码器。在本文中，我们证明了块排序编码器的压缩性能可以通过使用倒排而不是移动到前面的编码平均提高近14%
{"title":"Inversion ranks for lossless compression of color palette images","authors":"Z. Arnavut, F. Sahin","doi":"10.1109/EIT.2005.1626986","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626986","url":null,"abstract":"Palette images are widely used in World Wide Web (WWW) and game cartridges applications. Many image used in the WWW are stored and transmitted after they are compressed losslessly with the standard graphics interchange format (GIF), or portable network graphic (PNG). Well known two dimensional compression scheme; such as JPEG-LS and CALIC, fails to yield better compression than GIF or PNG, due to the fact that the pixel value represent indices that point to color values in a look-up table. The GIF standard uses Lempel-Ziv compression, which treats the image as a one-dimensional sequence of index values, ignoring two-dimensional nature. Bzip, another universal compressor, yields even better compression gain that the GIF, PNG, JPEG-LS, and CALIC. Variants of block sorting coders, such as Bzip2, utilize Burrows-Wheeler transformation (BWT) by Burrows M. and Wheeler D. J. (1994), followed by move-to-front (MTF) transformation by Bentley J. L. (1986), Elias, P (1987) before using a statistical coder at the final stage. In this paper, we show that the compression performance of block sorting coder can be improved almost 14% on average by utilizing inversion ranks instead of the move-to-front coding","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123332589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1142/S0218126609005678
William R. Roberts, D. Velenis
Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of parameter variations on the timing characteristics of registers that determine the timing constraints are investigated in this paper. The sensitivity of the setup time and data propagation delay on parameter variations is demonstrated for three different register designs that represent different tradeoff choices between performance and power dissipation. The robustness of each register design under variations in power supply voltage, temperature, and gate oxide thickness is discussed
{"title":"Effects of parameter variations on timing characteristics of clocked registers","authors":"William R. Roberts, D. Velenis","doi":"10.1142/S0218126609005678","DOIUrl":"https://doi.org/10.1142/S0218126609005678","url":null,"abstract":"Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of parameter variations on the timing characteristics of registers that determine the timing constraints are investigated in this paper. The sensitivity of the setup time and data propagation delay on parameter variations is demonstrated for three different register designs that represent different tradeoff choices between performance and power dissipation. The robustness of each register design under variations in power supply voltage, temperature, and gate oxide thickness is discussed","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128648421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1627041
A. Evans, J. Sikorski, P. Thomas, Sung-Hyuk Cha, C. Tappert, Jie Zou, A. Gattani, G. Nagy
The distinctive aspect of the CAVIAR technology is a visible, parameterized geometrical model that serves as the human-computer communication channel. Evaluation of CAVIAR flower and face recognition systems shows that their accuracy is much higher than that of the machine alone; their recognition time is much lower than that of the human alone; they can be initialized with a single reference sample per class; and they improve with use. CAVIAR-flower has been ported to stand-alone and to wireless laptop-client personal digital assistants (PDAs)
{"title":"Computer assisted visual interactive recognition (CAVIAR) technology","authors":"A. Evans, J. Sikorski, P. Thomas, Sung-Hyuk Cha, C. Tappert, Jie Zou, A. Gattani, G. Nagy","doi":"10.1109/EIT.2005.1627041","DOIUrl":"https://doi.org/10.1109/EIT.2005.1627041","url":null,"abstract":"The distinctive aspect of the CAVIAR technology is a visible, parameterized geometrical model that serves as the human-computer communication channel. Evaluation of CAVIAR flower and face recognition systems shows that their accuracy is much higher than that of the machine alone; their recognition time is much lower than that of the human alone; they can be initialized with a single reference sample per class; and they improve with use. CAVIAR-flower has been ported to stand-alone and to wireless laptop-client personal digital assistants (PDAs)","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128966432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626969
S. Ramakrishnan, N. Nair, R. Clifford, S. Majumdar, S.C. Chan, Y. Li, P. Ramuhalli, L. Udpa, S. Udpa
This paper discusses a completely noninvasive technique to detect single leg separation in Bjork-Shiley convexo-concave (BSCC) heart valves. Prior studies have shown that the resonant frequencies of the valve depend on the condition of the strut. The technique described here uses electromagnetic methods to mechanically excite the valve across a range of frequencies of interest and determine the resonant frequency of the valve. Results obtained with a prototype setup are presented which demonstrate the usefulness of the technique in a clinical setting for detecting single leg separated (SLS) condition in patients with BSCC heart valves
{"title":"An electromagnetic acoustic transduction technique for detecting strut fractures in artificial heart valves","authors":"S. Ramakrishnan, N. Nair, R. Clifford, S. Majumdar, S.C. Chan, Y. Li, P. Ramuhalli, L. Udpa, S. Udpa","doi":"10.1109/EIT.2005.1626969","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626969","url":null,"abstract":"This paper discusses a completely noninvasive technique to detect single leg separation in Bjork-Shiley convexo-concave (BSCC) heart valves. Prior studies have shown that the resonant frequencies of the valve depend on the condition of the strut. The technique described here uses electromagnetic methods to mechanically excite the valve across a range of frequencies of interest and determine the resonant frequency of the valve. Results obtained with a prototype setup are presented which demonstrate the usefulness of the technique in a clinical setting for detecting single leg separated (SLS) condition in patients with BSCC heart valves","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"195 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124361673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626972
R. Gandhi, J. Shiffer, D. Gandhi, D. Velenis
Accurate estimation of circuit delay has become a primary requirement to ensure the correct synchronization of high speed synchronous integrated circuits. In this paper, the difference in circuit delay simulated using ramp and realistic signal waveforms is investigated. It is shown that the realistic signal waveform produces larger delay estimates than the ramp waveform. Ramp and realistic waveforms are also used to characterize circuit cells and acquire close delay approximations using static timing analysis. Finally, noise effects that introduce variations in circuit delay are considered. Variations in delay due to these effects are calculated using ramp and realistic signal waveforms
{"title":"Delay modeling using ramp and realistic signal waveforms","authors":"R. Gandhi, J. Shiffer, D. Gandhi, D. Velenis","doi":"10.1109/EIT.2005.1626972","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626972","url":null,"abstract":"Accurate estimation of circuit delay has become a primary requirement to ensure the correct synchronization of high speed synchronous integrated circuits. In this paper, the difference in circuit delay simulated using ramp and realistic signal waveforms is investigated. It is shown that the realistic signal waveform produces larger delay estimates than the ramp waveform. Ramp and realistic waveforms are also used to characterize circuit cells and acquire close delay approximations using static timing analysis. Finally, noise effects that introduce variations in circuit delay are considered. Variations in delay due to these effects are calculated using ramp and realistic signal waveforms","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124498835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1627038
A. Chalechale, F. Safaei, G. Naghdy, P. Premaratne
A new paradigm has been proposed for gesture selection and recognition. The paradigm is based on statistical classification, which has applications in telemedicine, virtual reality, computer games, and sign language studies. The aims of this paper are (1) how to select an appropriate set of gestures having a satisfactory level of discrimination power, and (2) comparison of invariant moments (conventional and Zernike) and geometric properties in recognizing hand gestures. Two-dimensional structures, namely cluster-property and cluster-features matrices, have been employed for gesture selection and to evaluate different gesture characteristics. Moment invariants, Zernike moments, and geometric features are employed for classification and recognition rates are compared. Comparative results confirm better performance of the geometric features
{"title":"Hand gesture selection and recognition for visual-based human-machine interface","authors":"A. Chalechale, F. Safaei, G. Naghdy, P. Premaratne","doi":"10.1109/EIT.2005.1627038","DOIUrl":"https://doi.org/10.1109/EIT.2005.1627038","url":null,"abstract":"A new paradigm has been proposed for gesture selection and recognition. The paradigm is based on statistical classification, which has applications in telemedicine, virtual reality, computer games, and sign language studies. The aims of this paper are (1) how to select an appropriate set of gestures having a satisfactory level of discrimination power, and (2) comparison of invariant moments (conventional and Zernike) and geometric properties in recognizing hand gestures. Two-dimensional structures, namely cluster-property and cluster-features matrices, have been employed for gesture selection and to evaluate different gesture characteristics. Moment invariants, Zernike moments, and geometric features are employed for classification and recognition rates are compared. Comparative results confirm better performance of the geometric features","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122378866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1627055
Jinwen Xi, Zhaohui Huang, Peixin Zhong
System-on-chip (SoC) is increasingly adopted in VLSI world with the advancing silicon technologies. Integrating multiple functional IPs (intellectual property) onto a single die increases performance and saves power consumption by reducing interconnecting capacitance among these IPs. Embedded microprocessor acts as the central controlling unit of many SoCs to orchestrate all the other IPs to work harmoniously. Low and predictable energy consumption is often required for these systems. This paper proposes an empirical macro-modeling methodology allowing energy modeling at the system level. High-level macro-operations are characterized for energy consumption. This modeling framework is implemented for a MIPS-family microprocessor using SystemC, a system-level modeling and simulation environment. Using the JPEG encoder application as case study, a simulation speed-up of more than 200 times with the relative error of -6.70% on energy estimation is achieved compared to instruction-level simulators. Meanwhile, this model provides support to multiprocessor energy modeling, which is unavailable currently in the instruction-level energy simulators
{"title":"Energy macro-modeling of embedded microprocessor using SystemC","authors":"Jinwen Xi, Zhaohui Huang, Peixin Zhong","doi":"10.1109/EIT.2005.1627055","DOIUrl":"https://doi.org/10.1109/EIT.2005.1627055","url":null,"abstract":"System-on-chip (SoC) is increasingly adopted in VLSI world with the advancing silicon technologies. Integrating multiple functional IPs (intellectual property) onto a single die increases performance and saves power consumption by reducing interconnecting capacitance among these IPs. Embedded microprocessor acts as the central controlling unit of many SoCs to orchestrate all the other IPs to work harmoniously. Low and predictable energy consumption is often required for these systems. This paper proposes an empirical macro-modeling methodology allowing energy modeling at the system level. High-level macro-operations are characterized for energy consumption. This modeling framework is implemented for a MIPS-family microprocessor using SystemC, a system-level modeling and simulation environment. Using the JPEG encoder application as case study, a simulation speed-up of more than 200 times with the relative error of -6.70% on energy estimation is achieved compared to instruction-level simulators. Meanwhile, this model provides support to multiprocessor energy modeling, which is unavailable currently in the instruction-level energy simulators","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"2020 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114073608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-05-22DOI: 10.1109/EIT.2005.1626966
A. Chowdhury
The Alberta Interconnected System (AIS) forms a single integrated transmission network serving the province of Alberta. ATCO Electric Limited, formerly Alberta Power Limited (APL), who owns and operates a portion of this system, has traditionally relied on implicit criteria for evaluating system reliability performance and the need for system enhancements. Since 1990, however, increasing emphasize is being placed on value-based probabilistic assessments that attempt to quantify the risk of system disturbances, as well as the cost and the benefit of system enhancement projects. A case study is presented in this paper in which a new value-based Monte Carlo simulation approach is utilized to compute popular customer oriented reliability indices for a local area supplied by the main Alberta provincial grid
阿尔伯塔互联系统(AIS)形成了一个单一的综合传输网络，服务于阿尔伯塔省。ATCO Electric Limited(前身为Alberta Power Limited (APL))拥有并运营该系统的一部分，传统上依赖于评估系统可靠性性能和系统增强需求的隐式标准。然而，自1990年以来，越来越多的重点放在基于价值的概率评估上，这种评估试图量化系统干扰的风险，以及系统增强项目的成本和收益。本文提出了一种新的基于值的蒙特卡罗模拟方法，用于计算由阿尔伯塔省主电网供电的局部地区的流行的面向客户的可靠性指标
{"title":"A Monte Carlo simulation model for reliability evaluation of transmission systems","authors":"A. Chowdhury","doi":"10.1109/EIT.2005.1626966","DOIUrl":"https://doi.org/10.1109/EIT.2005.1626966","url":null,"abstract":"The Alberta Interconnected System (AIS) forms a single integrated transmission network serving the province of Alberta. ATCO Electric Limited, formerly Alberta Power Limited (APL), who owns and operates a portion of this system, has traditionally relied on implicit criteria for evaluating system reliability performance and the need for system enhancements. Since 1990, however, increasing emphasize is being placed on value-based probabilistic assessments that attempt to quantify the risk of system disturbances, as well as the cost and the benefit of system enhancement projects. A case study is presented in this paper in which a new value-based Monte Carlo simulation approach is utilized to compute popular customer oriented reliability indices for a local area supplied by the main Alberta provincial grid","PeriodicalId":358002,"journal":{"name":"2005 IEEE International Conference on Electro Information Technology","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121507414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：