{"title":"Data Refinement for Synchronous System Specification and Construction","authors":"Alex Tsow, S. Johnson","doi":"10.1007/11560548_40","DOIUrl":"https://doi.org/10.1007/11560548_40","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121624924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_12
R. Sebastiani, Stefano Tonetta
{"title":"\"More Deterministic\" vs. \"Smaller\" Büchi Automata for Efficient LTL Model Checking","authors":"R. Sebastiani, Stefano Tonetta","doi":"10.1007/978-3-540-39724-3_12","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_12","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122393463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_9
Yue Yang, G. Gopalakrishnan, G. Lindstrom, Konrad Slind
{"title":"Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT","authors":"Yue Yang, G. Gopalakrishnan, G. Lindstrom, Konrad Slind","doi":"10.1007/978-3-540-39724-3_9","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_9","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116852454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_14
G. A. Sammane, D. Toma, J. Schmaltz, P. Ostier, D. Borrione
{"title":"Constrained Symbolic Simulation with Mathematica and ACL2","authors":"G. A. Sammane, D. Toma, J. Schmaltz, P. Ostier, D. Borrione","doi":"10.1007/978-3-540-39724-3_14","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_14","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129135546","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_10
Sankar Gurumurthy, O. Kupferman, F. Somenzi, Moshe Y. Vardi
{"title":"On Complementing Nondeterministic Büchi Automata","authors":"Sankar Gurumurthy, O. Kupferman, F. Somenzi, Moshe Y. Vardi","doi":"10.1007/978-3-540-39724-3_10","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_10","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"285 S8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113958851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_3
D. Geist
{"title":"The PSL/Sugar Specification Language A Language for all Seasons","authors":"D. Geist","doi":"10.1007/978-3-540-39724-3_3","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_3","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122261739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_7
S. Beyer, C. Jacobi, D. Kroening, Dirk Leinenbach, W. Paul
{"title":"Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP","authors":"S. Beyer, C. Jacobi, D. Kroening, Dirk Leinenbach, W. Paul","doi":"10.1007/978-3-540-39724-3_7","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_7","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123919921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_34
G. D. Penna, B. Intrigila, I. Melatti, E. Tronci, M. V. Zilli
{"title":"Finite Horizon Analysis of Markov Chains with the Mur-phi Verifier","authors":"G. D. Penna, B. Intrigila, I. Melatti, E. Tronci, M. V. Zilli","doi":"10.1007/978-3-540-39724-3_34","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_34","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115493134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_15
Husam Abu-Haimed, S. Berezin, D. Dill
{"title":"Semi-formal Verification of Memory Systems by Symbolic Simulation","authors":"Husam Abu-Haimed, S. Berezin, D. Dill","doi":"10.1007/978-3-540-39724-3_15","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_15","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116654438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-10-21DOI: 10.1007/978-3-540-39724-3_33
E. Pastor, M. A. Peña
{"title":"Efficient Hybrid Reachability Analysis for Asynchronous Concurrent Systems","authors":"E. Pastor, M. A. Peña","doi":"10.1007/978-3-540-39724-3_33","DOIUrl":"https://doi.org/10.1007/978-3-540-39724-3_33","url":null,"abstract":"","PeriodicalId":363695,"journal":{"name":"Conference on Correct Hardware Design and Verification Methods","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114677770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：