Multi-core architectures have been adopted in various computing environments. Predictions based on Moore's Law state that thousands of cores can be integrated on a single chip within 10 years. To achieve better performance and scalability on multi-cores, applications should be multi-threaded, and therefore threads assigned on different cores can execute concurrently. However, lock contention in kernels can affect the scalability so significantly that the speedup decreases with the increasing number of cores (thrashing). Existing efforts to address this problem mainly focus on deferring lock thrashing, and therefore these techniques cannot prevent thrashing fundamentally. In this paper, we propose to use lock-aware scheduling to avoid thrashing. Our method detects thrashing on a per-thread basis and migrates contended threads to a smaller set of cores. The optimal number of cores is determined by maximizing the proposed normalized throughput model of migrated threads. The proposed method is implemented in Linux 2.6.29.4 and evaluated on a 32-core system. Experimental results on a series of lock-intensive micro- and macro-benchmarks show the effectiveness: for 3 of 5 workloads exhibiting thrashing behaviour, lock-aware scheduling can detect the speedup decrease accurately and sustain the maximal speedup, for the remaining 2 workloads, the performance can be improved greatly although the maximal speedup is not sustained, for 1 workload which does not suffer thrashing, the method introduces negligible runtime overhead.
{"title":"A Scheduling Method for Avoiding Kernel Lock Thrashing on Multi-cores","authors":"Yan Cui, Weida Zhang, Yu Chen, Yuanchun Shi","doi":"10.1109/ICPADS.2010.31","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.31","url":null,"abstract":"Multi-core architectures have been adopted in various computing environments. Predictions based on Moore's Law state that thousands of cores can be integrated on a single chip within 10 years. To achieve better performance and scalability on multi-cores, applications should be multi-threaded, and therefore threads assigned on different cores can execute concurrently. However, lock contention in kernels can affect the scalability so significantly that the speedup decreases with the increasing number of cores (thrashing). Existing efforts to address this problem mainly focus on deferring lock thrashing, and therefore these techniques cannot prevent thrashing fundamentally. In this paper, we propose to use lock-aware scheduling to avoid thrashing. Our method detects thrashing on a per-thread basis and migrates contended threads to a smaller set of cores. The optimal number of cores is determined by maximizing the proposed normalized throughput model of migrated threads. The proposed method is implemented in Linux 2.6.29.4 and evaluated on a 32-core system. Experimental results on a series of lock-intensive micro- and macro-benchmarks show the effectiveness: for 3 of 5 workloads exhibiting thrashing behaviour, lock-aware scheduling can detect the speedup decrease accurately and sustain the maximal speedup, for the remaining 2 workloads, the performance can be improved greatly although the maximal speedup is not sustained, for 1 workload which does not suffer thrashing, the method introduces negligible runtime overhead.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130098507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper deals with the problem of mapping pipelined applications on heterogeneous platforms whose processors are subject to failures. We address a difficult bi-criteria problem, namely deciding which stages to replicate, and on which resources, in order to optimize the reliability of the schedule, while guaranteeing a minimal throughput. Previous work had addressed the complexity of interval mappings, where the application is partitioned into intervals of consecutive stages (which are then replicated and assigned to processors). In this paper we investigate general mappings, where stages may be partitioned without any constraint, thereby allowing a better usage of processors and communication network capabilities. The price to pay for general mappings is a dramatic increase in the problem complexity. We show that computing the period of a given general mapping is an NP-complete problem, and we provide polynomial bounds to determine a (conservative) approximated value. The bi-criteria mapping problem itself becomes NP-complete on homogeneous platforms, while it is polynomial with interval mappings. We design a set of efficient heuristics, which we compare with interval mapping strategies through extensive simulations.
{"title":"General vs. Interval Mappings for Streaming Applications","authors":"A. Benoit, Hinde-Lilia Bouziane, Y. Robert","doi":"10.1109/ICPADS.2010.15","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.15","url":null,"abstract":"This paper deals with the problem of mapping pipelined applications on heterogeneous platforms whose processors are subject to failures. We address a difficult bi-criteria problem, namely deciding which stages to replicate, and on which resources, in order to optimize the reliability of the schedule, while guaranteeing a minimal throughput. Previous work had addressed the complexity of interval mappings, where the application is partitioned into intervals of consecutive stages (which are then replicated and assigned to processors). In this paper we investigate general mappings, where stages may be partitioned without any constraint, thereby allowing a better usage of processors and communication network capabilities. The price to pay for general mappings is a dramatic increase in the problem complexity. We show that computing the period of a given general mapping is an NP-complete problem, and we provide polynomial bounds to determine a (conservative) approximated value. The bi-criteria mapping problem itself becomes NP-complete on homogeneous platforms, while it is polynomial with interval mappings. We design a set of efficient heuristics, which we compare with interval mapping strategies through extensive simulations.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129735917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
It is hard to execute parallel program efficiently on man-core platform because we could not divide program into appropriate granularity executed simultaneously. Based on virtual machine and binary translation technologies the article proposes the vapor profiling framework that uses SBIRP instruction in-place replacement method to collect program’s run-time control flow and data flow information precisely. Moreover, it explains how to create control flow and data flow dependency graphs. Experiment results prove that vapor has better performance than traditional methods.
{"title":"Vapor: Virtual Machine Based Parallel Program Profiling Framework","authors":"Yusong Tan, Wei Chen, Q. Wu","doi":"10.1109/ICPADS.2010.59","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.59","url":null,"abstract":"It is hard to execute parallel program efficiently on man-core platform because we could not divide program into appropriate granularity executed simultaneously. Based on virtual machine and binary translation technologies the article proposes the vapor profiling framework that uses SBIRP instruction in-place replacement method to collect program’s run-time control flow and data flow information precisely. Moreover, it explains how to create control flow and data flow dependency graphs. Experiment results prove that vapor has better performance than traditional methods.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129819497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In the optimizing work of parallel program, especially in the realm of massively parallel computing, the parallel computing time and space must be concurrently carefully considered to cut down the computing time as much as possible, because lots of poor parallel space strategies would impact negative effects on computing time. Although, sometimes we have no choice but to sacrifice the space for the time’s further diminishing. What relationship should the computing time and space to keep and how are they going on are two problems, which deciding our optimizing direction directly and must be clear in parallel optimizing. This paper proposes a space theory, named as space speedup, to denote the scalability of memory requirement, and discusses the relationship of time speedup and space speedup, through which the speedups’ guidance capacity in optimizing parallel codes are given.
{"title":"Space Speedup and Its Relationship with Time Speedup","authors":"Yue Hu, W. Tong, Xiaoli Zhi, Zhi-xun Gong","doi":"10.1109/ICPADS.2010.68","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.68","url":null,"abstract":"In the optimizing work of parallel program, especially in the realm of massively parallel computing, the parallel computing time and space must be concurrently carefully considered to cut down the computing time as much as possible, because lots of poor parallel space strategies would impact negative effects on computing time. Although, sometimes we have no choice but to sacrifice the space for the time’s further diminishing. What relationship should the computing time and space to keep and how are they going on are two problems, which deciding our optimizing direction directly and must be clear in parallel optimizing. This paper proposes a space theory, named as space speedup, to denote the scalability of memory requirement, and discusses the relationship of time speedup and space speedup, through which the speedups’ guidance capacity in optimizing parallel codes are given.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129274622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We study the dynamic bid optimization problem via a primal dual approach. In the case we have no information about the distribution of queries, we reconstruct the ln(U=L) + 1 competitive algorithm proposed in [ZCL08] through a systematic way and showed the intuition behind this algorithm. In the case of random permutation model, we showed that the learning technique used in [DH09] can give us a (1 ¡ O(²)) competitive algorithm for any small constant ² > 0 as long as the optimum is large enough.
{"title":"A Primal Dual Approach for Dynamic Bid Optimization","authors":"Lingfei Yu, Kun She, Changyuan Yu","doi":"10.1109/ICPADS.2010.75","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.75","url":null,"abstract":"We study the dynamic bid optimization problem via a primal dual approach. In the case we have no information about the distribution of queries, we reconstruct the ln(U=L) + 1 competitive algorithm proposed in [ZCL08] through a systematic way and showed the intuition behind this algorithm. In the case of random permutation model, we showed that the learning technique used in [DH09] can give us a (1 ¡ O(²)) competitive algorithm for any small constant ² > 0 as long as the optimum is large enough.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123932050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper proposes a novel platform for object locating application in the Internet of Things environment. In this platform, objects and inquirers access and query locations using uniform service entry interfaces in heterogeneous services. To build a virtual storage system, services entries integrate enterprise database clusters and a DHT peer-to-peer network built with inquirers’ devices. The DHT network is originally designed for accurate object locating, to enable fuzzy object locating we construct a hierarchical storage overlay network based on the DHT network. This LBS platform simplifies the object locating operation for ordinary inquirers greatly, moreover it provides huge virtual computing and storage resources for small companies and individual developers.
{"title":"A General Distributed Object Locating Architecture in the Internet of Things","authors":"Wenmao Liu, Lihua Yin, Weizhe Zhang, Hongli Zhang","doi":"10.1109/ICPADS.2010.30","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.30","url":null,"abstract":"This paper proposes a novel platform for object locating application in the Internet of Things environment. In this platform, objects and inquirers access and query locations using uniform service entry interfaces in heterogeneous services. To build a virtual storage system, services entries integrate enterprise database clusters and a DHT peer-to-peer network built with inquirers’ devices. The DHT network is originally designed for accurate object locating, to enable fuzzy object locating we construct a hierarchical storage overlay network based on the DHT network. This LBS platform simplifies the object locating operation for ordinary inquirers greatly, moreover it provides huge virtual computing and storage resources for small companies and individual developers.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128993889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wireless sensor networks (WSNs) have received considerable attention in recent years as they have great potential for many distributed applications in different scenarios. Whatever the scenario, WSNs are actually connected to an external network, through which sensed information are passed to the Internet and control messages can reach the WSN. This paper presents Smart, a service model for integrating WSNs and the Internet at service level. Instead of integrating protocol stacks and/or mapping logical addresses, Smart allows the integration of Internet's and WSN's services by providing service interoperability. A communication infrastructure that implements the main components of Smart, along with a power consumption evaluation, is presented to validate the model.
{"title":"Smart: Service Model for Integrating Wireless Sensor Networks and the Internet","authors":"Jeisa P. O. Domingues, A. Dâmaso, N. Rosa","doi":"10.1109/ICPADS.2010.92","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.92","url":null,"abstract":"Wireless sensor networks (WSNs) have received considerable attention in recent years as they have great potential for many distributed applications in different scenarios. Whatever the scenario, WSNs are actually connected to an external network, through which sensed information are passed to the Internet and control messages can reach the WSN. This paper presents Smart, a service model for integrating WSNs and the Internet at service level. Instead of integrating protocol stacks and/or mapping logical addresses, Smart allows the integration of Internet's and WSN's services by providing service interoperability. A communication infrastructure that implements the main components of Smart, along with a power consumption evaluation, is presented to validate the model.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128049056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Counting or estimating the number of tags is crucial for RFID system. Researchers have proposed several fast cardinality estimation schemes to estimate the quantity of a batch of tags within a short time frame. Existing estimation schemes scarcely consider the privacy issue. Without effective protection, the adversary can utilize the responding signals to estimate the number of tags as accurate as the valid reader. To address this issue, we propose a novel privacy-preserving estimation scheme, termed as MEAS, which provides an active RF countermeasure against the estimation from invalid readers. MEAS comprises of two components, an Estimation Interference Device (EID) and two well-designed Interference Blanking Estimators (IBE). EID is deployed with the tags to actively generate interfering signals, which introduce sufficiently large estimation errors to invalid or malicious readers. Using a secret interference factor shared with EID, a valid reader can perform accurate estimation via two IBEs. Our theoretical analysis and simulation results show the effectiveness of MEAS. Meanwhile, MEAS can also maintain a high estimation accuracy using IBEs.
{"title":"Utilizing RF Interference to Enable Private Estimation in RFID Systems","authors":"Lei Yang, Jinsong Han, Yong Qi, Cheng Wang, Zhuo Li, Qingsong Yao, Ying Chen, Xiao Zhong","doi":"10.1109/ICPADS.2010.106","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.106","url":null,"abstract":"Counting or estimating the number of tags is crucial for RFID system. Researchers have proposed several fast cardinality estimation schemes to estimate the quantity of a batch of tags within a short time frame. Existing estimation schemes scarcely consider the privacy issue. Without effective protection, the adversary can utilize the responding signals to estimate the number of tags as accurate as the valid reader. To address this issue, we propose a novel privacy-preserving estimation scheme, termed as MEAS, which provides an active RF countermeasure against the estimation from invalid readers. MEAS comprises of two components, an Estimation Interference Device (EID) and two well-designed Interference Blanking Estimators (IBE). EID is deployed with the tags to actively generate interfering signals, which introduce sufficiently large estimation errors to invalid or malicious readers. Using a secret interference factor shared with EID, a valid reader can perform accurate estimation via two IBEs. Our theoretical analysis and simulation results show the effectiveness of MEAS. Meanwhile, MEAS can also maintain a high estimation accuracy using IBEs.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116367967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Di Wu, Tianji Wu, Yi Shan, Yu Wang, Yong He, Ningyi Xu, Huazhong Yang
The research on complex Brain Networks plays a vital role in understanding the connectivity patterns of the human brain and disease-related alterations. Recent studies have suggested a noninvasive way to model and analyze human brain networks by using multi-modal imaging and graph theoretical approaches. Both the construction and analysis of the Brain Networks require tremendous computation. As a result, most current studies of the Brain Networks are focused on a coarse scale based on Brain Regions. Networks on this scale usually consist around 100 nodes. The more accurate and meticulous voxel-base Brain Networks, on the other hand, may consist 20K to 100K nodes. In response to the difficulties of analyzing large-scale networks, we propose an acceleration framework for voxel-base Brain Network Analysis based on Graphics Processing Unit (GPU). Our GPU implementations of Brain Network construction and modularity achieve 24x and 80x speedup respectively, compared with single-core CPU. Our work makes the processing time affordable to analyze multiple large-scale Brain Networks.
{"title":"Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis","authors":"Di Wu, Tianji Wu, Yi Shan, Yu Wang, Yong He, Ningyi Xu, Huazhong Yang","doi":"10.1109/ICPADS.2010.105","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.105","url":null,"abstract":"The research on complex Brain Networks plays a vital role in understanding the connectivity patterns of the human brain and disease-related alterations. Recent studies have suggested a noninvasive way to model and analyze human brain networks by using multi-modal imaging and graph theoretical approaches. Both the construction and analysis of the Brain Networks require tremendous computation. As a result, most current studies of the Brain Networks are focused on a coarse scale based on Brain Regions. Networks on this scale usually consist around 100 nodes. The more accurate and meticulous voxel-base Brain Networks, on the other hand, may consist 20K to 100K nodes. In response to the difficulties of analyzing large-scale networks, we propose an acceleration framework for voxel-base Brain Network Analysis based on Graphics Processing Unit (GPU). Our GPU implementations of Brain Network construction and modularity achieve 24x and 80x speedup respectively, compared with single-core CPU. Our work makes the processing time affordable to analyze multiple large-scale Brain Networks.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127715986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The development of web has brought rich applications and services, giving users convenience, but also causing that the user’s information is locked and isolated, the users’ resource are disperse, and the operation granularity is not uniform, which ultimately harm the end-users. This paper presents PGOS,Personal Grid Operation System, a general-purpose software for controlled sharing of cross-domain resources in personal net computing [1]. It accesses disperse resources uniformly from web client in order to connect the information islands formed by the companies, and it provides uniform fine-grained sharing mechanism, in addition, we can build new applications by combining the integrated resources in PGOS. The article proposes PGOS Core to complete decentralized user authentication, authorization and access control, Funnel is used to abstract the resource and make decentralized resource discovery, simultaneously PGSML, the Personal Grid Service Markup Language, is put forward to construct PGOS applications.
{"title":"PGOS: An Architecture of a Personal Net Computing Platform","authors":"Jie Liu, Yongqiang Zou","doi":"10.1109/ICPADS.2010.50","DOIUrl":"https://doi.org/10.1109/ICPADS.2010.50","url":null,"abstract":"The development of web has brought rich applications and services, giving users convenience, but also causing that the user’s information is locked and isolated, the users’ resource are disperse, and the operation granularity is not uniform, which ultimately harm the end-users. This paper presents PGOS,Personal Grid Operation System, a general-purpose software for controlled sharing of cross-domain resources in personal net computing [1]. It accesses disperse resources uniformly from web client in order to connect the information islands formed by the companies, and it provides uniform fine-grained sharing mechanism, in addition, we can build new applications by combining the integrated resources in PGOS. The article proposes PGOS Core to complete decentralized user authentication, authorization and access control, Funnel is used to abstract the resource and make decentralized resource discovery, simultaneously PGSML, the Personal Grid Service Markup Language, is put forward to construct PGOS applications.","PeriodicalId":365914,"journal":{"name":"2010 IEEE 16th International Conference on Parallel and Distributed Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115750166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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