Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766411
Mohammad T. Haweel, T. I. Haweel
Two-dimensional discrete orthogonal transforms (2-D DOT) are widely used in many communications and signal processing applications. This paper presents and analyses the general relation between such transforms and the 2-D LMS adaptive algorithm. It is shown that, by proper choice of the adaptation constant, the 2-D LMS provides an exact estimate to the forward as well as backward transform coefficients employing any set of 2-D DOT. The 2-D LMS DOT is modular and allows concurrent computation for the transform coefficients and therefore has the potential for fast parallel computations and VLSI implementation. An efficient 2-D threshold LMS DOT algorithm that is robust against impulsive noise is also presented. The efficiency of the 2-D LMS DOT against roundoff errors is demonstrated. Simulation experiments are conducted to justify the analysis and algorithms introduced.
{"title":"Adaptive LMS discrete 2-D orthogonal transforms","authors":"Mohammad T. Haweel, T. I. Haweel","doi":"10.1109/JEC-ECC.2013.6766411","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766411","url":null,"abstract":"Two-dimensional discrete orthogonal transforms (2-D DOT) are widely used in many communications and signal processing applications. This paper presents and analyses the general relation between such transforms and the 2-D LMS adaptive algorithm. It is shown that, by proper choice of the adaptation constant, the 2-D LMS provides an exact estimate to the forward as well as backward transform coefficients employing any set of 2-D DOT. The 2-D LMS DOT is modular and allows concurrent computation for the transform coefficients and therefore has the potential for fast parallel computations and VLSI implementation. An efficient 2-D threshold LMS DOT algorithm that is robust against impulsive noise is also presented. The efficiency of the 2-D LMS DOT against roundoff errors is demonstrated. Simulation experiments are conducted to justify the analysis and algorithms introduced.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"304 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116268575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766391
Hassan A. Youness, A. Omar, M. Moness
Fault tolerant scheduling has been a subject of great concern recently, considering heterogeneous multiprocessor systems that may contain low reliability processors in their systems. Task replication is an established technique to achieve fault tolerance; however it has a negative influence on schedule length. Moreover increasing system reliability always has a negative impact on schedule length. In this paper we devised a new method for optimizing schedule length and maximizing system reliability simultaneously using simulated annealing. Schedule length is investigated in case of fault free operation and in the presence of a processor fault and then the schedule length is averaged based on the probability of the schedule success and failure, then this average schedule length is optimized to the minimum to give the lowest possible makespan in both cases. Results show that our algorithm is able to maximize the system reliability without degrading schedule length, in fact increasing system reliability decrease the averaged schedule length and hence the system overall performance in all cases.
{"title":"Fault tolerant heterogeneous MPSOC schedule length minimization based on platform reliability","authors":"Hassan A. Youness, A. Omar, M. Moness","doi":"10.1109/JEC-ECC.2013.6766391","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766391","url":null,"abstract":"Fault tolerant scheduling has been a subject of great concern recently, considering heterogeneous multiprocessor systems that may contain low reliability processors in their systems. Task replication is an established technique to achieve fault tolerance; however it has a negative influence on schedule length. Moreover increasing system reliability always has a negative impact on schedule length. In this paper we devised a new method for optimizing schedule length and maximizing system reliability simultaneously using simulated annealing. Schedule length is investigated in case of fault free operation and in the presence of a processor fault and then the schedule length is averaged based on the probability of the schedule success and failure, then this average schedule length is optimized to the minimum to give the lowest possible makespan in both cases. Results show that our algorithm is able to maximize the system reliability without degrading schedule length, in fact increasing system reliability decrease the averaged schedule length and hence the system overall performance in all cases.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124158966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766384
A. El-Sayed, M. Ghoneima, M. Mahmoud
This paper presents a behavioral model for the ring gyroscope, taking into consideration the effects due to nonlinearity of actuation electrodes. Closed-form expressions for the nonlinear electrostatic force due to any actuation electrode are obtained, and are used as exciting force for the mechanical part of the gyroscope, which is usually modeled as a set of mass-spring-damper systems representing each mode. Nonlinearity of detection electrodes as well as Brownian noise are modeled too. Numerical solution for the equations of motion was done using Simulink to verify the model. The evolution of vibration induced errors due to nonlinearity of actuation and detection electrodes is explained in details. The model helps quantify some important parameters and limitations for the ring gyroscope.
{"title":"Modeling of nonlinearities in vibratory ring gyroscopes","authors":"A. El-Sayed, M. Ghoneima, M. Mahmoud","doi":"10.1109/JEC-ECC.2013.6766384","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766384","url":null,"abstract":"This paper presents a behavioral model for the ring gyroscope, taking into consideration the effects due to nonlinearity of actuation electrodes. Closed-form expressions for the nonlinear electrostatic force due to any actuation electrode are obtained, and are used as exciting force for the mechanical part of the gyroscope, which is usually modeled as a set of mass-spring-damper systems representing each mode. Nonlinearity of detection electrodes as well as Brownian noise are modeled too. Numerical solution for the equations of motion was done using Simulink to verify the model. The evolution of vibration induced errors due to nonlinearity of actuation and detection electrodes is explained in details. The model helps quantify some important parameters and limitations for the ring gyroscope.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124977974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766383
S. Sharroush
There is no doubt that the analog-to-digital (A/D) and digital-to-analog (D/A) converters are two of the most important analog integrated circuits in almost all of the applications. However, several types of D/A converters employ resistors which consume a relatively large silicon area in addition to their poor tolerance. In this paper, an-all-NMOS-transistors D/A converter that depends on charging a capacitor to a voltage that is proportional to the decimal equivalent of the input bits is proposed. This technique can be extended to any number of input bits and will be simulated for the 0.13 μm CMOS technology with VDD = 1.2 V. The choice of the aspect ratios of the employed NMOS transistors will be investigated quantitatively.
{"title":"An all-NMOS-transistors digital-to-analog converter","authors":"S. Sharroush","doi":"10.1109/JEC-ECC.2013.6766383","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766383","url":null,"abstract":"There is no doubt that the analog-to-digital (A/D) and digital-to-analog (D/A) converters are two of the most important analog integrated circuits in almost all of the applications. However, several types of D/A converters employ resistors which consume a relatively large silicon area in addition to their poor tolerance. In this paper, an-all-NMOS-transistors D/A converter that depends on charging a capacitor to a voltage that is proportional to the decimal equivalent of the input bits is proposed. This technique can be extended to any number of input bits and will be simulated for the 0.13 μm CMOS technology with VDD = 1.2 V. The choice of the aspect ratios of the employed NMOS transistors will be investigated quantitatively.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133185769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766398
A. Ghattas, E. Khaled
A proximity feed ultra-wide band (UWB) patch antenna with four notched bands is presented. The proposed antenna introduces UWB performance in the frequency range of 1.9 GHz to 10.3 GHz with omnidirectional radiation pattern. Slots etching techniques are utilized to provide four notched bands at frequencies of 2.3, 2.8, 3.5, and 5.5 GHz to avoid the interference with the wireless networks which occupy bands at these frequencies. The analysis and design of the proposed antenna were carried out using the commercially available Ansoft high frequency structure simulator (HFSS). The antenna is fabricated and tested. The measured data of the fabricated antenna demonstrate very good agreement with the simulated results.
{"title":"A proximity-fed ultra-wide band patch antenna with four frequency-band notches","authors":"A. Ghattas, E. Khaled","doi":"10.1109/JEC-ECC.2013.6766398","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766398","url":null,"abstract":"A proximity feed ultra-wide band (UWB) patch antenna with four notched bands is presented. The proposed antenna introduces UWB performance in the frequency range of 1.9 GHz to 10.3 GHz with omnidirectional radiation pattern. Slots etching techniques are utilized to provide four notched bands at frequencies of 2.3, 2.8, 3.5, and 5.5 GHz to avoid the interference with the wireless networks which occupy bands at these frequencies. The analysis and design of the proposed antenna were carried out using the commercially available Ansoft high frequency structure simulator (HFSS). The antenna is fabricated and tested. The measured data of the fabricated antenna demonstrate very good agreement with the simulated results.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"52 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116652536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766393
A. Alsawy, H. Hefny
Shortest path problem got a lot of attention from many researchers, in our case the distances between the nodes are represented by different types of uncertain numbers such as: interval numbers, fuzzy numbers, rough numbers and also some of them could be represented by classical real numbers. These heterogeneous types of numbers are forming a challenge in calculation the shortest path. In this work we propose a Unified Granular Number (UGN), that we call it G- Number to act as a general form for any uncertain granular number. G- Number represents higher level of abstract that hold only common properties of different types of uncertain granular numbers while ignoring some particular properties which are not necessary to be considered in such higher abstract level. The main benefit of using such a proposed G- number is the ability to represent all types of granular numbers using unified formality that greatly simplifies arithmetic operations.
{"title":"Applying granular computing in uncertain optimization problems","authors":"A. Alsawy, H. Hefny","doi":"10.1109/JEC-ECC.2013.6766393","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766393","url":null,"abstract":"Shortest path problem got a lot of attention from many researchers, in our case the distances between the nodes are represented by different types of uncertain numbers such as: interval numbers, fuzzy numbers, rough numbers and also some of them could be represented by classical real numbers. These heterogeneous types of numbers are forming a challenge in calculation the shortest path. In this work we propose a Unified Granular Number (UGN), that we call it G- Number to act as a general form for any uncertain granular number. G- Number represents higher level of abstract that hold only common properties of different types of uncertain granular numbers while ignoring some particular properties which are not necessary to be considered in such higher abstract level. The main benefit of using such a proposed G- number is the ability to represent all types of granular numbers using unified formality that greatly simplifies arithmetic operations.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":" 28","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113948820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766382
S. Sharroush
Reading 2T-2C ferroelectric random-access memory (FRAM) cells does not require generating a reference voltage as this architecture is self-referenced. However, this architecture consumes a relatively large silicon area. So, 1T-1C FRAMs are used instead. Reading 1T-1C FRAMs, however, requires generating a reference voltage that is ideally halfway between the bitline voltage generated in case of “0” reading, V0, and in case of “1” reading, V1. Then, this reference voltage will be compared with the bitline voltage by a sense amplifier. In this paper, a preview of some of the schemes that does not require generating a reference voltage will be introduced. Then, a novel reading scheme that does not require the generation of a reference voltage and depends on using two cascaded inverters is discussed. The proposed scheme will be simulated for the 0.13 μm CMOS technology and shows a 60% reduction in the read access time for stored “1”. The reduction in the read access time can be attributed to the fact that the output data will be taken at a parasitic capacitance that is much smaller than the bitline parasitic capacitance.
{"title":"1T-1C FRAM cell reading without reference-voltage generation","authors":"S. Sharroush","doi":"10.1109/JEC-ECC.2013.6766382","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766382","url":null,"abstract":"Reading 2T-2C ferroelectric random-access memory (FRAM) cells does not require generating a reference voltage as this architecture is self-referenced. However, this architecture consumes a relatively large silicon area. So, 1T-1C FRAMs are used instead. Reading 1T-1C FRAMs, however, requires generating a reference voltage that is ideally halfway between the bitline voltage generated in case of “0” reading, V0, and in case of “1” reading, V1. Then, this reference voltage will be compared with the bitline voltage by a sense amplifier. In this paper, a preview of some of the schemes that does not require generating a reference voltage will be introduced. Then, a novel reading scheme that does not require the generation of a reference voltage and depends on using two cascaded inverters is discussed. The proposed scheme will be simulated for the 0.13 μm CMOS technology and shows a 60% reduction in the read access time for stored “1”. The reduction in the read access time can be attributed to the fact that the output data will be taken at a parasitic capacitance that is much smaller than the bitline parasitic capacitance.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114541994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766406
G. Gouid, A. A. Nasser, M. Z. Mostafa, D. El-Hennawi
The objective of this paper is to ensure compatibility between cutting blade velocity and the removed tissues without lacerations. This maintains the integrity of the tissues adjacent to the tumor. A Support Vector Machine (SVM) algorithm is applied to the Head and Neck tumors images. This includes two main steps, identifying the region having Laceration, and measuring the percentage of the laceration. The algorithm is applied to 20 sets of real data in the form of images for the adenoid and head and neck tumor tissues before and after the removal operation. This is followed by calculating the force exerted by the cutting blade, the cutting angle, and the cutting velocity that causes minimum laceration. The simulation results show good agreement with the actual operation results.
{"title":"Matching between the cutting blade velocity and tissue swelling of Head and Neck using Support Vector Machine","authors":"G. Gouid, A. A. Nasser, M. Z. Mostafa, D. El-Hennawi","doi":"10.1109/JEC-ECC.2013.6766406","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766406","url":null,"abstract":"The objective of this paper is to ensure compatibility between cutting blade velocity and the removed tissues without lacerations. This maintains the integrity of the tissues adjacent to the tumor. A Support Vector Machine (SVM) algorithm is applied to the Head and Neck tumors images. This includes two main steps, identifying the region having Laceration, and measuring the percentage of the laceration. The algorithm is applied to 20 sets of real data in the form of images for the adenoid and head and neck tumor tissues before and after the removal operation. This is followed by calculating the force exerted by the cutting blade, the cutting angle, and the cutting velocity that causes minimum laceration. The simulation results show good agreement with the actual operation results.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115218206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766379
A. Abd El Rahman, A. Hamdy, F. Zaki
This paper presents a license plate recognition system for the Egyptian plates introduced in 2008. The proposed system is composed of three main stages; localization & skew correction stage, segmentation stage, and recognition stage. The localization stage uses the main feature of the plate where high contrast text-background is tagged with colored or gray area, to find the plate candidates in the image and to measure the skew angle. In segmentation stage, connected component analysis is applied to find objects belong to license number. The objects will be analyzed to attach diacritic and over segmented objects to each other to form a group of recognizable objects. The final objects will be split to digits and letter groups. In recognition stage, an adapted template match technique is introduced to recognize the digits and letter groups separately after normalizing them. The system is tested against a real video of two hours and the accuracy was 81% and average time per frame was 24 msec/frame.
{"title":"Automatic arabic number plate recognition","authors":"A. Abd El Rahman, A. Hamdy, F. Zaki","doi":"10.1109/JEC-ECC.2013.6766379","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766379","url":null,"abstract":"This paper presents a license plate recognition system for the Egyptian plates introduced in 2008. The proposed system is composed of three main stages; localization & skew correction stage, segmentation stage, and recognition stage. The localization stage uses the main feature of the plate where high contrast text-background is tagged with colored or gray area, to find the plate candidates in the image and to measure the skew angle. In segmentation stage, connected component analysis is applied to find objects belong to license number. The objects will be analyzed to attach diacritic and over segmented objects to each other to form a group of recognizable objects. The final objects will be split to digits and letter groups. In recognition stage, an adapted template match technique is introduced to recognize the digits and letter groups separately after normalizing them. The system is tested against a real video of two hours and the accuracy was 81% and average time per frame was 24 msec/frame.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116160854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-12-01DOI: 10.1109/JEC-ECC.2013.6766402
Tawfik Ismail, J. El-Azab, Y. Badr
Integrated Fiber (IF) approach for optical signal processing offers significant advantages in both performance and cost when compared to conventional electrical processing. The main problem in optical single processing is to maintain the data in the optical domain without converting it to the electrical domain. Currently, many devices have been proposed for processing the data in the optical domain. The Wavelength Optical Crossbar (WOC), one of the important devices in optical networks, has been developed based on the phenomenon of wavelength exchanging. High-NonLinear Dispersion Shifted Fiber (HNL-DSF) provides a good performance due to the high mixing efficiency. In this paper, we will study the impacts of changing the HNL-DSF parameter on the wavelength exchanging.
{"title":"The impact of changing HNL-DSF parameters on wavelength exchanging","authors":"Tawfik Ismail, J. El-Azab, Y. Badr","doi":"10.1109/JEC-ECC.2013.6766402","DOIUrl":"https://doi.org/10.1109/JEC-ECC.2013.6766402","url":null,"abstract":"Integrated Fiber (IF) approach for optical signal processing offers significant advantages in both performance and cost when compared to conventional electrical processing. The main problem in optical single processing is to maintain the data in the optical domain without converting it to the electrical domain. Currently, many devices have been proposed for processing the data in the optical domain. The Wavelength Optical Crossbar (WOC), one of the important devices in optical networks, has been developed based on the phenomenon of wavelength exchanging. High-NonLinear Dispersion Shifted Fiber (HNL-DSF) provides a good performance due to the high mixing efficiency. In this paper, we will study the impacts of changing the HNL-DSF parameter on the wavelength exchanging.","PeriodicalId":379820,"journal":{"name":"2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"406 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122457998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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