Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752141
Binod Kumar, K. Basu, Virendra Singh
Error localization is a challenging step in the process of post-silicon validation owing to modern design complexity. This is exacerbated by the limited visibility of internal signals at the post-silicon validation stage. Incorporated design-for-debug features and off-line techniques assist in system-level error localization for processor based systems. However, for general SoCs and special purpose IPs, error localization at the netlist level is a challenging problem. This paper proposes a machine learning based error localization methodology during the debug step. Using limited trace data, unknown signal states are discovered with the help of cluster formation by utilizing k-nearest neighbors algorithm. These clusters assist in enhancing the internal signal state visibility to the maximum extent. We derive features from the enhanced debug data set to understand the nature of the injected bug and the erroneous flip-flop responses, which are then utilized to achieve spatial error localization.
{"title":"A Technique for Electrical Error Localization with Learning Methods During Post-silicon Debugging","authors":"Binod Kumar, K. Basu, Virendra Singh","doi":"10.1109/IGCC.2018.8752141","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752141","url":null,"abstract":"Error localization is a challenging step in the process of post-silicon validation owing to modern design complexity. This is exacerbated by the limited visibility of internal signals at the post-silicon validation stage. Incorporated design-for-debug features and off-line techniques assist in system-level error localization for processor based systems. However, for general SoCs and special purpose IPs, error localization at the netlist level is a challenging problem. This paper proposes a machine learning based error localization methodology during the debug step. Using limited trace data, unknown signal states are discovered with the help of cluster formation by utilizing k-nearest neighbors algorithm. These clusters assist in enhancing the internal signal state visibility to the maximum extent. We derive features from the enhanced debug data set to understand the nature of the injected bug and the erroneous flip-flop responses, which are then utilized to achieve spatial error localization.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129151050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/igcc.2018.8752133
{"title":"[Copyright notice]","authors":"","doi":"10.1109/igcc.2018.8752133","DOIUrl":"https://doi.org/10.1109/igcc.2018.8752133","url":null,"abstract":"","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114715022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752113
T. Karnik
Always ON always sensing small form factor edge systems for internet of things (IOT) are becoming ubiquitous. Many applications require these tiny devices to be self-powered and maintenance-free. Hence, they should be able to harvest energy from available ambient sources and should have low manufacturing cost. Millimeter-scale form factor systems have been developed in academia for the past few years. Small form factor edge systems are becoming commercially available. These systems are essential in today’s cyber physical world. We will introduce the available market and the trends driving this growth in IOT system deployments. That will be followed by typical system requirements for a typical self-powered IOT system. Challenges to realize such a dream IOT system will be discussed. We will present two approaches to system design, namely bottom-up and top-down. An X86-based tiny microcontroller unit (MCU) was designed to enable multiple IOT usages. This MCU followed a bottom-up approach – ultra-low power low cost MCU was designed first and then applied to IOT systems such as smart sensor tag for package tracking. The discussion will introduce another IOT system that followed a top-down usage-driven approach. In this case, an agricultural usage was chosen that required energy harvesting, X86-class edge computing, visual recognition on the edge, secure storage, secure wireless communication and ultra-low power maintenance free operation. An IOT system was architected for this usage and later demonstrated. We will conclude the presentation with comparison of these two distinct approaches to IOT system design.
{"title":"Technology trends, requirements and challenges for ubiquitous self-powered IOT systems deployment","authors":"T. Karnik","doi":"10.1109/IGCC.2018.8752113","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752113","url":null,"abstract":"Always ON always sensing small form factor edge systems for internet of things (IOT) are becoming ubiquitous. Many applications require these tiny devices to be self-powered and maintenance-free. Hence, they should be able to harvest energy from available ambient sources and should have low manufacturing cost. Millimeter-scale form factor systems have been developed in academia for the past few years. Small form factor edge systems are becoming commercially available. These systems are essential in today’s cyber physical world. We will introduce the available market and the trends driving this growth in IOT system deployments. That will be followed by typical system requirements for a typical self-powered IOT system. Challenges to realize such a dream IOT system will be discussed. We will present two approaches to system design, namely bottom-up and top-down. An X86-based tiny microcontroller unit (MCU) was designed to enable multiple IOT usages. This MCU followed a bottom-up approach – ultra-low power low cost MCU was designed first and then applied to IOT systems such as smart sensor tag for package tracking. The discussion will introduce another IOT system that followed a top-down usage-driven approach. In this case, an agricultural usage was chosen that required energy harvesting, X86-class edge computing, visual recognition on the edge, secure storage, secure wireless communication and ultra-low power maintenance free operation. An IOT system was architected for this usage and later demonstrated. We will conclude the presentation with comparison of these two distinct approaches to IOT system design.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130192410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752155
Yujing Feng, Han Li, Xu Tan, Xiaochun Ye, Dongrui Fan, Zhimin Tang
Dataflow processor has shown its unique advantages in executing high performance computing applications with its communication-exposed microarchitecture. In dataflow processors, large amounts of data are directly transferred between instructions through a network-on-chip. The efficiency of data transfer is an imperative performance metric that needs to be optimized in most dataflow processors. Based on the specific features of the dataflow network, we propose a mechanism for dynamically merging the packets in the routers. By testing workloads with varying characteristics, the experiment results demonstrate that the average latency of data transfer is reduced by 11.8%, the performance of dataflow accelerator is improved by 14.0%.
{"title":"Optimizing network efficiency of dataflow architectures through dynamic packet merging","authors":"Yujing Feng, Han Li, Xu Tan, Xiaochun Ye, Dongrui Fan, Zhimin Tang","doi":"10.1109/IGCC.2018.8752155","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752155","url":null,"abstract":"Dataflow processor has shown its unique advantages in executing high performance computing applications with its communication-exposed microarchitecture. In dataflow processors, large amounts of data are directly transferred between instructions through a network-on-chip. The efficiency of data transfer is an imperative performance metric that needs to be optimized in most dataflow processors. Based on the specific features of the dataflow network, we propose a mechanism for dynamically merging the packets in the routers. By testing workloads with varying characteristics, the experiment results demonstrate that the average latency of data transfer is reduced by 11.8%, the performance of dataflow accelerator is improved by 14.0%.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130239358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752122
Shikang Xu, I. Koren, C. M. Krishna
The energy consumption of the cyber part of cyber-physical systems (CPSs) has attracted considerable attention in recent years. Increased energy consumption results in increased thermal damage to the processors requiring more frequent replacements; and in many applications, it also requires increased energy storage capacity. Fault tolerance contributes to a large fraction of the cyber energy consumption in CPS since it is implemented using redundant computations.This paper studies the use of dynamic actuator derating (i.e., artificially limiting the maximum actuator output) for reducing the required redundancy. By targeting the use of fault-tolerance, we are able to obtain significant reductions in computer energy expenditure and thermal stress without lowering the reliability. This has beneficial effects on processor lifetime and required energy storage.
{"title":"Energy and Dependability Enhancement by Dynamic Actuator Derating in Cyber-Physical Systems","authors":"Shikang Xu, I. Koren, C. M. Krishna","doi":"10.1109/IGCC.2018.8752122","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752122","url":null,"abstract":"The energy consumption of the cyber part of cyber-physical systems (CPSs) has attracted considerable attention in recent years. Increased energy consumption results in increased thermal damage to the processors requiring more frequent replacements; and in many applications, it also requires increased energy storage capacity. Fault tolerance contributes to a large fraction of the cyber energy consumption in CPS since it is implemented using redundant computations.This paper studies the use of dynamic actuator derating (i.e., artificially limiting the maximum actuator output) for reducing the required redundancy. By targeting the use of fault-tolerance, we are able to obtain significant reductions in computer energy expenditure and thermal stress without lowering the reliability. This has beneficial effects on processor lifetime and required energy storage.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131873344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752140
Mostafa Said, Sofiane Chetoui, A. Belouchrani, S. Reda
In this paper we propose a fine-grain blind leakage and dynamic power identification technique, and we use it to analyze the dynamic and leakage power of mobile SoCs at the core level. We also introduce a new experimental methodology to apply blind power identification for heterogeneous SoCs, including a novel initialization for the algorithm that enhances its power estimation accuracy. We shed light on power usage using real life applications, showing how power is divided among the big, the LITTLE cores and the GPU. Our results show that for some applications, the GPU can have the highest power consumption, and that the LITTLE cluster can have large values of leakage power. We also elucidate the trade-offs between power consumption and performance of the big cluster versus the little cluster of the SoC at different frequencies. We also show how the power is affected by CPU and skin thermal throttling.
{"title":"Understanding the Sources of Power Consumption in Mobile SoCs","authors":"Mostafa Said, Sofiane Chetoui, A. Belouchrani, S. Reda","doi":"10.1109/IGCC.2018.8752140","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752140","url":null,"abstract":"In this paper we propose a fine-grain blind leakage and dynamic power identification technique, and we use it to analyze the dynamic and leakage power of mobile SoCs at the core level. We also introduce a new experimental methodology to apply blind power identification for heterogeneous SoCs, including a novel initialization for the algorithm that enhances its power estimation accuracy. We shed light on power usage using real life applications, showing how power is divided among the big, the LITTLE cores and the GPU. Our results show that for some applications, the GPU can have the highest power consumption, and that the LITTLE cluster can have large values of leakage power. We also elucidate the trade-offs between power consumption and performance of the big cluster versus the little cluster of the SoC at different frequencies. We also show how the power is affected by CPU and skin thermal throttling.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117045600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752117
Massoud Pedram
Energy consumption is a key design driver for electronic systems ranging from warehouse-size datacenters to battery-powered mobile devices to mobile clouds. It is well known that energy efficiency is best achieved by an application-specific mix of power-efficient hardware and runtime energy governance. Power efficient hardware requires low power devices, cell libraries, circuits, and architectures whereas effective energy governance needs significant hardware and software support e.g., to achieve dynamic power/performance scaling, power gating, core consolidation, and computation offloading. In my talk I will discuss three example problems to illustrate the range of low power solutions that can be employed and the kind of power savings which are achievable. These problems are: (i) Power-efficient resource management and job scheduling in a geo-distributed cloud infrastructure, (ii) Design of low-power application processors exploiting the temperature effect inversion of deeply scaled devices, and (iii) Energy-efficient computation offloading for deep neural networks in a mobile cloud computing environment. I will conclude my talk with a list of best power-efficient design practices.
{"title":"Energy-Efficient Computing: Datacenters, Mobile Devices, and Mobile Clouds","authors":"Massoud Pedram","doi":"10.1109/IGCC.2018.8752117","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752117","url":null,"abstract":"Energy consumption is a key design driver for electronic systems ranging from warehouse-size datacenters to battery-powered mobile devices to mobile clouds. It is well known that energy efficiency is best achieved by an application-specific mix of power-efficient hardware and runtime energy governance. Power efficient hardware requires low power devices, cell libraries, circuits, and architectures whereas effective energy governance needs significant hardware and software support e.g., to achieve dynamic power/performance scaling, power gating, core consolidation, and computation offloading. In my talk I will discuss three example problems to illustrate the range of low power solutions that can be employed and the kind of power savings which are achievable. These problems are: (i) Power-efficient resource management and job scheduling in a geo-distributed cloud infrastructure, (ii) Design of low-power application processors exploiting the temperature effect inversion of deeply scaled devices, and (iii) Energy-efficient computation offloading for deep neural networks in a mobile cloud computing environment. I will conclude my talk with a list of best power-efficient design practices.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128350318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752157
Anup Das, Domenico Balsamo, G. Merrett, B. Al-Hashimi, F. Catthoor
Despite advances in multicore smartphone technologies, battery consumption still remains one of customer’s least satisfying features. This is because existing energy saving techniques do not consider the electrochemical characteristics of batteries, which causes battery consumption to vary unpredictably, both within and across applications. Additionally, these techniques provide application specific fixed performance degradation in order to reduce energy consumption. Having a performance penalty, even when a battery is fully charged, adds to customer dissatisfaction. We propose a control-based approach for runtime power management of multicore smartphones, which scales the frequency of processing cores in response to the battery consumption, taking into account the electrochemical characteristics of a battery. The objective is to enable graceful performance modulation, which adapts with application and battery availability in a predictable manner, improving quality-of-user-experience. Our control approach is practically demonstrated on embedded Linux running on Cortex A15-based smartphone development platform from nvidia. A thorough validation with mobile and Java workloads demonstrate 2.9x improvement in battery availability compared to state-of-the-art approaches.
{"title":"Graceful Performance Adaption through Hardware-Software Interaction for Autonomous Battery Management of Multicore Smartphones","authors":"Anup Das, Domenico Balsamo, G. Merrett, B. Al-Hashimi, F. Catthoor","doi":"10.1109/IGCC.2018.8752157","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752157","url":null,"abstract":"Despite advances in multicore smartphone technologies, battery consumption still remains one of customer’s least satisfying features. This is because existing energy saving techniques do not consider the electrochemical characteristics of batteries, which causes battery consumption to vary unpredictably, both within and across applications. Additionally, these techniques provide application specific fixed performance degradation in order to reduce energy consumption. Having a performance penalty, even when a battery is fully charged, adds to customer dissatisfaction. We propose a control-based approach for runtime power management of multicore smartphones, which scales the frequency of processing cores in response to the battery consumption, taking into account the electrochemical characteristics of a battery. The objective is to enable graceful performance modulation, which adapts with application and battery availability in a predictable manner, improving quality-of-user-experience. Our control approach is practically demonstrated on embedded Linux running on Cortex A15-based smartphone development platform from nvidia. A thorough validation with mobile and Java workloads demonstrate 2.9x improvement in battery availability compared to state-of-the-art approaches.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127541085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/IGCC.2018.8752119
Natasha Jarus, Sahra Sedigh Sarvestani, A. Hurson
Relating various models of a system is an essential part of model transformation, model composition, and other metamodeling tasks. The objective of this doctoral research is to create a provably correct approach to this problem.
{"title":"Facilitating Model–Based Design and Evaluation for Sustainability","authors":"Natasha Jarus, Sahra Sedigh Sarvestani, A. Hurson","doi":"10.1109/IGCC.2018.8752119","DOIUrl":"https://doi.org/10.1109/IGCC.2018.8752119","url":null,"abstract":"Relating various models of a system is an essential part of model transformation, model composition, and other metamodeling tasks. The objective of this doctoral research is to create a provably correct approach to this problem.","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131018664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-01DOI: 10.1109/igcc.2018.8752135
{"title":"IGSC 2018 Panel Discussions","authors":"","doi":"10.1109/igcc.2018.8752135","DOIUrl":"https://doi.org/10.1109/igcc.2018.8752135","url":null,"abstract":"","PeriodicalId":388554,"journal":{"name":"2018 Ninth International Green and Sustainable Computing Conference (IGSC)","volume":"222 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131719693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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