Data broadcast is an efficient way of data dissemination in the wireless mobile environment. Recently, many researchers pay attention to broadcast scheduling for multi-item queries which is a more practical problem in this field. However, only a few works discuss the scheduling problem in on-demand environment. In this paper, we propose a heuristic approach called LRL for the broadcast scheduling problem. Performance analysis is put forward and simulation experiments show that our approaches achieve a comparative improvement compared with the existing methods.
{"title":"Efficient Data Scheduling for Multi-item Queries in On-Demand Broadcast","authors":"Weiwei Sun, Zhuoyao Zhang, Ping Yu, Yongrui Qin","doi":"10.1109/EUC.2008.133","DOIUrl":"https://doi.org/10.1109/EUC.2008.133","url":null,"abstract":"Data broadcast is an efficient way of data dissemination in the wireless mobile environment. Recently, many researchers pay attention to broadcast scheduling for multi-item queries which is a more practical problem in this field. However, only a few works discuss the scheduling problem in on-demand environment. In this paper, we propose a heuristic approach called LRL for the broadcast scheduling problem. Performance analysis is put forward and simulation experiments show that our approaches achieve a comparative improvement compared with the existing methods.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114791906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We present in this paper architecture and preliminary evaluation results of a novel dual-mode processor architecture which supports queue and stack computation models in a single core. The core is highly adaptable in both functionality and configuration. It is based on a reduced bit produced order queue computation instruction set architecture and functions into Queue or Stack execution models. This is achieved via a so called dynamic switching mechanism implemented in hardware. The current design focuses on the ability to execute Queue programs and also to support Stack based programs without considerable increase in hardware to the base architecture. We present the architecture description and design results in a fair amount of details.
{"title":"Single Instruction Dual-Execution Model Processor Architecture","authors":"Taichi Maekawa, B. Abderazek, Kenichi Kuroda","doi":"10.1109/EUC.2008.116","DOIUrl":"https://doi.org/10.1109/EUC.2008.116","url":null,"abstract":"We present in this paper architecture and preliminary evaluation results of a novel dual-mode processor architecture which supports queue and stack computation models in a single core. The core is highly adaptable in both functionality and configuration. It is based on a reduced bit produced order queue computation instruction set architecture and functions into Queue or Stack execution models. This is achieved via a so called dynamic switching mechanism implemented in hardware. The current design focuses on the ability to execute Queue programs and also to support Stack based programs without considerable increase in hardware to the base architecture. We present the architecture description and design results in a fair amount of details.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116434158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Linfeng Pan, M. Guo, Yanqin Yang, M. Wang, Z. Shao
As MOSFETs (metal-oxide-semiconductor field effect transistor) dimensions enter the sub-micrometer region, reducing leakage power becomes a significant issue of VLSI industry. In this paper, we propose a novel prediction approach to predict idleness of functional units for leakage energy management. Using a state-based predictor, historical utilization information of functional units is exploited to adjust the state of the predictor so as to enhance the accuracy of prediction. We implement our approach based on SimpleScalar and conduct experiments with a suite of fourteen benchmarks from Trimaran. The experimental results show that our approach achieves the better results compared with the previous work.
{"title":"A State-Based Predictive Approach for Leakage Reduction of Functional Units","authors":"Linfeng Pan, M. Guo, Yanqin Yang, M. Wang, Z. Shao","doi":"10.1109/EUC.2008.175","DOIUrl":"https://doi.org/10.1109/EUC.2008.175","url":null,"abstract":"As MOSFETs (metal-oxide-semiconductor field effect transistor) dimensions enter the sub-micrometer region, reducing leakage power becomes a significant issue of VLSI industry. In this paper, we propose a novel prediction approach to predict idleness of functional units for leakage energy management. Using a state-based predictor, historical utilization information of functional units is exploited to adjust the state of the predictor so as to enhance the accuracy of prediction. We implement our approach based on SimpleScalar and conduct experiments with a suite of fourteen benchmarks from Trimaran. The experimental results show that our approach achieves the better results compared with the previous work.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124790048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Concurrent Error Detection (CED) techniques based on hardware duplication are widely used to enhance system dependability. All CED techniques contain some form of redundancy. In this paper we present simulation results to quantitatively compare various CED schemes based on their area overhead and protection (data integrity) they provide against multiple failures. We describe some studies of parity based concurrent error detection in S-boxes. In this work substitution blocks of PP-1 block-cipher, designed for platforms with very limited resources (for example for embedded systems), are used as a case study.
{"title":"Error Detection Schemes for CED in Block Ciphers","authors":"E. Idzikowska, K. Bucholc","doi":"10.1109/EUC.2008.134","DOIUrl":"https://doi.org/10.1109/EUC.2008.134","url":null,"abstract":"Concurrent Error Detection (CED) techniques based on hardware duplication are widely used to enhance system dependability. All CED techniques contain some form of redundancy. In this paper we present simulation results to quantitatively compare various CED schemes based on their area overhead and protection (data integrity) they provide against multiple failures. We describe some studies of parity based concurrent error detection in S-boxes. In this work substitution blocks of PP-1 block-cipher, designed for platforms with very limited resources (for example for embedded systems), are used as a case study.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128597059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao
Previous full virtualization techniques are implemented in software without any hardware assist. In this paper, for the first time, we propose an advanced hardware assisted full virtualization architecture-Dynamic Binary Translation in DIMM (DBTIM). We integrate a reconfigurable dynamic binary translation chip into a DIMM. DBTIM could be inserted to the mainboard as a normal DIMM, hence easily making the host CPU virtualizable. We also implement a DBTIM prototype on FPGA. Furthermore, we propose an EDBTIM technique-Enhanced Dynamic Binary Translator in Memory, which integrates dynamic binary translator and memory on one SDRAM chip. We analyze our new approaches and compare them with other modern virtualization techniques. We demonstrate that the new techniques in this paper could provide full virtualization to all kinds of CPU architectures, including x86, with better virtualization capability, better software and hardware compatibility, better performance and lower overheads.
{"title":"DBTIM: An Advanced Hardware Assisted Full Virtualization Architecture","authors":"Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, Nong Xiao","doi":"10.1109/EUC.2008.95","DOIUrl":"https://doi.org/10.1109/EUC.2008.95","url":null,"abstract":"Previous full virtualization techniques are implemented in software without any hardware assist. In this paper, for the first time, we propose an advanced hardware assisted full virtualization architecture-Dynamic Binary Translation in DIMM (DBTIM). We integrate a reconfigurable dynamic binary translation chip into a DIMM. DBTIM could be inserted to the mainboard as a normal DIMM, hence easily making the host CPU virtualizable. We also implement a DBTIM prototype on FPGA. Furthermore, we propose an EDBTIM technique-Enhanced Dynamic Binary Translator in Memory, which integrates dynamic binary translator and memory on one SDRAM chip. We analyze our new approaches and compare them with other modern virtualization techniques. We demonstrate that the new techniques in this paper could provide full virtualization to all kinds of CPU architectures, including x86, with better virtualization capability, better software and hardware compatibility, better performance and lower overheads.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130074517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
High delivery ratio with low energy consumption and transmission delay is one of design challenges for wireless sensor network routing protocol. In this paper, we proposed a grid-based distributed multi-hop routing protocol (GDRP) for wireless sensor network. At one time there is only one node is selected as grid head per grid and the remaining nodes perform grid head tasks by rotating dynamically. For the sake of decreasing the energy consumed by grid heads, the inter-grid communication uses multi-hop routing pattern. In GDRP each grid head executes a distributed algorithm and chooses an optimal next h-hop routing path independently according to the routing cost, distance and residual energy of neighboring grid heads. The experiment results show GDRP balances energy consumption well, thus leads to a high data delivery ratio, low transmission delay and prolonged network lifetime.
{"title":"A Grid-Based Distributed Multi-Hop Routing Protocol for Wireless Sensor Networks","authors":"Wenjun Liu, Yue Sun, Jiguo Yu, Baoxiang Cao","doi":"10.1109/EUC.2008.53","DOIUrl":"https://doi.org/10.1109/EUC.2008.53","url":null,"abstract":"High delivery ratio with low energy consumption and transmission delay is one of design challenges for wireless sensor network routing protocol. In this paper, we proposed a grid-based distributed multi-hop routing protocol (GDRP) for wireless sensor network. At one time there is only one node is selected as grid head per grid and the remaining nodes perform grid head tasks by rotating dynamically. For the sake of decreasing the energy consumed by grid heads, the inter-grid communication uses multi-hop routing pattern. In GDRP each grid head executes a distributed algorithm and chooses an optimal next h-hop routing path independently according to the routing cost, distance and residual energy of neighboring grid heads. The experiment results show GDRP balances energy consumption well, thus leads to a high data delivery ratio, low transmission delay and prolonged network lifetime.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126907499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Jääskeläinen, Pertti Kellomäki, J. Takala, Heikki O. Kultala, Mikael Lepistö
Multithreading is an important software modularization technique. However, it can incur substantial overheads, especially in processors where the amount of architecturally visible state is large. We propose an implementation technique for co-operative multithreading, where context switches occur in places that minimize the amount of state that needs to be saved. The subset of processor state saved during each context switch is based on where the switch occurs.We have validated the approach by an empirical study of resource usage in basic blocks, and by implementing the co-operative threading in our compiler. Performance figures are given for an MP3 player utilizing the threading implementation.
{"title":"Reducing Context Switch Overhead with Compiler-Assisted Threading","authors":"P. Jääskeläinen, Pertti Kellomäki, J. Takala, Heikki O. Kultala, Mikael Lepistö","doi":"10.1109/EUC.2008.181","DOIUrl":"https://doi.org/10.1109/EUC.2008.181","url":null,"abstract":"Multithreading is an important software modularization technique. However, it can incur substantial overheads, especially in processors where the amount of architecturally visible state is large. We propose an implementation technique for co-operative multithreading, where context switches occur in places that minimize the amount of state that needs to be saved. The subset of processor state saved during each context switch is based on where the switch occurs.We have validated the approach by an empirical study of resource usage in basic blocks, and by implementing the co-operative threading in our compiler. Performance figures are given for an MP3 player utilizing the threading implementation.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131633881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In sensor networks, sensors are prone to be compromised by attackers because they are deployed in an unattended environment. Then, attackers can employ the keys of the compromised sensors to uncover the sensor readings and even modify them to lead an unsuitable decision of the user. To resolve the problem, it is important to refresh communication keys of sensors in a periodic or on-demand manner. In this paper, we propose a key refreshment scheme which is immune to the increase of the compromised nodes. In our scheme, each member in a cluster uses a pairwise key which is different from those of other members, so the compromise of a sensor reveals no transmissions from other members. Besides, our scheme explicitly evicts the compromised sensors by virtue of periodic cluster reformations. Simulation results showed that our scheme is more tolerant to the compromised sensors while it is more energy-efficient than SHELL.
{"title":"Securing Wireless Sensor Networks Using Cluster Reformations","authors":"Gicheol Wang, Deokjai Choi, Daewook Kang","doi":"10.1109/EUC.2008.104","DOIUrl":"https://doi.org/10.1109/EUC.2008.104","url":null,"abstract":"In sensor networks, sensors are prone to be compromised by attackers because they are deployed in an unattended environment. Then, attackers can employ the keys of the compromised sensors to uncover the sensor readings and even modify them to lead an unsuitable decision of the user. To resolve the problem, it is important to refresh communication keys of sensors in a periodic or on-demand manner. In this paper, we propose a key refreshment scheme which is immune to the increase of the compromised nodes. In our scheme, each member in a cluster uses a pairwise key which is different from those of other members, so the compromise of a sensor reveals no transmissions from other members. Besides, our scheme explicitly evicts the compromised sensors by virtue of periodic cluster reformations. Simulation results showed that our scheme is more tolerant to the compromised sensors while it is more energy-efficient than SHELL.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129280165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper is proposing a new protocol for uniformly clustering distributed wireless sensor networks based on fuzzy inference system. The objective of this protocol is increasing the lifetime of the sensor network by uniformly distributing the clusters on the wireless sensor network by reclustering the whole network repeatedly. The uniform distribution of clusters on the network provides efficient coverage of that network. Efficient coverage means that the clusters are neither overlapped nor leaving nodes in the network unclustered. Each sensor node uses the energy level, local density within its sensing range and time as parameters for clustering, re-clustering, and merging existed clusters by using fuzzy logic technique. The proposed protocol requires neither a prior knowledge of the sensor locations nor a centralized controller for clustering the sensor nodes. A comparison was conducted and found that the new protocol distributes clusters uniformly as good as ACE protocol and prolong the network lifetime in magnitude of 100% more than ACE.
{"title":"Fuzzy Self-Clustering for Wireless Sensor Networks","authors":"Yahya M. Tashtoush, Mohammed A. Okour","doi":"10.1109/EUC.2008.98","DOIUrl":"https://doi.org/10.1109/EUC.2008.98","url":null,"abstract":"This paper is proposing a new protocol for uniformly clustering distributed wireless sensor networks based on fuzzy inference system. The objective of this protocol is increasing the lifetime of the sensor network by uniformly distributing the clusters on the wireless sensor network by reclustering the whole network repeatedly. The uniform distribution of clusters on the network provides efficient coverage of that network. Efficient coverage means that the clusters are neither overlapped nor leaving nodes in the network unclustered. Each sensor node uses the energy level, local density within its sensing range and time as parameters for clustering, re-clustering, and merging existed clusters by using fuzzy logic technique. The proposed protocol requires neither a prior knowledge of the sensor locations nor a centralized controller for clustering the sensor nodes. A comparison was conducted and found that the new protocol distributes clusters uniformly as good as ACE protocol and prolong the network lifetime in magnitude of 100% more than ACE.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122753250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, the novel flow control strategy called dimensional bubble flow control (DBFC) is presented. The flow control strategy of DBFC builds on virtual cut-through switching and credit-based flow control mechanism and analyzes the credit value of port and the routing information of the packets to realize the point-point flow control. In the 2-D mesh network on chip, when the flow control strategy of DBFC is accepted, the adaptive dimensional bubble routing (ADBR) algorithm designed in this paper can get the goals including deadlock-free and minimal distance even if the cyclic dependencies exist. In this paper, the detail proof is provided for these conclusions. Lastly, we adapt the source code of NOXIM that is a popular simulator of on-chip networks and realize the flow control of DBFC and ADBR algorithm in NOXIM. We test the performance of ADBR on NOXIM. The simulation performance shows our scheme is superior to the usual approach such as XY dimension-order routing, with nearly 17.5% improvement in the packets latency and throughput.
{"title":"Dimensional Bubble Flow Control and Fully Adaptive Routing in the 2-D Mesh Network on Chip","authors":"Xiao Canwen, Zhang Minxuan, Dou Yong, Zhao Zhitong","doi":"10.1109/EUC.2008.49","DOIUrl":"https://doi.org/10.1109/EUC.2008.49","url":null,"abstract":"In this paper, the novel flow control strategy called dimensional bubble flow control (DBFC) is presented. The flow control strategy of DBFC builds on virtual cut-through switching and credit-based flow control mechanism and analyzes the credit value of port and the routing information of the packets to realize the point-point flow control. In the 2-D mesh network on chip, when the flow control strategy of DBFC is accepted, the adaptive dimensional bubble routing (ADBR) algorithm designed in this paper can get the goals including deadlock-free and minimal distance even if the cyclic dependencies exist. In this paper, the detail proof is provided for these conclusions. Lastly, we adapt the source code of NOXIM that is a popular simulator of on-chip networks and realize the flow control of DBFC and ADBR algorithm in NOXIM. We test the performance of ADBR on NOXIM. The simulation performance shows our scheme is superior to the usual approach such as XY dimension-order routing, with nearly 17.5% improvement in the packets latency and throughput.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122978743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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