Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351876
Hyosang Jang, Taeyoung Ahn, B. Choi
This paper presents new soft-switched half-bridge dc-to-dc converters intended for applications where the input voltage varies widely. The proposed converters are presented in both non-isolated form and isolated form. The proposed dc-to-dc converters operate with zero voltage switching characteristics for MOSFET switches. The duty ratio of the proposed converter could expand to 100 % and its voltage gain is twice the voltage gain of conventional half-bridge converters. Accordingly, the proposed converters are well suited for applications requiring high conversion efficiency at the presence of wide input voltage variations. The operation and performance of the proposed converters are demonstrated with experimental converters that deliver a 12V/5A output from a 35–60 V input. The non-isolated converter recorded the maximum efficiency of 91 % at 1.5 A load current.
{"title":"New half-bridge dc-to-dc converters for wide input voltage applications","authors":"Hyosang Jang, Taeyoung Ahn, B. Choi","doi":"10.1109/INTLEC.2009.5351876","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351876","url":null,"abstract":"This paper presents new soft-switched half-bridge dc-to-dc converters intended for applications where the input voltage varies widely. The proposed converters are presented in both non-isolated form and isolated form. The proposed dc-to-dc converters operate with zero voltage switching characteristics for MOSFET switches. The duty ratio of the proposed converter could expand to 100 % and its voltage gain is twice the voltage gain of conventional half-bridge converters. Accordingly, the proposed converters are well suited for applications requiring high conversion efficiency at the presence of wide input voltage variations. The operation and performance of the proposed converters are demonstrated with experimental converters that deliver a 12V/5A output from a 35–60 V input. The non-isolated converter recorded the maximum efficiency of 91 % at 1.5 A load current.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128045905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5352028
W. Choi, Sung-Geun Song, Sung‐Jun Park, K. Kim, Y. Lim
A high efficiency photovoltaic (PV) module integrated converter (MIC) system is proposed. The proposed system consists of a high step-up dc-dc converter and a single-phase full-bridge inverter. The proposed step-up dc-dc converter has a high efficiency and low-profile. An input ripple current reduction control is suggested to reduce the low frequency ripple current generated by the full-bridge inverter. Overall power efficiency of 95 % was obtained at 260 W output power for 36 V PV voltage with ripple current within 3 % of the rated input current.
{"title":"Photovoltaic module integrated converter system minimizing input ripple current for inverter load","authors":"W. Choi, Sung-Geun Song, Sung‐Jun Park, K. Kim, Y. Lim","doi":"10.1109/INTLEC.2009.5352028","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5352028","url":null,"abstract":"A high efficiency photovoltaic (PV) module integrated converter (MIC) system is proposed. The proposed system consists of a high step-up dc-dc converter and a single-phase full-bridge inverter. The proposed step-up dc-dc converter has a high efficiency and low-profile. An input ripple current reduction control is suggested to reduce the low frequency ripple current generated by the full-bridge inverter. Overall power efficiency of 95 % was obtained at 260 W output power for 36 V PV voltage with ripple current within 3 % of the rated input current.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130682986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351975
C. N. Onwuchekwa, A. Kwasinski
Constant-power (CP) loads alter the conventional dynamic analysis of dc-dc converters. This paper examines boundary control strategies for dc-dc buck converters subject to constant-power loads. Boundary control addresses global system behavior and avoids the limitations of linearization. Converter dynamics is analyzed in both switching states and the various operating regions of switch interaction with a first-order switching surface (boundary) are identified. Sufficient conditions for large-signal stability of the closed loop system are established. It is also shown that in this application, instability as well as system-stalling, which we term the invariant-set problem, may still occur in reflective mode. Design considerations are included and recommendations are given. The theoretical analysis is verified by simulations and experimental results.
{"title":"Boundary control of buck converters with constant-power loads","authors":"C. N. Onwuchekwa, A. Kwasinski","doi":"10.1109/INTLEC.2009.5351975","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351975","url":null,"abstract":"Constant-power (CP) loads alter the conventional dynamic analysis of dc-dc converters. This paper examines boundary control strategies for dc-dc buck converters subject to constant-power loads. Boundary control addresses global system behavior and avoids the limitations of linearization. Converter dynamics is analyzed in both switching states and the various operating regions of switch interaction with a first-order switching surface (boundary) are identified. Sufficient conditions for large-signal stability of the closed loop system are established. It is also shown that in this application, instability as well as system-stalling, which we term the invariant-set problem, may still occur in reflective mode. Design considerations are included and recommendations are given. The theoretical analysis is verified by simulations and experimental results.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130162294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351927
Jong-Soo Kim, Gyu-Yeong Choe, Byoung-Kuk Lee, D. Oh, Jin-Wook Kim, Jae-Sun Shim
In this paper, in order to design an optimal power conditioning system (PCS) for fuel cell (FC) application, nonlinear and dynamic characteristics of fuel cell are modeled. And design considerations, such as power semiconductor switches, capacitor and inductor, for optimal design of FC-PCS are deduced form comparative analysis of ideal dc source and fuel cell characteristic model. And co-simulation of FC-PCS is then performed by using developed model with input condition of PCS. Through analysis and co-simulation results, optimal design methodology of PCS for fuel cell is provided.
{"title":"Optimal design methodology for FC-PCS using fuel cell simulator","authors":"Jong-Soo Kim, Gyu-Yeong Choe, Byoung-Kuk Lee, D. Oh, Jin-Wook Kim, Jae-Sun Shim","doi":"10.1109/INTLEC.2009.5351927","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351927","url":null,"abstract":"In this paper, in order to design an optimal power conditioning system (PCS) for fuel cell (FC) application, nonlinear and dynamic characteristics of fuel cell are modeled. And design considerations, such as power semiconductor switches, capacitor and inductor, for optimal design of FC-PCS are deduced form comparative analysis of ideal dc source and fuel cell characteristic model. And co-simulation of FC-PCS is then performed by using developed model with input condition of PCS. Through analysis and co-simulation results, optimal design methodology of PCS for fuel cell is provided.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121617331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351860
K. Orikawa, J. Itoh
This paper proposes a novel DC-DC converter for hybrid power supplies using both fuel cell and battery. The output voltage is controlled by a series converter that regulates only the differential voltage between the fuel cell voltage and the output voltage. Although the load condition is changed, the variation of the fuel cell current is suppressed by a battery through operation of the parallel converter. The experimental results confirmed that the proposed circuit could achieve maximum efficiency point of 98.8% in the small differential voltage region. In addition, the loss analysis clarified the relations among the ripple current of the inductors, the inductor voltage and the inductors losses. As a result, it is confirmed that the proposed circuit achieves the minimum loss of the copper loss and the iron loss in the inductors when the differential voltage is small.
{"title":"Loss evaluation of a series-parallel compensation DC-DC converter for a small fuel cell system","authors":"K. Orikawa, J. Itoh","doi":"10.1109/INTLEC.2009.5351860","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351860","url":null,"abstract":"This paper proposes a novel DC-DC converter for hybrid power supplies using both fuel cell and battery. The output voltage is controlled by a series converter that regulates only the differential voltage between the fuel cell voltage and the output voltage. Although the load condition is changed, the variation of the fuel cell current is suppressed by a battery through operation of the parallel converter. The experimental results confirmed that the proposed circuit could achieve maximum efficiency point of 98.8% in the small differential voltage region. In addition, the loss analysis clarified the relations among the ripple current of the inductors, the inductor voltage and the inductors losses. As a result, it is confirmed that the proposed circuit achieves the minimum loss of the copper loss and the iron loss in the inductors when the differential voltage is small.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125445494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351750
T. Harimoto, Hidemi Hayashi, K. Murata
The authors have devised a novel PWM control scheme capable of controlling a designated order harmonic while other low harmonic components are eliminated, based on the conventional low harmonic component elimination PWM control scheme. And it experimentally proved that the harmonic voltage in power systems could be suppressed, by means of controlling a self-commutated rectifier as a shunt active filter based on voltage detection.
{"title":"An investigation of method to reduce harmonic components in large-scale self-commutated inverter","authors":"T. Harimoto, Hidemi Hayashi, K. Murata","doi":"10.1109/INTLEC.2009.5351750","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351750","url":null,"abstract":"The authors have devised a novel PWM control scheme capable of controlling a designated order harmonic while other low harmonic components are eliminated, based on the conventional low harmonic component elimination PWM control scheme. And it experimentally proved that the harmonic voltage in power systems could be suppressed, by means of controlling a self-commutated rectifier as a shunt active filter based on voltage detection.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126216440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351833
M. Orabi
nowadays, manufacturers of power management integrated circuits (PMICs) are producing devices that integrate many of the functional blocks required in power supplies in single tiny chips. This paper highlights the circuit design considerations as a part of highly integrated, high switching frequency (few MHz range) PMICs optimized to be fabricated using CMOS fabrication technologies. Moreover, the effect of parasitic elements associated with integration of the driver and the power MOSFET gate parasitic elements on the performance of an integrated buck converter and its effect on the switching time and loss in power MOSFETs have been investigated. Finally, a driver has been tested using spice simulations to validate the theory and then experimental results have been presented.
{"title":"Circuit design considerations for integrated high switching frequency buck converter","authors":"M. Orabi","doi":"10.1109/INTLEC.2009.5351833","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351833","url":null,"abstract":"nowadays, manufacturers of power management integrated circuits (PMICs) are producing devices that integrate many of the functional blocks required in power supplies in single tiny chips. This paper highlights the circuit design considerations as a part of highly integrated, high switching frequency (few MHz range) PMICs optimized to be fabricated using CMOS fabrication technologies. Moreover, the effect of parasitic elements associated with integration of the driver and the power MOSFET gate parasitic elements on the performance of an integrated buck converter and its effect on the switching time and loss in power MOSFETs have been investigated. Finally, a driver has been tested using spice simulations to validate the theory and then experimental results have been presented.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133565677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5352096
Jun-Ho Lee, Hwa-chun Lee, Jun-Ho Choi, Sung‐Jun Park, Hae-Gon Nam
As the problem of final joining quality and environmental pollutants such as lead and toxic gases, the ultrasonic welding system is used increasingly in the industrial workspace. The ultrasonic welder is composed of the inverter, L-C filter for the mechanical oscillation to piezoelectric, booster and horn for amplification of mechanical displacement. Also the resonant frequency is changing by design of mechanical structure and characteristic of bonding material, therefore the PLL technique is required for controlling resonant frequency by digital controller. In this paper, inverter used 10kW full bridge and LC filter are simulated using PSIM software. Also, the hardware of ultrasonic welder and software for controlling resonant frequency are verified through the experiments.
{"title":"10kW industrial ultrasonic welder design","authors":"Jun-Ho Lee, Hwa-chun Lee, Jun-Ho Choi, Sung‐Jun Park, Hae-Gon Nam","doi":"10.1109/INTLEC.2009.5352096","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5352096","url":null,"abstract":"As the problem of final joining quality and environmental pollutants such as lead and toxic gases, the ultrasonic welding system is used increasingly in the industrial workspace. The ultrasonic welder is composed of the inverter, L-C filter for the mechanical oscillation to piezoelectric, booster and horn for amplification of mechanical displacement. Also the resonant frequency is changing by design of mechanical structure and characteristic of bonding material, therefore the PLL technique is required for controlling resonant frequency by digital controller. In this paper, inverter used 10kW full bridge and LC filter are simulated using PSIM software. Also, the hardware of ultrasonic welder and software for controlling resonant frequency are verified through the experiments.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133623266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351900
Jong-Ha Park, Hoon Kim, Heejun Kim
This paper presents a current-mode control non-inverting buck-boost converter. The proposed circuit is controlled by the current mode and operated in three operation modes which are buck, buck-boost, and boost mode. The operation mode is automatically determined by the ratio between the input and output voltages. The proposed circuit is simulated by HSPICE with 0.5 um standard CMOS parameters. Its input voltage range is 2.5–5 V, and the output voltage range is 1.5–5 V. The maximum efficiency is 92% when it operates in buck mode.
提出了一种电流型控制非反相降压-升压变换器。该电路由电流模式控制，并在降压、降压升压和升压三种工作模式下工作。工作模式由输入输出电压的比值自动确定。采用HSPICE对该电路进行了仿真，并采用0.5 um标准CMOS参数。其输入电压范围为2.5 V ~ 5v，输出电压范围为1.5 V ~ 5v。当它在降压模式下工作时，最高效率为92%。
{"title":"A current-mode non-inverting CMOS buck-boost DC-DC converter","authors":"Jong-Ha Park, Hoon Kim, Heejun Kim","doi":"10.1109/INTLEC.2009.5351900","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351900","url":null,"abstract":"This paper presents a current-mode control non-inverting buck-boost converter. The proposed circuit is controlled by the current mode and operated in three operation modes which are buck, buck-boost, and boost mode. The operation mode is automatically determined by the ratio between the input and output voltages. The proposed circuit is simulated by HSPICE with 0.5 um standard CMOS parameters. Its input voltage range is 2.5–5 V, and the output voltage range is 1.5–5 V. The maximum efficiency is 92% when it operates in buck mode.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128161812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-11DOI: 10.1109/INTLEC.2009.5351881
Won-cheol Lee, Bum-su Jun, Sanghun Park, Sang-seok Lee, C. Won
There are many increasing demands for efficient high power density of auxiliary power unit(APU) for high speed traction application. Many techniques have been proposed to measure the voltage flicker on the traditional pulse width modulation(PWM) inverter. This paper proposes a novel functionality of the static inverter on the APU to mitigate the voltage flicker and regulate the output voltage. A new control algorithm for the inverter based on the Hilbert transform(HT) is presented. The HT is employed as an effective technique for tracking the voltage flicker levels in APU systems. Simulation results are provided to verify the tracking capabilities of the HT and to evaluate the performance of the proposed DG interface for multi-function operation.
{"title":"A novel flicker mitigation method of auxiliary power unit for electric locomotive","authors":"Won-cheol Lee, Bum-su Jun, Sanghun Park, Sang-seok Lee, C. Won","doi":"10.1109/INTLEC.2009.5351881","DOIUrl":"https://doi.org/10.1109/INTLEC.2009.5351881","url":null,"abstract":"There are many increasing demands for efficient high power density of auxiliary power unit(APU) for high speed traction application. Many techniques have been proposed to measure the voltage flicker on the traditional pulse width modulation(PWM) inverter. This paper proposes a novel functionality of the static inverter on the APU to mitigate the voltage flicker and regulate the output voltage. A new control algorithm for the inverter based on the Hilbert transform(HT) is presented. The HT is employed as an effective technique for tracking the voltage flicker levels in APU systems. Simulation results are provided to verify the tracking capabilities of the HT and to evaluate the performance of the proposed DG interface for multi-function operation.","PeriodicalId":445164,"journal":{"name":"INTELEC 2009 - 31st International Telecommunications Energy Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134471767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：