Pub Date : 2005-08-01DOI: 10.1007/s11265-005-6249-z
Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen
{"title":"Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems","authors":"Po-Chih Tseng, Chao-Tsung Huang, Liang-Gee Chen","doi":"10.1007/s11265-005-6249-z","DOIUrl":"https://doi.org/10.1007/s11265-005-6249-z","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"16 1","pages":"35-47"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76457690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-08-01DOI: 10.1007/s11265-005-6246-2
Yen-kuang Chen, K. Wen, Chen-Yi Lee
{"title":"Guest Editorial: System-on-a-Chip for Multimedia Systems","authors":"Yen-kuang Chen, K. Wen, Chen-Yi Lee","doi":"10.1007/s11265-005-6246-2","DOIUrl":"https://doi.org/10.1007/s11265-005-6246-2","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"1 1","pages":"5-7"},"PeriodicalIF":0.0,"publicationDate":"2005-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79488549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-07-01DOI: 10.1007/s11265-005-5270-6
T. Darwish, M. Bayoumi
{"title":"Coefficient Elimination Algorithm for Low Energy Distributed Arithmetic DCT Architectures","authors":"T. Darwish, M. Bayoumi","doi":"10.1007/s11265-005-5270-6","DOIUrl":"https://doi.org/10.1007/s11265-005-5270-6","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"23 1","pages":"355-369"},"PeriodicalIF":0.0,"publicationDate":"2005-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86168440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-07-01DOI: 10.1007/s11265-005-5268-0
Mehboob Alam, Wael Badawy, V. Dimitrov, G. Jullien
{"title":"An Efficient Architecture for a Lifted 2D Biorthogonal DWT","authors":"Mehboob Alam, Wael Badawy, V. Dimitrov, G. Jullien","doi":"10.1007/s11265-005-5268-0","DOIUrl":"https://doi.org/10.1007/s11265-005-5268-0","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"88 1","pages":"335-342"},"PeriodicalIF":0.0,"publicationDate":"2005-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73850867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4964-0
A. Cheng, Rajat Agarwal
{"title":"Reducing Encoder Bit-Rate Variation in MPEG Video","authors":"A. Cheng, Rajat Agarwal","doi":"10.1007/s11265-005-4964-0","DOIUrl":"https://doi.org/10.1007/s11265-005-4964-0","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"48 1","pages":"261-271"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88353860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4961-3
R. G. Gironés, R. Colom-Palero, Joaquín Cerdá-Boluda, A. Sebastià-Cortés
{"title":"FPGA Implementation of a Pipelined On-Line Backpropagation","authors":"R. G. Gironés, R. Colom-Palero, Joaquín Cerdá-Boluda, A. Sebastià-Cortés","doi":"10.1007/s11265-005-4961-3","DOIUrl":"https://doi.org/10.1007/s11265-005-4961-3","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"101 1","pages":"189-213"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78014982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4963-1
Sangjin Hong, S. Chin
{"title":"Domain Specific Reconfigurable Processing Core Architecture for Digital Filtering Applications","authors":"Sangjin Hong, S. Chin","doi":"10.1007/s11265-005-4963-1","DOIUrl":"https://doi.org/10.1007/s11265-005-4963-1","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"17 1","pages":"239-259"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85075383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4960-4
Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen
{"title":"VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters","authors":"Chao-Tsung Huang, Po-Chih Tseng, Liang-Gee Chen","doi":"10.1007/s11265-005-4960-4","DOIUrl":"https://doi.org/10.1007/s11265-005-4960-4","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"1 1","pages":"175-188"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79900505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4959-x
Fan Xu, Guichang Zhong, A. Willson
{"title":"Analysis and VLSI Realization of a Blind Beamforming Algorithm","authors":"Fan Xu, Guichang Zhong, A. Willson","doi":"10.1007/s11265-005-4959-x","DOIUrl":"https://doi.org/10.1007/s11265-005-4959-x","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"19 1","pages":"159-174"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78884278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2005-06-01DOI: 10.1007/s11265-005-4962-2
Jarno K. Tanskanen, R. Creutzburg, J. Niittylahti
{"title":"On Design of Parallel Memory Access Schemes for Video Coding","authors":"Jarno K. Tanskanen, R. Creutzburg, J. Niittylahti","doi":"10.1007/s11265-005-4962-2","DOIUrl":"https://doi.org/10.1007/s11265-005-4962-2","url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"28 1","pages":"215-237"},"PeriodicalIF":0.0,"publicationDate":"2005-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83724859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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