Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3562109
Chris Mangelsdorf
The right half-plane (RHP) zero associated with Miller frequency compensation in feedback loops is well known. But much of what we've learned about it is incomplete, misleading and -occasionally- wrong. This column explores the fundamental nature of the RHP zero and the circuit techniques that have evolved to deal with it. Emphasis is on intuitive understanding of the phenomena, because it reveals the flaws that arise in a purely mathematical analysis.
{"title":"Miller’s Wrong Half-Plane Zero [Shop Talk: What you didn’t Learn in School]","authors":"Chris Mangelsdorf","doi":"10.1109/MSSC.2025.3562109","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3562109","url":null,"abstract":"The right half-plane (RHP) zero associated with Miller frequency compensation in feedback loops is well known. But much of what we've learned about it is incomplete, misleading and -occasionally- wrong. This column explores the fundamental nature of the RHP zero and the circuit techniques that have evolved to deal with it. Emphasis is on intuitive understanding of the phenomena, because it reveals the flaws that arise in a purely mathematical analysis.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"19-29"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3564026
Wanda Gass;Howard Luong
Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.
提供社会信息，可能包括新闻，评论或技术笔记，从业者和研究人员应该感兴趣。
{"title":"IEEE Fellow Program [IEEE News]","authors":"Wanda Gass;Howard Luong","doi":"10.1109/MSSC.2025.3564026","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3564026","url":null,"abstract":"Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"127-127"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11044957","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3563914
Kwantae Kim;Ben Keller
Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.
提供社会信息，可能包括新闻，评论或技术笔记，从业者和研究人员应该感兴趣。
{"title":"Women in Circuits Bingo Networking Event at ISSCC 2025 [Women in Circuits Corner]","authors":"Kwantae Kim;Ben Keller","doi":"10.1109/MSSC.2025.3563914","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3563914","url":null,"abstract":"Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"84-84"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11044963","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3564428
Hadil Khelifi
Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.
提供社会信息，可能包括新闻，评论或技术笔记，从业者和研究人员应该感兴趣。
{"title":"IEEE SSCS ENIS SBC Preuniversity Program: Igniting Passion for Electronics [Chapters]","authors":"Hadil Khelifi","doi":"10.1109/MSSC.2025.3564428","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3564428","url":null,"abstract":"Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"92-92"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11044949","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3549358
Yifan He;Xiaofeng Hu;Hongyang Jia;Jae-sun Seo
Compute-in-memory (CIM) has shown great potential in efficiently processing high-dimensional data over traditional von Neumann architectures, becoming a candidate computing fabric for next-generation AI. This has motivated the rapid development of CIM prototypes and deployments in different approaches, among which SRAM- and eDRAM-based CIM have drawn significant attention due to their flexibility and feasibility. At the time of a decade after the first CIM implementation, it is necessary to review the technical approaches and revisit the new findings behind complicated prototypes. Macro-level innovations such as precise current-based computation and deeply coupled algorithm-circuit co-optimization open up the headroom for efficiency vs. signal-to-noise ratio (SNR) tradeoffs in analog and digital CIM, respectively. Furthermore, diverse architectural configurations integrating CIM macros into systemon- chips have demonstrated scale-out of computing capacity. However, architectural integration of CIM still faces challenges from digital peripherals, memory reloading, and communication. These necessitate hardware-software co-designed mappings and, more importantly, comprehensive and fair evaluation frameworks.
{"title":"SRAM- and eDRAM-Based Compute-in-Memory Designs, Accelerators, and Evaluation Frameworks: Macro-Level and System-Level Optimization and Evaluation","authors":"Yifan He;Xiaofeng Hu;Hongyang Jia;Jae-sun Seo","doi":"10.1109/MSSC.2025.3549358","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3549358","url":null,"abstract":"Compute-in-memory (CIM) has shown great potential in efficiently processing high-dimensional data over traditional von Neumann architectures, becoming a candidate computing fabric for next-generation AI. This has motivated the rapid development of CIM prototypes and deployments in different approaches, among which SRAM- and eDRAM-based CIM have drawn significant attention due to their flexibility and feasibility. At the time of a decade after the first CIM implementation, it is necessary to review the technical approaches and revisit the new findings behind complicated prototypes. Macro-level innovations such as precise current-based computation and deeply coupled algorithm-circuit co-optimization open up the headroom for efficiency vs. signal-to-noise ratio (SNR) tradeoffs in analog and digital CIM, respectively. Furthermore, diverse architectural configurations integrating CIM macros into systemon- chips have demonstrated scale-out of computing capacity. However, architectural integration of CIM still faces challenges from digital peripherals, memory reloading, and communication. These necessitate hardware-software co-designed mappings and, more importantly, comprehensive and fair evaluation frameworks.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"39-48"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323200","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Digital machine learning (ML) accelerators are popular and widely used. We provide an overview of the SIMD and systolic array architectures that form the foundation of many accelerator designs. The demand for higher compute density, energy efficiency, and scalability has been increasing. To address these needs, new ML accelerator designs have adopted a range of techniques, including advanced architectural design, more efficient quantization, exploiting data-level sparsity, and leveraging new integration technologies. For each of these techniques, we review the common approaches, identify the design tradeoffs, and discuss their implications.
{"title":"Design and Optimization of Efficient Digital Machine Learning Accelerators: An overview of architecture choices, efficient quantization, sparsity exploration, and system integration techniques","authors":"Wei Tang;Sung-Gun Cho;Jie-Fang Zhang;Zhengya Zhang","doi":"10.1109/MSSC.2025.3549361","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3549361","url":null,"abstract":"Digital machine learning (ML) accelerators are popular and widely used. We provide an overview of the SIMD and systolic array architectures that form the foundation of many accelerator designs. The demand for higher compute density, energy efficiency, and scalability has been increasing. To address these needs, new ML accelerator designs have adopted a range of techniques, including advanced architectural design, more efficient quantization, exploiting data-level sparsity, and leveraging new integration technologies. For each of these techniques, we review the common approaches, identify the design tradeoffs, and discuss their implications.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"30-38"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3563742
Danielle Marinese
Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.
提供社会信息，可能包括新闻，评论或技术笔记，从业者和研究人员应该感兴趣。
{"title":"SSCS Winter 2025 AdCom Meeting [Society News]","authors":"Danielle Marinese","doi":"10.1109/MSSC.2025.3563742","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3563742","url":null,"abstract":"Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"79-79"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11044961","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3549709
Man Shi;Adrian Kneip;Nicolas Chauvaux;Jiacong Sun;Charlotte Frenkel;Marian Verhelst
As artificial intelligence (AI) continues to transform multiple sectors, its exponential growth in computational demands presents significant challenges for hardware infrastructure. This article examines sparsity, the prevalence of zeros in AI workloads, as a promising approach to address these challenges. While sparsity offers potential efficiency gains, its practical implementation requires careful consideration of hardware constraints and computational overheads. Therefore, this article cooperates with a virtual performance roofline model to analyze various sparsity techniques and their associated tradeoffs, aiming to bridge the gap between theoretical potential and practical implementation in AI accelerator design.
{"title":"Sparsity-Aware Hardware: From Overheads to Performance Benefits","authors":"Man Shi;Adrian Kneip;Nicolas Chauvaux;Jiacong Sun;Charlotte Frenkel;Marian Verhelst","doi":"10.1109/MSSC.2025.3549709","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3549709","url":null,"abstract":"As artificial intelligence (AI) continues to transform multiple sectors, its exponential growth in computational demands presents significant challenges for hardware infrastructure. This article examines sparsity, the prevalence of zeros in AI workloads, as a promising approach to address these challenges. While sparsity offers potential efficiency gains, its practical implementation requires careful consideration of hardware constraints and computational overheads. Therefore, this article cooperates with a virtual performance roofline model to analyze various sparsity techniques and their associated tradeoffs, aiming to bridge the gap between theoretical potential and practical implementation in AI accelerator design.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"61-71"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144323247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-06-19DOI: 10.1109/MSSC.2025.3564080
Danielle Marinese
Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.
提供社会信息，可能包括新闻，评论或技术笔记，从业者和研究人员应该感兴趣。
{"title":"Michiel S. J. Steyaert Receives the 2025 IEEE Donald O. Pederson Award in Solid-State Circuits [Awards]","authors":"Danielle Marinese","doi":"10.1109/MSSC.2025.3564080","DOIUrl":"https://doi.org/10.1109/MSSC.2025.3564080","url":null,"abstract":"Provides society information that may include news, reviews or technical notes that should be of interest to practitioners and researchers.","PeriodicalId":100636,"journal":{"name":"IEEE Solid-State Circuits Magazine","volume":"17 2","pages":"104-104"},"PeriodicalIF":0.0,"publicationDate":"2025-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11044936","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144322961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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