Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191907
K. Pandiaraj, P. Sivakumar, N. Geetharamani
In Three Dimensional Integration Circuit (3D IC) challenges involved in removing heat from the intervening layers. Here, the thermal analysis of TTSVs (Thermal Through Silicon Vias) at the heat sink of the circuit and also the optimizations of corresponding heat sinks has been carried out using Genetic algorithm (GA) with IBM-route benchmark circuits as a inputs. Compared to the previous experimental results, the thermal aware between the routing layers in 3D IC has been reduced to a certain extent using this algorithmic approach. Our approach is achieves 7%.
在三维集成电路(3D IC)的挑战涉及到从中间层去除热量。本文以ibm路由基准电路为输入，采用遗传算法(GA)对电路散热器处的TTSVs (thermal Through Silicon Vias)进行了热分析，并对相应的散热器进行了优化。与以往的实验结果相比，该算法在一定程度上降低了三维集成电路中路由层之间的热感知。我们的目标是达到7%。
{"title":"Reduction of temperature rise in 3D IC routing","authors":"K. Pandiaraj, P. Sivakumar, N. Geetharamani","doi":"10.1109/ICEICE.2017.8191907","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191907","url":null,"abstract":"In Three Dimensional Integration Circuit (3D IC) challenges involved in removing heat from the intervening layers. Here, the thermal analysis of TTSVs (Thermal Through Silicon Vias) at the heat sink of the circuit and also the optimizations of corresponding heat sinks has been carried out using Genetic algorithm (GA) with IBM-route benchmark circuits as a inputs. Compared to the previous experimental results, the thermal aware between the routing layers in 3D IC has been reduced to a certain extent using this algorithmic approach. Our approach is achieves 7%.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130174298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191911
Priti Gite, A. S. Sindekar
Sweep Frequency Response Analysis (SFRA) is a demonstrated control for investigating the mechanical integrity such as core and bulk winding deformations, open circuit and short circuit, radial and axial buckling etc. A change in frequency response as measured by SFRA technique indicates a good graphical interpretation can give the exact location of fault inside the transformer.
{"title":"Investigating mechanical integrity in power transformer using sweep frequency response analysis (SFRA)","authors":"Priti Gite, A. S. Sindekar","doi":"10.1109/ICEICE.2017.8191911","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191911","url":null,"abstract":"Sweep Frequency Response Analysis (SFRA) is a demonstrated control for investigating the mechanical integrity such as core and bulk winding deformations, open circuit and short circuit, radial and axial buckling etc. A change in frequency response as measured by SFRA technique indicates a good graphical interpretation can give the exact location of fault inside the transformer.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133945186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191914
S. Punitha, K. Sundararaju
In planning and security evaluation of power systems voltage stability correction or an improvement is a worthwhile issue. In current scenario the power utilization of the customers have been incremented drastically because of this nowadays the power system are running at massively strained out situation with decreased stability margins, the voltage stability improvement have a great attention in power system. Here this research developed a Voltage Stability Constraint — Optimal Power Flow (VSC-OPF) algorithm to improve the voltage stability and reduction in losses of system. Also the proximity value of all transmission lines and load buses are calculated using the VCPI indicator. The VCPI index is combined with the OPF formulation is in given two ways; (a) in OPF constraint it can be added as a new voltage stability constraint, or (b) used as the objective function of voltage stability. The standard IEEE 30 bus system has been used to evaluate the projected method. The obtained results from simulation are able to explain the efficacy of the Voltage Stability Constrained-Optimal Power Flow based on the line voltage stability index. The results are verified through coding using MATLAB SOFTWARE.
{"title":"Voltage stability improvement in power system using optimal power flow with constraints","authors":"S. Punitha, K. Sundararaju","doi":"10.1109/ICEICE.2017.8191914","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191914","url":null,"abstract":"In planning and security evaluation of power systems voltage stability correction or an improvement is a worthwhile issue. In current scenario the power utilization of the customers have been incremented drastically because of this nowadays the power system are running at massively strained out situation with decreased stability margins, the voltage stability improvement have a great attention in power system. Here this research developed a Voltage Stability Constraint — Optimal Power Flow (VSC-OPF) algorithm to improve the voltage stability and reduction in losses of system. Also the proximity value of all transmission lines and load buses are calculated using the VCPI indicator. The VCPI index is combined with the OPF formulation is in given two ways; (a) in OPF constraint it can be added as a new voltage stability constraint, or (b) used as the objective function of voltage stability. The standard IEEE 30 bus system has been used to evaluate the projected method. The obtained results from simulation are able to explain the efficacy of the Voltage Stability Constrained-Optimal Power Flow based on the line voltage stability index. The results are verified through coding using MATLAB SOFTWARE.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134262492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191843
Akhib Khan Bahamani, G. M. S. Reddy, V. Ganesh
UPFC and DPFC are two important devices for power quality improvement. These FACTs devices are generally used between sending end and receiving end. This paper deals with comparison of UPFC & DPFC systems operating at same load and same sending voltage. A basic two bus system with UPFC is modelled and simulated. Basic DPFC system with multiple DVRs is also modelled and simulated. The results are compared in terms of real power, reactive power and THD. The result of comparison indicates that two bus system with DPFC gives better performance when compared to two bus system with UPFC.
{"title":"Comparative of performance for UPFC with DPFC","authors":"Akhib Khan Bahamani, G. M. S. Reddy, V. Ganesh","doi":"10.1109/ICEICE.2017.8191843","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191843","url":null,"abstract":"UPFC and DPFC are two important devices for power quality improvement. These FACTs devices are generally used between sending end and receiving end. This paper deals with comparison of UPFC & DPFC systems operating at same load and same sending voltage. A basic two bus system with UPFC is modelled and simulated. Basic DPFC system with multiple DVRs is also modelled and simulated. The results are compared in terms of real power, reactive power and THD. The result of comparison indicates that two bus system with DPFC gives better performance when compared to two bus system with UPFC.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130941625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191872
R. Bharathi, T. E. Santhia, P. Karthikeyan
The down-scaling of regular MOSFETs has prompted a looming power emergency, in which static power utilization is ending up noticeably too high. Keeping in mind the end goal to enhance the vitality productivity of electronic circuits, little swing switches are intriguing contender to supplant or supplement the MOSFETs utilized today. TFETs, which are gated p-i-n diodes whose on-current rises up out of band-to-band burrowing, are engaging new devices for low-control applications due to their low off-current and their potential for a little subthreshold swing. Aside from every one of these points of interest TFET experiences low ON current. So to enhance this low ON current many gate engineering structures have been proposed. This paper clarifies every one of the strategies which are utilized till now and furthermore clarifies device structure and execution assessment.
{"title":"Ultra low consumption device for future electronics-tunnel field effect transistor : A survey","authors":"R. Bharathi, T. E. Santhia, P. Karthikeyan","doi":"10.1109/ICEICE.2017.8191872","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191872","url":null,"abstract":"The down-scaling of regular MOSFETs has prompted a looming power emergency, in which static power utilization is ending up noticeably too high. Keeping in mind the end goal to enhance the vitality productivity of electronic circuits, little swing switches are intriguing contender to supplant or supplement the MOSFETs utilized today. TFETs, which are gated p-i-n diodes whose on-current rises up out of band-to-band burrowing, are engaging new devices for low-control applications due to their low off-current and their potential for a little subthreshold swing. Aside from every one of these points of interest TFET experiences low ON current. So to enhance this low ON current many gate engineering structures have been proposed. This paper clarifies every one of the strategies which are utilized till now and furthermore clarifies device structure and execution assessment.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133299824","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191864
T. Thenmozhi, E. Kumar, R. M. Kumar, Dinesh Pothugunta, S. Harish.
A smart grid is an evolved grid system that manages electricity demand in a sustainable, reliable and economic manner, built on advanced infrastructure and tuned to facilitate the integration of all involved. The smart grid is the future for electrical systems. To maintain the voltage throughout the day, the variation of load is the main criteria. It is more in the peak hours, medium in the rest of the hours and less in the midnight to early morning. This variation is due to the industrial and residential load patterns. This paper mainly focused on distribution of quality of power. The main criteria required for all the devices are the rated voltage. It plays vital role in power quality. In this paper, it is planned to provide a transformer with multiple taps and selecting the taps required for the moment will be automatically selected by the on-load tap changeover system which is operated by the controller. Here, voltage transducers are used to sense the change in voltages, ADC will convert the analog signals into digital signals. These digital signals are interfaced with computer which in turn operates the on-load tap changers. Suitable taps are selected and its driver relays are operated by the computer through optocoupler and switching transistors. In this paper a computer acts as a controller with the aid of the C software.
{"title":"Power quality in a smart grid distribution system using automatic OLTC","authors":"T. Thenmozhi, E. Kumar, R. M. Kumar, Dinesh Pothugunta, S. Harish.","doi":"10.1109/ICEICE.2017.8191864","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191864","url":null,"abstract":"A smart grid is an evolved grid system that manages electricity demand in a sustainable, reliable and economic manner, built on advanced infrastructure and tuned to facilitate the integration of all involved. The smart grid is the future for electrical systems. To maintain the voltage throughout the day, the variation of load is the main criteria. It is more in the peak hours, medium in the rest of the hours and less in the midnight to early morning. This variation is due to the industrial and residential load patterns. This paper mainly focused on distribution of quality of power. The main criteria required for all the devices are the rated voltage. It plays vital role in power quality. In this paper, it is planned to provide a transformer with multiple taps and selecting the taps required for the moment will be automatically selected by the on-load tap changeover system which is operated by the controller. Here, voltage transducers are used to sense the change in voltages, ADC will convert the analog signals into digital signals. These digital signals are interfaced with computer which in turn operates the on-load tap changers. Suitable taps are selected and its driver relays are operated by the computer through optocoupler and switching transistors. In this paper a computer acts as a controller with the aid of the C software.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123605636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191848
C. Ananthi, B. Kannapiran
Solar Photovoltaic system plays an important role in power generation system. The output power produced in the photovoltaic modules relies on upon solar radiation and temperature of the solar cells. In this paper an utilization of sliding mode control technique is connected to track maximum power of photovoltaic cells. This usage depends on grid connected dc to dc switching converter. This is typically connected between the PV modules and the inverter. In this control framework, it is important to measure the PV array output power and to change the duty cycle of the DC/DC converter control signal. This PV converter is controlled by enhanced designing technique of sliding mode controller which drives the PV voltage with reference of an external MPPT algorithm. To test the robustness of this control, we compared the results obtained from the Perturb and Observe (P&O) technique with the proposed incremental conductance (InC) method. Obtained results show an improved performance of InC algorithm with sliding mode control strategy under various parameter conditions.
{"title":"Improved design of sliding-mode controller based on the incremental conductance MPPT algorithm for PV applications","authors":"C. Ananthi, B. Kannapiran","doi":"10.1109/ICEICE.2017.8191848","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191848","url":null,"abstract":"Solar Photovoltaic system plays an important role in power generation system. The output power produced in the photovoltaic modules relies on upon solar radiation and temperature of the solar cells. In this paper an utilization of sliding mode control technique is connected to track maximum power of photovoltaic cells. This usage depends on grid connected dc to dc switching converter. This is typically connected between the PV modules and the inverter. In this control framework, it is important to measure the PV array output power and to change the duty cycle of the DC/DC converter control signal. This PV converter is controlled by enhanced designing technique of sliding mode controller which drives the PV voltage with reference of an external MPPT algorithm. To test the robustness of this control, we compared the results obtained from the Perturb and Observe (P&O) technique with the proposed incremental conductance (InC) method. Obtained results show an improved performance of InC algorithm with sliding mode control strategy under various parameter conditions.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125102828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191915
R. Krishnamoorthy, S. Durgadevi, S. Maheshwari
Carry Select Adder (CSA) architectures are proposed using parallel prefix adders. Instead of using dual Ripple Carry Adders (RCA), parallel prefix adder Brent Kung (BK) adder is used to design Regular Linear CSA. Carry Select Adder is a compromise between RCA and CLA in term of area and delay. Delay of RCA is large therefore we have replaced it with parallel prefix adder which gives fast results. In this system, structures of 16-Bit Regular Linear Brent Kung CSA, Modified Linear BK CSA, Regular Square Root (SQRT) BK CSA and Modified SQRT BK CSA are designed. These adder architectures are calculated at different input voltages.
提出了采用并行前缀加法器的进位选择加法器(CSA)结构。采用并行前缀加法器Brent Kung (BK)加法器代替双纹波进位加法器(RCA)来设计正则线性CSA。进位选择加法器是RCA和CLA在面积和时延方面的折衷方案。由于RCA的延迟较大，因此我们采用并行前缀加法器来代替它，从而获得快速的结果。在该系统中，设计了16位正则线性Brent Kung CSA、修正线性BK CSA、正则平方根(SQRT) BK CSA和修正SQRT BK CSA结构。这些加法器架构是在不同的输入电压下计算的。
{"title":"Area and delay carry select adder using Brent Kung architecture","authors":"R. Krishnamoorthy, S. Durgadevi, S. Maheshwari","doi":"10.1109/ICEICE.2017.8191915","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191915","url":null,"abstract":"Carry Select Adder (CSA) architectures are proposed using parallel prefix adders. Instead of using dual Ripple Carry Adders (RCA), parallel prefix adder Brent Kung (BK) adder is used to design Regular Linear CSA. Carry Select Adder is a compromise between RCA and CLA in term of area and delay. Delay of RCA is large therefore we have replaced it with parallel prefix adder which gives fast results. In this system, structures of 16-Bit Regular Linear Brent Kung CSA, Modified Linear BK CSA, Regular Square Root (SQRT) BK CSA and Modified SQRT BK CSA are designed. These adder architectures are calculated at different input voltages.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116176887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8191910
M. Harini, K. P. Gowri, C. Pavithra, M. Pradhiba Selvarani
Data security is a primary concern for every communication system. Communication becomes an essential tool for any business, education, defense services etc. It is essential to transfer data safe and secure. At present, various cryptography algorithms have been proposed and implemented. Those algorithms are classified into symmetric and asymmetric algorithms based on the number of keys used. Even though several algorithms are used for data security, they are compromise the security at the certain period. Now the idea is to combine the several secure algorithms to provide a highly secure environment for data transmission. The algorithms that are going to be combined are AES symmetric cryptographic algorithm, RSA asymmetric algorithm and MD5 hashing algorithm. With these three algorithms, we can ensure three cryptography primitives confidentiality, authentication and integrity of data.
{"title":"A novel security mechanism using hybrid cryptography algorithms","authors":"M. Harini, K. P. Gowri, C. Pavithra, M. Pradhiba Selvarani","doi":"10.1109/ICEICE.2017.8191910","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8191910","url":null,"abstract":"Data security is a primary concern for every communication system. Communication becomes an essential tool for any business, education, defense services etc. It is essential to transfer data safe and secure. At present, various cryptography algorithms have been proposed and implemented. Those algorithms are classified into symmetric and asymmetric algorithms based on the number of keys used. Even though several algorithms are used for data security, they are compromise the security at the certain period. Now the idea is to combine the several secure algorithms to provide a highly secure environment for data transmission. The algorithms that are going to be combined are AES symmetric cryptographic algorithm, RSA asymmetric algorithm and MD5 hashing algorithm. With these three algorithms, we can ensure three cryptography primitives confidentiality, authentication and integrity of data.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129827160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/ICEICE.2017.8192448
P. Vijayabaskaran, A. Nivedha, G. Nivedha, D. Elodie
Picking right product from the right place in a cost-effective way is a prime moto behind running online shopping business. Online shopping portal offer a better platform for promoting most of traditional or conventional products. This online platform relies on the principle of nearest location determination of products which provides services in a quick and reliable manner. In this process, there exists mechanism such as j48 and c4.5 algorithm. The objective of this article is to discuss the nearest location determination algorithm and its scopes. Further the article deliver the opportunity and effectiveness of these algorithm in various traditional product or business promotion.
{"title":"A survey on nearest location determination using c4.5 algorithm","authors":"P. Vijayabaskaran, A. Nivedha, G. Nivedha, D. Elodie","doi":"10.1109/ICEICE.2017.8192448","DOIUrl":"https://doi.org/10.1109/ICEICE.2017.8192448","url":null,"abstract":"Picking right product from the right place in a cost-effective way is a prime moto behind running online shopping business. Online shopping portal offer a better platform for promoting most of traditional or conventional products. This online platform relies on the principle of nearest location determination of products which provides services in a quick and reliable manner. In this process, there exists mechanism such as j48 and c4.5 algorithm. The objective of this article is to discuss the nearest location determination algorithm and its scopes. Further the article deliver the opportunity and effectiveness of these algorithm in various traditional product or business promotion.","PeriodicalId":110529,"journal":{"name":"2017 IEEE International Conference on Electrical, Instrumentation and Communication Engineering (ICEICE)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130380811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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