Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341394
J. Serrano, J. Acero, I. Lope, C. Carretero, J. Burdío
Printed circuit board technology provides a cost constrained manufacturing option for low profile inductors due to its highly standardized process, however, the transferred power is limited by the losses in the winding, which may produce overheating. In this work, PCB inductors are evaluated for a high power application as domestic induction heating appliances. Moreover, in the seek of flexible cooking surfaces which can adapt to the size and shape of the pot, the use of partially overlapped inductors generating coil arrays is considered. The work includes the analysis of the coupling between overlapped coils when placed under a dissipative material, a study of the losses in the winding considering rectangular cross section conductors and presents the main implementation techniques. The method is employed for the design of a prototype which was tested under real working conditions delivering up to 4.2 kW.
{"title":"High power density PCB coil array applied to domestic induction heating appliances","authors":"J. Serrano, J. Acero, I. Lope, C. Carretero, J. Burdío","doi":"10.1109/APEC.2018.8341394","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341394","url":null,"abstract":"Printed circuit board technology provides a cost constrained manufacturing option for low profile inductors due to its highly standardized process, however, the transferred power is limited by the losses in the winding, which may produce overheating. In this work, PCB inductors are evaluated for a high power application as domestic induction heating appliances. Moreover, in the seek of flexible cooking surfaces which can adapt to the size and shape of the pot, the use of partially overlapped inductors generating coil arrays is considered. The work includes the analysis of the coupling between overlapped coils when placed under a dissipative material, a study of the losses in the winding considering rectangular cross section conductors and presents the main implementation techniques. The method is employed for the design of a prototype which was tested under real working conditions delivering up to 4.2 kW.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123564772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341108
T. Saha, Hongjie Wang, B. Riar, R. Zane
With a constant current dc power distribution system, the input voltage of each series connected power converter module varies with the load. Achieving zero voltage switching (ZVS) for the converter using passive techniques becomes a challenging and difficult task with the wide variation in the load that also changes the input voltage. Therefore, an active assisting method that adapts to the varying input voltage is needed for achieving ZVS with good efficiency over the load range. Traditional active ZVS assistance techniques either operates with higher rms currents in the main switches and the ZVS assisting branch, which further result in higher conduction losses, or result in hard switching of assisting switches, which result in high EMI due to high dv/dt, at full DC bus voltage. In this paper, an active ZVS assisting circuit is proposed which operates with low rms currents in the assisting branch with lower EMIs due to dv/dt in the assisting branch. The proposed technique is experimentally verified through testing of a series resonant converter whose input is connected to a 1 A current source and output current is regulated at 0.33 A for a full load of 250 W, operating at a switching frequency of 250 kHz.
{"title":"An improved active zero voltage switching assisting circuit with lower dv/dt for DC-DC series resonant converter with constant input current","authors":"T. Saha, Hongjie Wang, B. Riar, R. Zane","doi":"10.1109/APEC.2018.8341108","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341108","url":null,"abstract":"With a constant current dc power distribution system, the input voltage of each series connected power converter module varies with the load. Achieving zero voltage switching (ZVS) for the converter using passive techniques becomes a challenging and difficult task with the wide variation in the load that also changes the input voltage. Therefore, an active assisting method that adapts to the varying input voltage is needed for achieving ZVS with good efficiency over the load range. Traditional active ZVS assistance techniques either operates with higher rms currents in the main switches and the ZVS assisting branch, which further result in higher conduction losses, or result in hard switching of assisting switches, which result in high EMI due to high dv/dt, at full DC bus voltage. In this paper, an active ZVS assisting circuit is proposed which operates with low rms currents in the assisting branch with lower EMIs due to dv/dt in the assisting branch. The proposed technique is experimentally verified through testing of a series resonant converter whose input is connected to a 1 A current source and output current is regulated at 0.33 A for a full load of 250 W, operating at a switching frequency of 250 kHz.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122169520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341147
S. Adami, Guang Yang, Chunhong Zhang, P. Proynov, B. Stark
An RF energy harvesting circuit is usually designed to maximise efficiency and therefore output power, while a passive wake-up radio is usually optimised for a high open-circuit output voltage resulting in high sensitivity. These two functions have conflicting design requirements, but are generally both needed in Internet-of-Things devices. This paper presents a new approach to holding almost the entire system fully powered down whilst listening, whilst also obtaining an effective wake-up and energy harvesting circuit using the same rectenna (rectifying antenna). The topology uses a rectenna that is optimised for efficiency, and two signal detector circuits that draw up to 3.5 nA from the battery. One detector is configured to trigger at 85 mV, to start up the boost converter when enough power is available to obtain netpositive energy harvesting. The other detector is set to be more sensitive, to wake up subsystems when the rectenna output reaches 10 mV. The detector architecture and transistor-level design are presented, and the detection threshold and power levels experimentally verified. The circuit draws 10 nW at a sensitivity of 10 mV, and 3.9 nW at 85 mV. This detection system is the first reported circuit with a configurable detection threshold that draws only nW from the battery, and that, in addition to RF signals, can be used with any transient signals, such as outputs from piezoelectric sensors, microphones, or energy harvesters that produce in excess of around 10 mV. The low power consumption of this circuit is largely due to use of the UB20M voltage detector, whose internal on-demand voltage reference generator is also reported here. It has the lowest reported standby current of 2 pA, and a sub-microsecond-scale turn-on response time.
{"title":"A 10 nW, 10 mV signal detector using a 2 pA standby voltage reference, for always-on sensors and receivers","authors":"S. Adami, Guang Yang, Chunhong Zhang, P. Proynov, B. Stark","doi":"10.1109/APEC.2018.8341147","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341147","url":null,"abstract":"An RF energy harvesting circuit is usually designed to maximise efficiency and therefore output power, while a passive wake-up radio is usually optimised for a high open-circuit output voltage resulting in high sensitivity. These two functions have conflicting design requirements, but are generally both needed in Internet-of-Things devices. This paper presents a new approach to holding almost the entire system fully powered down whilst listening, whilst also obtaining an effective wake-up and energy harvesting circuit using the same rectenna (rectifying antenna). The topology uses a rectenna that is optimised for efficiency, and two signal detector circuits that draw up to 3.5 nA from the battery. One detector is configured to trigger at 85 mV, to start up the boost converter when enough power is available to obtain netpositive energy harvesting. The other detector is set to be more sensitive, to wake up subsystems when the rectenna output reaches 10 mV. The detector architecture and transistor-level design are presented, and the detection threshold and power levels experimentally verified. The circuit draws 10 nW at a sensitivity of 10 mV, and 3.9 nW at 85 mV. This detection system is the first reported circuit with a configurable detection threshold that draws only nW from the battery, and that, in addition to RF signals, can be used with any transient signals, such as outputs from piezoelectric sensors, microphones, or energy harvesters that produce in excess of around 10 mV. The low power consumption of this circuit is largely due to use of the UB20M voltage detector, whose internal on-demand voltage reference generator is also reported here. It has the lowest reported standby current of 2 pA, and a sub-microsecond-scale turn-on response time.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128542124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341197
Dingyi He, B. Fahimi
This paper proposes a power management system for a self-powered wireless sensor that is designed for health monitoring of electric machines through analysis of the recorded vibration and temperature. Implementation of Internet of Things permits use of the monitoring methods based on machine learning and artificial-intelligence (AI). In order to accommodate a versatile and feasible implementation of such monitoring system, a self-powered multi-sensor wireless platform is desired. The proposed power management is based on an analog realization, which has low power consumption and by the virtue of the device multiplexing (i.e. energy harvesting and sensing) technology reduces the cost. A simple and effective control method is introduced and experimental results illustrating a monitoring time of the sensor of 19 seconds is captured.
{"title":"Power management of a self-powered multi-parameter wireless sensor for IoT application","authors":"Dingyi He, B. Fahimi","doi":"10.1109/APEC.2018.8341197","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341197","url":null,"abstract":"This paper proposes a power management system for a self-powered wireless sensor that is designed for health monitoring of electric machines through analysis of the recorded vibration and temperature. Implementation of Internet of Things permits use of the monitoring methods based on machine learning and artificial-intelligence (AI). In order to accommodate a versatile and feasible implementation of such monitoring system, a self-powered multi-sensor wireless platform is desired. The proposed power management is based on an analog realization, which has low power consumption and by the virtue of the device multiplexing (i.e. energy harvesting and sensing) technology reduces the cost. A simple and effective control method is introduced and experimental results illustrating a monitoring time of the sensor of 19 seconds is captured.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128613632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341192
Mostak Mohammad, Seungdeog Choi
In this paper, an optimized core structure is proposed for the double-D (DD) power pad to reduce its core loss in a wireless charging system for Electric and Plug-in Hybrid Electric Vehicle (EV/PHEV) application. At around 85 kHz operating frequency, the core loss is found to be one of the most significant loss in typical wireless charging system of high power application. The core loss in power ferrite mainly depends on the operating frequency and magnetic field density in the core. The frequency is usaully fixed for certain appication, therefore, the magnetic field density in the core is be to optimized to reduce the loss. The magnetic field density in core of a double-D (DD) pad has very different pattern compared to unpolar pad; therefore traditional bar or plate core does not provide the optimum performance considering core loss. In this paper, an optimized core structure is proposed to make the flux density uniform in the core and minimize its loss. The proposed optimized model is simulated in finite element analysis (FEA), and compared with traditional flat type core. Finally, the proposed model is verified through a 3.2kW wireless Double-D (DD) type wireless charging pad.
{"title":"Optimization of ferrite core to reduce the core loss in double-D pad of wireless charging system for electric vehicles","authors":"Mostak Mohammad, Seungdeog Choi","doi":"10.1109/APEC.2018.8341192","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341192","url":null,"abstract":"In this paper, an optimized core structure is proposed for the double-D (DD) power pad to reduce its core loss in a wireless charging system for Electric and Plug-in Hybrid Electric Vehicle (EV/PHEV) application. At around 85 kHz operating frequency, the core loss is found to be one of the most significant loss in typical wireless charging system of high power application. The core loss in power ferrite mainly depends on the operating frequency and magnetic field density in the core. The frequency is usaully fixed for certain appication, therefore, the magnetic field density in the core is be to optimized to reduce the loss. The magnetic field density in core of a double-D (DD) pad has very different pattern compared to unpolar pad; therefore traditional bar or plate core does not provide the optimum performance considering core loss. In this paper, an optimized core structure is proposed to make the flux density uniform in the core and minimize its loss. The proposed optimized model is simulated in finite element analysis (FEA), and compared with traditional flat type core. Finally, the proposed model is verified through a 3.2kW wireless Double-D (DD) type wireless charging pad.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124972668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341181
Ze Ni, Yanchao Li, X. Lyu, O. Yadav, Dong Cao
This paper presents a new indicator of SiC MOSFET gate oxide degradation based on Miller plateau. The physical mechanism of Miller plateau shift with gate oxide electric field is first analyzed. The relationship between Miller plateau and ambient temperature is then explored by theoretical analysis. The electro-thermal simulation is conducted in LTSpice to verify the Miller plateau shift with ambient temperature. Besides, 20 groups of High Electric Field (HEF) acceleration tests are conducted with Vgs stress amplitude of 25 V, 30V, 35V, 40V and stress duration of 10, 40, 70, 85, 100 hours. 5 SCT2120AF SiC MOSEFTs from Rohm are stressed in each group. After ageing tests, the stressed devices are used to verify dynamic characteristic change in the designed double pulse test platform. After 100-hour HEF tests with 40V Vgs stress, Miller plateau shift can reach up to 1.5V. Finally, comparison is made among Miller plateau, threshold voltage and gate resistor turn-on energy. Analysis shows that Miller plateau can be used as an indicator of SiC MOSFET gate oxide degradation with detectable amplitude shift as well as inherent gate driver integration and online monitoring characteristics.
本文提出了一种基于米勒高原的SiC MOSFET栅极氧化物降解的新指标。首先分析了栅极氧化电场作用下米勒高原位移的物理机理。通过理论分析探讨了米勒高原与环境温度的关系。在LTSpice中进行了电热模拟，以验证米勒高原随环境温度的位移。此外，进行了20组高电场(HEF)加速试验，Vgs应力幅值分别为25 V、30V、35V、40V，应力持续时间分别为10、40、70、85、100小时。每组强调罗姆公司的5个SCT2120AF SiC moseet。经过老化试验，在设计的双脉冲试验台上对受力装置的动态特性变化进行了验证。在40V Vgs应力下进行100小时HEF测试，米勒平台位移可达1.5V。最后对米勒平台、阈值电压和栅极电阻导通能量进行了比较。分析表明，米勒平台可以作为SiC MOSFET栅极氧化物降解的指标，具有可检测的幅移以及固有的栅极驱动器集成和在线监测特性。
{"title":"Miller plateau as an indicator of SiC MOSFET gate oxide degradation","authors":"Ze Ni, Yanchao Li, X. Lyu, O. Yadav, Dong Cao","doi":"10.1109/APEC.2018.8341181","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341181","url":null,"abstract":"This paper presents a new indicator of SiC MOSFET gate oxide degradation based on Miller plateau. The physical mechanism of Miller plateau shift with gate oxide electric field is first analyzed. The relationship between Miller plateau and ambient temperature is then explored by theoretical analysis. The electro-thermal simulation is conducted in LTSpice to verify the Miller plateau shift with ambient temperature. Besides, 20 groups of High Electric Field (HEF) acceleration tests are conducted with Vgs stress amplitude of 25 V, 30V, 35V, 40V and stress duration of 10, 40, 70, 85, 100 hours. 5 SCT2120AF SiC MOSEFTs from Rohm are stressed in each group. After ageing tests, the stressed devices are used to verify dynamic characteristic change in the designed double pulse test platform. After 100-hour HEF tests with 40V Vgs stress, Miller plateau shift can reach up to 1.5V. Finally, comparison is made among Miller plateau, threshold voltage and gate resistor turn-on energy. Analysis shows that Miller plateau can be used as an indicator of SiC MOSFET gate oxide degradation with detectable amplitude shift as well as inherent gate driver integration and online monitoring characteristics.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129693074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341408
B. Zojer
It is well known that in fast-and hard-switching power systems the switching transients are essentially influenced by a common source inductance LSc, i.e. any inductance common to gate and power loop. Particularly for Superjunction (SJ) MOSFETs without Kelvin source connection significantly increased switching losses and a strong oscillation tendency may result. In this paper two different LSc-related effects associated with “on” and “off” switching are identified, and their dependence on transistor parameters (transconductance, nonlinear capacitances) is analyzed. A new technique based on an inductive rather than resistive gate drive impedance is proposed to mitigate or even completely compensate the effects of LSc; experimental results are given that clearly verify simulations.
{"title":"A new gate drive technique for superjunction MOSFETs to compensate the effects of common source inductance","authors":"B. Zojer","doi":"10.1109/APEC.2018.8341408","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341408","url":null,"abstract":"It is well known that in fast-and hard-switching power systems the switching transients are essentially influenced by a common source inductance LSc, i.e. any inductance common to gate and power loop. Particularly for Superjunction (SJ) MOSFETs without Kelvin source connection significantly increased switching losses and a strong oscillation tendency may result. In this paper two different LSc-related effects associated with “on” and “off” switching are identified, and their dependence on transistor parameters (transconductance, nonlinear capacitances) is analyzed. A new technique based on an inductive rather than resistive gate drive impedance is proposed to mitigate or even completely compensate the effects of LSc; experimental results are given that clearly verify simulations.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123827895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341429
Ruiliang Xie, G. Xu, Xu Yang, Gaofei Tang, Jin Wei, Yidong Tian, Feng Zhang, Wenjie Chen, Laili Wang, K. J. Chen
During the switching performance evaluation for Si-based power devices, the gate driver IC's are commonly neglected because of Si device's slow switching speed. GaN transistors, with much smaller intrinsic capacitances, would enable faster switching speed and higher switching frequency. Consequently, the gate driver would largely impact the switching performance as well as the dead-time of the GaN transistor. In previous works, however, the gate driver IC used to drive GaN transistor have been ignored in circuit simulation, leading to lower modeling accuracy. In consideration of the lack of gate driver IC's critical design parameters, along with less familiarity of power electronics engineer/researcher with the semiconductor technologies, the gate driver IC could be regarded as a “black-box”. Despite the difficulty in directly performing measurements inside the driver chip package, a black-box modeling method could be proposed. Based on the measured terminal current/voltage signals in a typical gate drive scheme, the I-V characteristics of the PMOS in the totem-pole topology could be extracted. With respect to the C-V curves, the characteristics of a discrete Si MOSFET with comparable voltage/current rating could be introduced. Taking into account the operating principle of the totem-pole topology, a circuit-level model could be established. Consequently, the simulated waveforms are in reasonable agreements with the testing results. Taking advantages of the proposed black-box modeling method, the switching transient waveforms as well as the dead-time of GaN transistor could be more accurately evaluated.
{"title":"Modeling the gate driver IC for GaN transistor: A black-box approach","authors":"Ruiliang Xie, G. Xu, Xu Yang, Gaofei Tang, Jin Wei, Yidong Tian, Feng Zhang, Wenjie Chen, Laili Wang, K. J. Chen","doi":"10.1109/APEC.2018.8341429","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341429","url":null,"abstract":"During the switching performance evaluation for Si-based power devices, the gate driver IC's are commonly neglected because of Si device's slow switching speed. GaN transistors, with much smaller intrinsic capacitances, would enable faster switching speed and higher switching frequency. Consequently, the gate driver would largely impact the switching performance as well as the dead-time of the GaN transistor. In previous works, however, the gate driver IC used to drive GaN transistor have been ignored in circuit simulation, leading to lower modeling accuracy. In consideration of the lack of gate driver IC's critical design parameters, along with less familiarity of power electronics engineer/researcher with the semiconductor technologies, the gate driver IC could be regarded as a “black-box”. Despite the difficulty in directly performing measurements inside the driver chip package, a black-box modeling method could be proposed. Based on the measured terminal current/voltage signals in a typical gate drive scheme, the I-V characteristics of the PMOS in the totem-pole topology could be extracted. With respect to the C-V curves, the characteristics of a discrete Si MOSFET with comparable voltage/current rating could be introduced. Taking into account the operating principle of the totem-pole topology, a circuit-level model could be established. Consequently, the simulated waveforms are in reasonable agreements with the testing results. Taking advantages of the proposed black-box modeling method, the switching transient waveforms as well as the dead-time of GaN transistor could be more accurately evaluated.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"360 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125646952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341296
Alex J. Hanson, D. Perreault
Power factor correction (PFC) converters are typically operated at low frequency to mitigate switching losses and to simplify control; this in turn requires large passive components. Soft switching techniques could permit higher frequency operation, but most soft-switched converters do not maintain high performance across the wide voltage and power ranges required for PFC applications. Here we present a PFC converter which enables high frequency operation by maintaining soft switching and by using a control scheme which requires no current sensing. These advantages are verified with a prototype which achieves power factors above 0.996 (THD < 10%) while maintaining ZVS across voltage and power for efficiencies ∼ 97 %. By using increased switching frequency (∼ 10x over conventional designs), this converter can take advantage of greatly reduced passive component values for power conversion and EMI filtering.
{"title":"A high frequency power factor correction converter with soft switching","authors":"Alex J. Hanson, D. Perreault","doi":"10.1109/APEC.2018.8341296","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341296","url":null,"abstract":"Power factor correction (PFC) converters are typically operated at low frequency to mitigate switching losses and to simplify control; this in turn requires large passive components. Soft switching techniques could permit higher frequency operation, but most soft-switched converters do not maintain high performance across the wide voltage and power ranges required for PFC applications. Here we present a PFC converter which enables high frequency operation by maintaining soft switching and by using a control scheme which requires no current sensing. These advantages are verified with a prototype which achieves power factors above 0.996 (THD < 10%) while maintaining ZVS across voltage and power for efficiencies ∼ 97 %. By using increased switching frequency (∼ 10x over conventional designs), this converter can take advantage of greatly reduced passive component values for power conversion and EMI filtering.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132318135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341169
M. Elamin, Y. Yaşa, Omer Gundogmus, Y. Sozer, J. Kutz, Joshua Tylenda, Ronnie L. Wright
Switched Reluctance Machines (SRMs) have been studied by many researchers as an alternative to other types of electrical machines for use in electric and hybrid vehicle applications. SRMs are fault tolerant and have wide speed operating range. However, they suffer from several disadvantages including high vibration, acoustic noise and torque ripple. In this paper, placement of rectangular windows in both the rotor and stator poles is proposed to reduce the vibration and acoustic noise of SRMs. The position and the dimensions of the windows are optimized through Electromagnetic Finite Element Analysis (FEA). Multi-physics FEA is also performed to predict the vibration and acoustic noise of the optimized design. The results of this study confirm that placing windows in both the stator and the rotor of the SRMs can significantly reduce the acoustic noise compared to conventional SRMs.
{"title":"Acoustic noise mitigation of switched reluctance machines with windows in both stator and rotor poles","authors":"M. Elamin, Y. Yaşa, Omer Gundogmus, Y. Sozer, J. Kutz, Joshua Tylenda, Ronnie L. Wright","doi":"10.1109/APEC.2018.8341169","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341169","url":null,"abstract":"Switched Reluctance Machines (SRMs) have been studied by many researchers as an alternative to other types of electrical machines for use in electric and hybrid vehicle applications. SRMs are fault tolerant and have wide speed operating range. However, they suffer from several disadvantages including high vibration, acoustic noise and torque ripple. In this paper, placement of rectangular windows in both the rotor and stator poles is proposed to reduce the vibration and acoustic noise of SRMs. The position and the dimensions of the windows are optimized through Electromagnetic Finite Element Analysis (FEA). Multi-physics FEA is also performed to predict the vibration and acoustic noise of the optimized design. The results of this study confirm that placing windows in both the stator and the rotor of the SRMs can significantly reduce the acoustic noise compared to conventional SRMs.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130180097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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