Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341096
Ayan Mallik, J. Lu, Shenli Zou, Peiwen He, A. Khaligh
Smooth start-up to limit the inrush current is an important requirement in development of actively controlled power factor correction (PFC) rectifiers. In this paper, a thorough mathematical analysis is conducted to exploit the transient behavior during the start-up and thus, the expression for maximum inrush current is determined. Based on the analyses, a specifically designed start-up technique by controlling the time instant of engaging the PFC control loop is proposed, which achieves smooth start-up with zero current over/undershoot. As a proof-of-concept, experimental measurements are conducted at 1.5kW to validate the theoretical predictions. It is observed that there is no occurrence of inrush during the PFC start-up and also, unity power factor is maintained along with an efficiency of 98 % and input current THD below 5%.
{"title":"Minimum inrush start-up control of a single-phase interleaved totem-pole PFC rectifier","authors":"Ayan Mallik, J. Lu, Shenli Zou, Peiwen He, A. Khaligh","doi":"10.1109/APEC.2018.8341096","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341096","url":null,"abstract":"Smooth start-up to limit the inrush current is an important requirement in development of actively controlled power factor correction (PFC) rectifiers. In this paper, a thorough mathematical analysis is conducted to exploit the transient behavior during the start-up and thus, the expression for maximum inrush current is determined. Based on the analyses, a specifically designed start-up technique by controlling the time instant of engaging the PFC control loop is proposed, which achieves smooth start-up with zero current over/undershoot. As a proof-of-concept, experimental measurements are conducted at 1.5kW to validate the theoretical predictions. It is observed that there is no occurrence of inrush during the PFC start-up and also, unity power factor is maintained along with an efficiency of 98 % and input current THD below 5%.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125762461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8340995
J. Stewart, J. Richards, J. Delhotal, J. Neely, J. Flicker, R. Brocato, L. Rashkin
This work investigates the use of hybrid switched capacitor converter (HSCC) topologies with wide bandgap devices to achieve high efficiency DC-DC power conversion with high gain, high voltage outputs. This class of converter may be useful for several applications that include a medium voltage bus, such as solar PV, electric aircraft, or even all-electric ship architectures. Three converter prototypes are considered and evaluated in hardware, including a basic (unipolar) HSCC and two bipolar HSCC variants. The converter operation is discussed, and the bipolar prototypes are demonstrated to achieve high-gain, high-voltage output. Finally, the latest bipolar switched capacitor prototype is demonstrated to boost 480 V to 10 kV (Gain > 20) with 97.9% efficiency at 4.96 kW output power.
{"title":"Design and evaluation of hybrid switched capacitor converters for high voltage, high power density applications","authors":"J. Stewart, J. Richards, J. Delhotal, J. Neely, J. Flicker, R. Brocato, L. Rashkin","doi":"10.1109/APEC.2018.8340995","DOIUrl":"https://doi.org/10.1109/APEC.2018.8340995","url":null,"abstract":"This work investigates the use of hybrid switched capacitor converter (HSCC) topologies with wide bandgap devices to achieve high efficiency DC-DC power conversion with high gain, high voltage outputs. This class of converter may be useful for several applications that include a medium voltage bus, such as solar PV, electric aircraft, or even all-electric ship architectures. Three converter prototypes are considered and evaluated in hardware, including a basic (unipolar) HSCC and two bipolar HSCC variants. The converter operation is discussed, and the bipolar prototypes are demonstrated to achieve high-gain, high-voltage output. Finally, the latest bipolar switched capacitor prototype is demonstrated to boost 480 V to 10 kV (Gain > 20) with 97.9% efficiency at 4.96 kW output power.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124769475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341331
Avishek Pal, S. Kapat, K. Jha, A. Tiwari
Dual active bridge (DAB) converters have been gaining increasing popularity in the context of high-frequency solid state transformers. However, modeling of a DAB converter remains a challenge to retain the ripple information for the design of high performance stable digital control under uniform sampling. This paper proposes a discrete-time framework using approximate discrete-time models considering various practical parasitics. These models are used to derive various discrete-time small-signal transfer functions under phase shift modulation using both voltage mode and current mode control techniques. The accuracy of the proposed models is verified through SIMPLIS simulation as well as experimentation in time-domain and in the frequency domain using SIMPLIS simulation. Finally, a design case-study using digital voltage-mode control is considered for a prototype DAB converter under phase-shift modulation with a power rating of 50 W and switching frequency of 500 kHz. The digital controller is implemented using an FPGA device, and the test results are demonstrated. The proposed framework can be extended to different modulation techniques as well as other isolated DC-DC converter topologies to design high frequency digital control.
{"title":"Discrete-time framework for digital control design in a high-frequency dual active bridge converter","authors":"Avishek Pal, S. Kapat, K. Jha, A. Tiwari","doi":"10.1109/APEC.2018.8341331","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341331","url":null,"abstract":"Dual active bridge (DAB) converters have been gaining increasing popularity in the context of high-frequency solid state transformers. However, modeling of a DAB converter remains a challenge to retain the ripple information for the design of high performance stable digital control under uniform sampling. This paper proposes a discrete-time framework using approximate discrete-time models considering various practical parasitics. These models are used to derive various discrete-time small-signal transfer functions under phase shift modulation using both voltage mode and current mode control techniques. The accuracy of the proposed models is verified through SIMPLIS simulation as well as experimentation in time-domain and in the frequency domain using SIMPLIS simulation. Finally, a design case-study using digital voltage-mode control is considered for a prototype DAB converter under phase-shift modulation with a power rating of 50 W and switching frequency of 500 kHz. The digital controller is implemented using an FPGA device, and the test results are demonstrated. The proposed framework can be extended to different modulation techniques as well as other isolated DC-DC converter topologies to design high frequency digital control.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130279513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8340987
Mehdi Abbasi, J. Lam
A new soft-switched, bridgeless rectifier is presented in this paper that is integrated with an isolated step-up resonant converter for step-up voltage conversion in medium voltage (MV) DC grid in wind energy applications. To reduce the number of conversion stages, the proposed bridgeless boost rectifier is integrated with a high-frequency step-up resonant converter with voltage doubler modules to form a single-stage AC/DC step-up converter. The proposed converter is able to reduce the number of semiconductors required for the front-end rectifier, thus simplifying the resulting controller. In addition, all the switches and diodes are able to achieve soft-switching to enhance the overall circuit efficiency. Simulation results are given on a 800kW, 690Vac/15kVDC system to highlight the merits of the proposed converter. To further validate the performance of the proposed converter, experimental results are provided on a laboratory scale 50Vac/1kVDC, 28kHz Silicon-Carbide based proof of concept prototype.
{"title":"A new three-phase soft-switched bridgeless AC/DC step-up converter with current fed voltage doubler modules for DC grid in wind systems","authors":"Mehdi Abbasi, J. Lam","doi":"10.1109/APEC.2018.8340987","DOIUrl":"https://doi.org/10.1109/APEC.2018.8340987","url":null,"abstract":"A new soft-switched, bridgeless rectifier is presented in this paper that is integrated with an isolated step-up resonant converter for step-up voltage conversion in medium voltage (MV) DC grid in wind energy applications. To reduce the number of conversion stages, the proposed bridgeless boost rectifier is integrated with a high-frequency step-up resonant converter with voltage doubler modules to form a single-stage AC/DC step-up converter. The proposed converter is able to reduce the number of semiconductors required for the front-end rectifier, thus simplifying the resulting controller. In addition, all the switches and diodes are able to achieve soft-switching to enhance the overall circuit efficiency. Simulation results are given on a 800kW, 690Vac/15kVDC system to highlight the merits of the proposed converter. To further validate the performance of the proposed converter, experimental results are provided on a laboratory scale 50Vac/1kVDC, 28kHz Silicon-Carbide based proof of concept prototype.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127277669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341571
Panbao Wang, Shuxin Zhang, Dianguo Xu, Xiaonan Lu
A three-port converter (TPC) as a compact DC/DC energy conversion unit can effectively integrate renewable energy sources (RESs) and energy storage systems (ESSs) into DC microgrids (MGs). In this paper, a hardware-decoupling approach using series-connected capacitor in a TPC is proposed and studied. In this series-resonance-based TPC, the decoupled power flow model among different ports is derived based on the equivalent model of the converter and the operation principle of the resonant circuit. Considering the characteristics and operation modes of photovoltaic (PV) and energy storage unit (ESU), which are connected at the two input ports of the TPC, a unified control method based on minimum value competition logic is proposed to achieve voltage regulation of the common bus in DC MGs. Experimental results are obtained in different test scenarios to demonstrate the effectiveness of the proposed method.
{"title":"A series-resonance-based three-port converter with unified autonomous control method in DC microgrids","authors":"Panbao Wang, Shuxin Zhang, Dianguo Xu, Xiaonan Lu","doi":"10.1109/APEC.2018.8341571","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341571","url":null,"abstract":"A three-port converter (TPC) as a compact DC/DC energy conversion unit can effectively integrate renewable energy sources (RESs) and energy storage systems (ESSs) into DC microgrids (MGs). In this paper, a hardware-decoupling approach using series-connected capacitor in a TPC is proposed and studied. In this series-resonance-based TPC, the decoupled power flow model among different ports is derived based on the equivalent model of the converter and the operation principle of the resonant circuit. Considering the characteristics and operation modes of photovoltaic (PV) and energy storage unit (ESU), which are connected at the two input ports of the TPC, a unified control method based on minimum value competition logic is proposed to achieve voltage regulation of the common bus in DC MGs. Experimental results are obtained in different test scenarios to demonstrate the effectiveness of the proposed method.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127051370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341247
Liqi Zhang, R. Woodley, Xiaoqing Song, Soumik Sen, Xin Zhao, A. Huang
The SiC ETO concept, developed based on the SiC gate turn-off (GTO) thyristors, has the advantages of simple voltage controlled gate drive, very high blocking voltage, low forward voltage drop and large turn-off current capability, demonstrating a high suitableness for medium voltage solid state circuit breaker applications. In this paper, a 15 kV/200 A solid state circuit breaker (SSCB), which is suitable for medium voltage direct current (MVDC) power systems protection, is designed and developed based on the parallel and high temperature operation of the 15 kV SiC emitter turn-off (ETO) thyristors. To realize the 200A current rating, three SiC ETOs are connected in parallel. The static and dynamic current sharing of the SSCB is tested at 4.5kV/200A, showing it is an ideal candidate for the medium voltage SSCB applications.
{"title":"High current medium voltage solid state circuit breaker using paralleled 15kV SiC ETO","authors":"Liqi Zhang, R. Woodley, Xiaoqing Song, Soumik Sen, Xin Zhao, A. Huang","doi":"10.1109/APEC.2018.8341247","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341247","url":null,"abstract":"The SiC ETO concept, developed based on the SiC gate turn-off (GTO) thyristors, has the advantages of simple voltage controlled gate drive, very high blocking voltage, low forward voltage drop and large turn-off current capability, demonstrating a high suitableness for medium voltage solid state circuit breaker applications. In this paper, a 15 kV/200 A solid state circuit breaker (SSCB), which is suitable for medium voltage direct current (MVDC) power systems protection, is designed and developed based on the parallel and high temperature operation of the 15 kV SiC emitter turn-off (ETO) thyristors. To realize the 200A current rating, three SiC ETOs are connected in parallel. The static and dynamic current sharing of the SSCB is tested at 4.5kV/200A, showing it is an ideal candidate for the medium voltage SSCB applications.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125610543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341345
J. P. M. Rocha, F. Salvadori, C. Gehrke
In this paper, is studied the provision of ancillary service (AS) of harmonic compensation of a distributed generation (DG) connected in a distribution network is studied, aiming at the improvement of power quality (PQ). This compensation is performed by operating the three-phase inverter, whose dc bus is connected to the photovoltaic (PV) generator, acting as active power filter (APF) and DG. One of the advantages of the proposed strategy is that the compensation is performed without the need to extract the harmonic components present in the current, which reduces the computational effort. For implementation the measured grid current is used as control variable. The control is based on the power balance between the grid and the inverter, and is carried out in the synchronous reference frame. A perturb and observe (P&O) algorithm is used for maximum power tracking, along with a control algorithm for dc bus voltage. To validate the study, experimental results were obtained from an experimental setup in three different scenarios.
{"title":"Provision of ancillary service in a grid-connected photovoltaic power system","authors":"J. P. M. Rocha, F. Salvadori, C. Gehrke","doi":"10.1109/APEC.2018.8341345","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341345","url":null,"abstract":"In this paper, is studied the provision of ancillary service (AS) of harmonic compensation of a distributed generation (DG) connected in a distribution network is studied, aiming at the improvement of power quality (PQ). This compensation is performed by operating the three-phase inverter, whose dc bus is connected to the photovoltaic (PV) generator, acting as active power filter (APF) and DG. One of the advantages of the proposed strategy is that the compensation is performed without the need to extract the harmonic components present in the current, which reduces the computational effort. For implementation the measured grid current is used as control variable. The control is based on the power balance between the grid and the inverter, and is carried out in the synchronous reference frame. A perturb and observe (P&O) algorithm is used for maximum power tracking, along with a control algorithm for dc bus voltage. To validate the study, experimental results were obtained from an experimental setup in three different scenarios.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"11 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125695154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341575
H. Saberi, S. Mehraeen, Boyu Wang
A reduced Unified Power Flow Controller (UPFC) structure is proposed to enhance transient stability of small-scale micro grids. The micro grid utilizes Photovoltaic (PV) unit as the Distributed Generation (DG) unit that is connected to the grid through dc-dc buck converter and inverter. The dc-dc converter provides a constant dc voltage at the output that is connected to the inverter. The inverter generates the proper ac voltage according to the system requirements to feed the gird. The reduced UPFC model exploits dc link of the DG unit to generate appropriate series voltage and inject it to the power line to enhance transient stability. It employs the nonlinear discrete-time Hamilton-Jacobi-Bellman (HJB) optimal control to ensure that the stability of the system is realized through minimum cost for the system. A Neural Network (NN) is used to approximate the cost function based on the weighted residual method. In order to verify efficiency of the proposed model and control scheme, the DG unit and proposed UPFC structure are tested in simulations and experiments. The results shows effective performance of the proposed approach in damping oscillations in the system.
{"title":"Stability improvement of microgrids using a novel reduced UPFC structure via nonlinear optimal control","authors":"H. Saberi, S. Mehraeen, Boyu Wang","doi":"10.1109/APEC.2018.8341575","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341575","url":null,"abstract":"A reduced Unified Power Flow Controller (UPFC) structure is proposed to enhance transient stability of small-scale micro grids. The micro grid utilizes Photovoltaic (PV) unit as the Distributed Generation (DG) unit that is connected to the grid through dc-dc buck converter and inverter. The dc-dc converter provides a constant dc voltage at the output that is connected to the inverter. The inverter generates the proper ac voltage according to the system requirements to feed the gird. The reduced UPFC model exploits dc link of the DG unit to generate appropriate series voltage and inject it to the power line to enhance transient stability. It employs the nonlinear discrete-time Hamilton-Jacobi-Bellman (HJB) optimal control to ensure that the stability of the system is realized through minimum cost for the system. A Neural Network (NN) is used to approximate the cost function based on the weighted residual method. In order to verify efficiency of the proposed model and control scheme, the DG unit and proposed UPFC structure are tested in simulations and experiments. The results shows effective performance of the proposed approach in damping oscillations in the system.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114889188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341540
V. I. Kumar, A. Dey, S. Kapat
A linear power amplifier (PA) is used for powering high-bandwidth modulated signals with high peak-to-average power ratio (PAPR). The efficiency of a PA significantly degrades using a fixed supply voltage, and an envelope-tracking (ET) power supply remains an essential alternative for improving the energy efficiency. This paper shows that a single-inductor multi-capacitor (SIMC) buck converter-based ET power supply can (a) achieve ultra-wide bandwidth for high PAPR envelopes and (b) simultaneously improve the overall dynamic energy efficiency of both the PA and the power supply. The proposed architecture employs a hybrid combination of inductive switching buck based ET power supply along with a bank of multiple output capacitors. This hybrid architecture is helpful to trade-off between the bandwidth and the output voltage ripple in order to preserve the linearity of PA. A hardware prototype is made. The experimental results are demonstrated to justify the effectiveness of tracking high-bandwidth PAPR envelopes while simultaneously minimizing the PA losses for low frequency envelopes. The SIMC buck converter achieves more than 85 % efficiency with the 7.5 W peak power level.
{"title":"Single-inductor multi-capacitor buck converter for high peak-to-average power envelope tracking","authors":"V. I. Kumar, A. Dey, S. Kapat","doi":"10.1109/APEC.2018.8341540","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341540","url":null,"abstract":"A linear power amplifier (PA) is used for powering high-bandwidth modulated signals with high peak-to-average power ratio (PAPR). The efficiency of a PA significantly degrades using a fixed supply voltage, and an envelope-tracking (ET) power supply remains an essential alternative for improving the energy efficiency. This paper shows that a single-inductor multi-capacitor (SIMC) buck converter-based ET power supply can (a) achieve ultra-wide bandwidth for high PAPR envelopes and (b) simultaneously improve the overall dynamic energy efficiency of both the PA and the power supply. The proposed architecture employs a hybrid combination of inductive switching buck based ET power supply along with a bank of multiple output capacitors. This hybrid architecture is helpful to trade-off between the bandwidth and the output voltage ripple in order to preserve the linearity of PA. A hardware prototype is made. The experimental results are demonstrated to justify the effectiveness of tracking high-bandwidth PAPR envelopes while simultaneously minimizing the PA losses for low frequency envelopes. The SIMC buck converter achieves more than 85 % efficiency with the 7.5 W peak power level.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116936543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-03-04DOI: 10.1109/APEC.2018.8341123
Yanfeng Shen, Huai Wang, Zhan Shen, F. Blaabjerg, Zian Qin
This paper proposes an improved analytical turn-on power loss model for 650-V GaN eHEMTs. The static characteristics, i.e., the parasitic capacitances and transconductance, are firstly modeled. Then the turn-on process is divided into multiple stages and analyzed in detail; as results, the time-domain solutions to the drain-source voltage and drain current are obtained. Finally, double-pulse tests are conducted to verify the proposed power loss model. This analytical model enables an accurate and fast switching behavior characterization and power loss prediction.
本文提出了一种改进的650 v GaN ehemt导通功率损耗分析模型。静态特性，即寄生电容和跨导，首先建模。然后将导通过程划分为多个阶段并进行了详细分析;得到了漏源电压和漏极电流的时域解。最后，通过双脉冲实验对所提出的功率损耗模型进行了验证。该分析模型可实现准确、快速的开关行为表征和功率损耗预测。
{"title":"An analytical turn-on power loss model for 650-V GaN eHEMTs","authors":"Yanfeng Shen, Huai Wang, Zhan Shen, F. Blaabjerg, Zian Qin","doi":"10.1109/APEC.2018.8341123","DOIUrl":"https://doi.org/10.1109/APEC.2018.8341123","url":null,"abstract":"This paper proposes an improved analytical turn-on power loss model for 650-V GaN eHEMTs. The static characteristics, i.e., the parasitic capacitances and transconductance, are firstly modeled. Then the turn-on process is divided into multiple stages and analyzed in detail; as results, the time-domain solutions to the drain-source voltage and drain current are obtained. Finally, double-pulse tests are conducted to verify the proposed power loss model. This analytical model enables an accurate and fast switching behavior characterization and power loss prediction.","PeriodicalId":113756,"journal":{"name":"2018 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122859037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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