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A Blocker-Tolerant Non-Uniform Sub-Sampling Receiver With a Non-Uniform Discrete-Time FIR Filter 带有非均匀离散时间 FIR 滤波器的耐阻塞非均匀子采样接收器
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-11 DOI: 10.1109/jssc.2024.3470911
Mostafa Ayesh, Soumya Mahapatra, Ce Yang, Mike Shuo-Wei Chen
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引用次数: 0
A Sub-400-nW Real-Time Event-Driven Spectrogram Extraction Unit in 28-nm FD-SOI CMOS for Keyword Spotting Application 28 纳米 FD-SOI CMOS 中用于关键字定位应用的低于 400-nW 的实时事件驱动频谱提取装置
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-08 DOI: 10.1109/jssc.2024.3475948
Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé
{"title":"A Sub-400-nW Real-Time Event-Driven Spectrogram Extraction Unit in 28-nm FD-SOI CMOS for Keyword Spotting Application","authors":"Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé","doi":"10.1109/jssc.2024.3475948","DOIUrl":"https://doi.org/10.1109/jssc.2024.3475948","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"18 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142597381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing 使用 BL 开关的基于双输入堆叠式逆变器的单端 DRAM 检测放大器可实现低功耗高速检测
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-08 DOI: 10.1109/jssc.2024.3487756
Sehee Lim, In Jun Jung, Gi Seok Kim, Dong Han Ko, Sumin Lee, Seong-Ook Jung
{"title":"Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing","authors":"Sehee Lim, In Jun Jung, Gi Seok Kim, Dong Han Ko, Sumin Lee, Seong-Ook Jung","doi":"10.1109/jssc.2024.3487756","DOIUrl":"https://doi.org/10.1109/jssc.2024.3487756","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"34 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142597380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 12-GS/s 12-b 4$times$ Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer 使用全局抖动注入和线性化输入缓冲器进行输入无关定时偏差校准的 12-GS/s 12-b 4$times$ 时交错 ADC
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-08 DOI: 10.1109/jssc.2024.3482567
Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan
{"title":"A 12-GS/s 12-b 4$times$ Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer","authors":"Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui P. Martins, Chi-Hang Chan","doi":"10.1109/jssc.2024.3482567","DOIUrl":"https://doi.org/10.1109/jssc.2024.3482567","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"1 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142597387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Compact 20–24-GHz Sub-Sampling PLL With Charge-Domain Bandwidth Control Scheme 采用电荷域带宽控制方案的 20-24-GHz 紧凑型子采样 PLL
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-07 DOI: 10.1109/jssc.2024.3488277
Li Wang, Zilu Liu, Ruitao Ma, C. Patrick Yue
{"title":"A Compact 20–24-GHz Sub-Sampling PLL With Charge-Domain Bandwidth Control Scheme","authors":"Li Wang, Zilu Liu, Ruitao Ma, C. Patrick Yue","doi":"10.1109/jssc.2024.3488277","DOIUrl":"https://doi.org/10.1109/jssc.2024.3488277","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"5 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142597389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 1920 $times$ 1080 Array 2-D/3-D Image Sensor With 3-$mu$s Row-Time Single-Slope ADC and 100-MHz Demodulated PPD Locked-In Pixel 1920 美元/次 1080 阵列 2-D/3-D 图像传感器，带 3-$mu$s 行时间单斜率 ADC 和 100-MHz 解调 PPD 锁定像素
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-06 DOI: 10.1109/jssc.2024.3487196
Quanmin Chen, Kaiming Nie, Jing Gao, Xiaoyu Zhang, Jiangtao Xu
{"title":"A 1920 $times$ 1080 Array 2-D/3-D Image Sensor With 3-$mu$s Row-Time Single-Slope ADC and 100-MHz Demodulated PPD Locked-In Pixel","authors":"Quanmin Chen, Kaiming Nie, Jing Gao, Xiaoyu Zhang, Jiangtao Xu","doi":"10.1109/jssc.2024.3487196","DOIUrl":"https://doi.org/10.1109/jssc.2024.3487196","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"145 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142594901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 93.6-dB SNDR Fully Dynamic CT–DT Noise-Shaping SAR ADC With Closed-Loop Capacitively Coupled Two-Stage FIA 带有闭环电容耦合两级 FIA 的 93.6 分贝 SNDR 全动态 CT-DT 噪声整形 SAR ADC
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-06 DOI: 10.1109/jssc.2024.3488364
Lingxin Meng, Shuang Song, Menglian Zhao, Zhichao Tan
{"title":"A 93.6-dB SNDR Fully Dynamic CT–DT Noise-Shaping SAR ADC With Closed-Loop Capacitively Coupled Two-Stage FIA","authors":"Lingxin Meng, Shuang Song, Menglian Zhao, Zhichao Tan","doi":"10.1109/jssc.2024.3488364","DOIUrl":"https://doi.org/10.1109/jssc.2024.3488364","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"45 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142594899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface 采用 QEC 的低电压、面积效率高的 TSV I/O 实现了高达 15 Gb/s 的 TSV 接口数据传输速率
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-05 DOI: 10.1109/jssc.2024.3487228
Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung Mo Moon, Kyomin Sohn, Seong-OoK Jung
{"title":"A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface","authors":"Taeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung Mo Moon, Kyomin Sohn, Seong-OoK Jung","doi":"10.1109/jssc.2024.3487228","DOIUrl":"https://doi.org/10.1109/jssc.2024.3487228","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"34 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142588547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 48–56 GHz $>$1 dBm-HB1dB Sub-Sampling Eight-Path-Filter Receiver With Fully-Integrated LO Generation and On-Chip Antenna 带有全集成 LO 生成和片上天线的 48-56 GHz $>$1 dBm-HB1dB 子采样八路径滤波器接收器
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-05 DOI: 10.1109/jssc.2024.3480957
Yang Gao, Khoi T. Phan, Chun Loi Wong, Chi-Yuk Chiu, Howard C. Luong
{"title":"A 48–56 GHz $>$1 dBm-HB1dB Sub-Sampling Eight-Path-Filter Receiver With Fully-Integrated LO Generation and On-Chip Antenna","authors":"Yang Gao, Khoi T. Phan, Chun Loi Wong, Chi-Yuk Chiu, Howard C. Luong","doi":"10.1109/jssc.2024.3480957","DOIUrl":"https://doi.org/10.1109/jssc.2024.3480957","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"8 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142588553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Multi-Path Inductor-First Inductor-on-Ground Switched-Capacitor Hybrid DC–DC Converter 多路径电感器优先电感器接地开关电容器混合直流-直流转换器
IF 5.4 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Journal of Solid-state Circuits
Pub Date : 2024-11-05 DOI: 10.1109/jssc.2024.3485210
Junwei Huang, Zhiguo Tong, Chi-Seng Lam, Xiangyu Mao, Rui P. Martins, Yan Lu
{"title":"A Multi-Path Inductor-First Inductor-on-Ground Switched-Capacitor Hybrid DC–DC Converter","authors":"Junwei Huang, Zhiguo Tong, Chi-Seng Lam, Xiangyu Mao, Rui P. Martins, Yan Lu","doi":"10.1109/jssc.2024.3485210","DOIUrl":"https://doi.org/10.1109/jssc.2024.3485210","url":null,"abstract":"","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"109 1","pages":""},"PeriodicalIF":5.4,"publicationDate":"2024-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142588568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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