{"title":"Magnetic field intensity suppression using communication-less impedance adjustment for inductive power transfer systems","authors":"Kentaro Matsuura, Yoshiaki Narusue, Hiroyuki Morikawa","doi":"10.1587/elex.20.20230153","DOIUrl":"https://doi.org/10.1587/elex.20.20230153","url":null,"abstract":"","PeriodicalId":13437,"journal":{"name":"IEICE Electron. Express","volume":"13 1","pages":"20230153"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74614178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-01-01DOI: 10.1587/elex.20.20230114
Jianjun Ding, Haomiao Wei, Yanzhe Wang, Zhengwei Lu, W. Ding
{"title":"A distributed small signal model extraction method based on FW-EM simulation for InP HEMT","authors":"Jianjun Ding, Haomiao Wei, Yanzhe Wang, Zhengwei Lu, W. Ding","doi":"10.1587/elex.20.20230114","DOIUrl":"https://doi.org/10.1587/elex.20.20230114","url":null,"abstract":"","PeriodicalId":13437,"journal":{"name":"IEICE Electron. Express","volume":"143 1","pages":"20230114"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77954433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-01-01DOI: 10.1587/elex.20.20230024
H. Sun, Yan Chen, Yinke Dou
A space vector pulse width modulation (SVPWM) driving method for the switched reluctance motor (SRM) is proposed. With a ring structure, a three-phase SRM can be driven by using a standard full-bridge power converter instead of the conventional asymmetric H-bridge. Based on this type of driving topology, an SVPWM method is applied for driving the SRM. The SVPWM method is compared to the conventional SRM driving method by using the asymmetric H-bridge, the results show that the SVPWM can reduce the torque ripple in the SRM effectively. The experimental validation is also made to verify the proposed driving topology and method, of which the results match well with the simulated results.
{"title":"A space vector PWM fed SRM with full bridge power converter","authors":"H. Sun, Yan Chen, Yinke Dou","doi":"10.1587/elex.20.20230024","DOIUrl":"https://doi.org/10.1587/elex.20.20230024","url":null,"abstract":"A space vector pulse width modulation (SVPWM) driving method for the switched reluctance motor (SRM) is proposed. With a ring structure, a three-phase SRM can be driven by using a standard full-bridge power converter instead of the conventional asymmetric H-bridge. Based on this type of driving topology, an SVPWM method is applied for driving the SRM. The SVPWM method is compared to the conventional SRM driving method by using the asymmetric H-bridge, the results show that the SVPWM can reduce the torque ripple in the SRM effectively. The experimental validation is also made to verify the proposed driving topology and method, of which the results match well with the simulated results.","PeriodicalId":13437,"journal":{"name":"IEICE Electron. Express","volume":"37 1","pages":"20230024"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90115146","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-01-01DOI: 10.1587/elex.20.20230157
Zhidong Chen, Yidie Ye, Yinshui Xia, Huakang Xia, Xiudeng Wang
{"title":"Multi-input SECE circuit with isolated active rectifier for piezoelectric energy harvesting","authors":"Zhidong Chen, Yidie Ye, Yinshui Xia, Huakang Xia, Xiudeng Wang","doi":"10.1587/elex.20.20230157","DOIUrl":"https://doi.org/10.1587/elex.20.20230157","url":null,"abstract":"","PeriodicalId":13437,"journal":{"name":"IEICE Electron. Express","volume":"7 1","pages":"20230157"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90209181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-01-01DOI: 10.1587/elex.19.20220078
Jinzhi Lai, Jueping Cai, Jie Chu
Network-on-chip (NoC) offers a scalable and flexible communication infrastructure for many-cores systems. Buffers in router is used for fine-grain flow control and Quality of Service (QoS), yet it is the major contributor of area and power consumption. In this paper, we propose a hybrid buffer design with SRAM and Spin-Torque Transfer Magnetic RAM (STT-RAM) for NoC router leveraging a novel architecture combined Virtual Channel (VC) and Virtual Output Queuing (VOQ) to store congested and uncongested flow separately. Experiments demonstrates that the proposed scheme can achieve 11.8% network performance improvement and 32.9% power saving with only 8.2% area overhead degradation compared to conventional SRAM based buffer design. key words: network-on-chip (NoC), router, STT-RAM, buffer, congestion-aware Classification: Integrated circuits (memory, logic, analog, RF, sensor)
{"title":"A congestion-aware hybrid SRAM and STT-RAM buffer design for network-on-chip router","authors":"Jinzhi Lai, Jueping Cai, Jie Chu","doi":"10.1587/elex.19.20220078","DOIUrl":"https://doi.org/10.1587/elex.19.20220078","url":null,"abstract":"Network-on-chip (NoC) offers a scalable and flexible communication infrastructure for many-cores systems. Buffers in router is used for fine-grain flow control and Quality of Service (QoS), yet it is the major contributor of area and power consumption. In this paper, we propose a hybrid buffer design with SRAM and Spin-Torque Transfer Magnetic RAM (STT-RAM) for NoC router leveraging a novel architecture combined Virtual Channel (VC) and Virtual Output Queuing (VOQ) to store congested and uncongested flow separately. Experiments demonstrates that the proposed scheme can achieve 11.8% network performance improvement and 32.9% power saving with only 8.2% area overhead degradation compared to conventional SRAM based buffer design. key words: network-on-chip (NoC), router, STT-RAM, buffer, congestion-aware Classification: Integrated circuits (memory, logic, analog, RF, sensor)","PeriodicalId":13437,"journal":{"name":"IEICE Electron. Express","volume":"12 1","pages":"20220078"},"PeriodicalIF":0.0,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73853267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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