Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558390
R. Torres‐Torres
A method for characterizing coplanar-waveguide (CPW) to microstrip transitions is presented in this paper. The method takes into account the coupling between the signal and ground pads and allows the analytical extraction of physically meaningful parameters for the transition model. The formulation of the method is based on a simple but rigorous analysis of the ABCD-parameters of two lines differing only in length. Simulations using a model incorporating the extracted parameters agree well with experimental data up to 30 GHz, validating the proposed method.
{"title":"Analytical Characterization of CPW-to-Microstrip Transitions Used in RF Test Structures","authors":"R. Torres‐Torres","doi":"10.1109/SPI.2008.4558390","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558390","url":null,"abstract":"A method for characterizing coplanar-waveguide (CPW) to microstrip transitions is presented in this paper. The method takes into account the coupling between the signal and ground pads and allows the analytical extraction of physically meaningful parameters for the transition model. The formulation of the method is based on a simple but rigorous analysis of the ABCD-parameters of two lines differing only in length. Simulations using a model incorporating the extracted parameters agree well with experimental data up to 30 GHz, validating the proposed method.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"145 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120868805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558371
H. Sasaki, Y. Fujimura, T. Murakami, H. Terai
We have developed a system-in-a-package (SiP) consisting of a sound source LSI and a speaker amplifier LSI for mobile applications, and have measured its signal-to-noise ratio (SNR). The sound source LSI chip is stacked on the speaker amplifier LSI chip with inserting a silicon spacer between these chips. Two types of interposers were applied to the SiP: one-metal polyimide tape and a two-metal glass epoxy board. When the output voltage of the speaker LSI was 5 Vp-p, the SNR of the digital-analog converter in the sound source LSI did not change. When it was 15 Vp-p, the SNR was about 1.5 dB worse than with 5 Vp-p. The SNR when the one-metal tape was used was about 1 dB worse than when the two-metal epoxy board was used. The noise source for this degradation was apparently the class-D amplifier in the speaker LSI. These results should be useful in the design for mixed-signal SiPs.
{"title":"Signal-to-Noise Ratio Measurements of Sound Source and Speaker System-in-Package (SiP)","authors":"H. Sasaki, Y. Fujimura, T. Murakami, H. Terai","doi":"10.1109/SPI.2008.4558371","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558371","url":null,"abstract":"We have developed a system-in-a-package (SiP) consisting of a sound source LSI and a speaker amplifier LSI for mobile applications, and have measured its signal-to-noise ratio (SNR). The sound source LSI chip is stacked on the speaker amplifier LSI chip with inserting a silicon spacer between these chips. Two types of interposers were applied to the SiP: one-metal polyimide tape and a two-metal glass epoxy board. When the output voltage of the speaker LSI was 5 Vp-p, the SNR of the digital-analog converter in the sound source LSI did not change. When it was 15 Vp-p, the SNR was about 1.5 dB worse than with 5 Vp-p. The SNR when the one-metal tape was used was about 1 dB worse than when the two-metal epoxy board was used. The noise source for this degradation was apparently the class-D amplifier in the speaker LSI. These results should be useful in the design for mixed-signal SiPs.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122379164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558356
Zhaoqing Chen
The negative capacitance de-embedding method is shown to be simple, fast, and accurate for some electronic packaging component electromagnetic modeling. The lumped port gap capacitance affects the accuracy of the simulated S-parameters especially at higher frequencies. For removing this effect of the parasitic lumped port capacitance, we proposed a simple and accurate de-embedding method. By adding a negative capacitance with an absolute value of the estimated lumped port parasitic capacitance at each port of the S-parameter model, we just need to run a circuit AC simulation to generate the de-embedded S-parameters. For 3D transmission line applications like the pin area wire modeling, we developed a simple method for optimizing the negative capacitance by getting mimimum reflection from the junction of two cascaded sections in TDR simulation.
{"title":"A Simple Lumped Port S-Parameter De-Embedding Method for On-Package-Interconnect and Packaging Component High-Frequency Modeling","authors":"Zhaoqing Chen","doi":"10.1109/SPI.2008.4558356","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558356","url":null,"abstract":"The negative capacitance de-embedding method is shown to be simple, fast, and accurate for some electronic packaging component electromagnetic modeling. The lumped port gap capacitance affects the accuracy of the simulated S-parameters especially at higher frequencies. For removing this effect of the parasitic lumped port capacitance, we proposed a simple and accurate de-embedding method. By adding a negative capacitance with an absolute value of the estimated lumped port parasitic capacitance at each port of the S-parameter model, we just need to run a circuit AC simulation to generate the de-embedded S-parameters. For 3D transmission line applications like the pin area wire modeling, we developed a simple method for optimizing the negative capacitance by getting mimimum reflection from the junction of two cascaded sections in TDR simulation.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130605299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558355
B. de Vivo, L. Egiziano, P. Lamberti, V. Tucci
In this paper consistent bounds of the wave propagation properties concerning a Single Wall Carbon NanoTube (SWCNT) modeled as a Transmission Line are assessed. The monotonic inclusion property of the Interval Analysis leads to guaranteed limits for the given characteristics when the model parameters are uncertain. The common mode wave propagation in a SWCNT is considered and the variability range of the attenuation constant, the propagation velocity, the wavelength and the characteristic impedance in the frequency range up to 10 GHz due to physical and geometric uncertain parameters are evaluated. The obtained results are verified by means of a Monte Carlo analysis. The proposed approach furnishes a more reliable information than that derived from the classical sensitivity analysis.
{"title":"Range Analysis on the Wave Propagation Properties of a Single Wall Carbon Nano Tube","authors":"B. de Vivo, L. Egiziano, P. Lamberti, V. Tucci","doi":"10.1109/SPI.2008.4558355","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558355","url":null,"abstract":"In this paper consistent bounds of the wave propagation properties concerning a Single Wall Carbon NanoTube (SWCNT) modeled as a Transmission Line are assessed. The monotonic inclusion property of the Interval Analysis leads to guaranteed limits for the given characteristics when the model parameters are uncertain. The common mode wave propagation in a SWCNT is considered and the variability range of the attenuation constant, the propagation velocity, the wavelength and the characteristic impedance in the frequency range up to 10 GHz due to physical and geometric uncertain parameters are evaluated. The obtained results are verified by means of a Monte Carlo analysis. The proposed approach furnishes a more reliable information than that derived from the classical sensitivity analysis.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"807 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123919944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558402
A. Stefanescu, G. Ciuprina, D. Ioan, D. Mihalache
The paper is dedicated to the variability analysis of long interconnects, modeled as transmission lines. The subject deals with the numerical extraction of the parametric models for long interconnect. The novelty consists of the parameterization of the p.u.l. parameters of TL models w.r.t. the geometric parameters, subject to large or small variations. Examples of such variations are either due to design or technology (process or lithography), respectively. The accuracy of the simplest first order models is studied and validated experimentally for both affine and rational variability models.
{"title":"Models for Variability of Transmission Line Structures","authors":"A. Stefanescu, G. Ciuprina, D. Ioan, D. Mihalache","doi":"10.1109/SPI.2008.4558402","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558402","url":null,"abstract":"The paper is dedicated to the variability analysis of long interconnects, modeled as transmission lines. The subject deals with the numerical extraction of the parametric models for long interconnect. The novelty consists of the parameterization of the p.u.l. parameters of TL models w.r.t. the geometric parameters, subject to large or small variations. Examples of such variations are either due to design or technology (process or lithography), respectively. The accuracy of the simplest first order models is studied and validated experimentally for both affine and rational variability models.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"348 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115894834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558342
T. Rahal-Arabi, Hee-Jun Park, Don Nguyen
In this paper we show the measured power consumption of the different subsystems of the notebook with special emphasis on the power delivery subsystem. We prove by measurements that the energy efficiency of many of these subsystems can be significantly improved with a workload adaptive architecture without sacrificing performance at the peak load.
{"title":"Adaptive Power Architecture to Improve Energy Efficiency of The Notebook","authors":"T. Rahal-Arabi, Hee-Jun Park, Don Nguyen","doi":"10.1109/SPI.2008.4558342","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558342","url":null,"abstract":"In this paper we show the measured power consumption of the different subsystems of the notebook with special emphasis on the power delivery subsystem. We prove by measurements that the energy efficiency of many of these subsystems can be significantly improved with a workload adaptive architecture without sacrificing performance at the peak load.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132417896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558333
A. Jussila, J. Takaneva
Contactless interconnection methods are studied as possible alternatives for galvanic interconnection in mobile devices. This is due to ever-increasing requirements for the connector size and bandwidth. Capacitively coupled interconnection is implemented on a PCB level and signal transmission with pulse signaling is demonstrated for 1 MHz, 10 MHz and 40 MHz PRBS signals. Different schemes for signal transmission through a capacitive interconnection are discussed and their potential benefits are evaluated.
{"title":"Contactless Interconnection Methods - Capacitively Coupled Interconnection in Mobile Devices","authors":"A. Jussila, J. Takaneva","doi":"10.1109/SPI.2008.4558333","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558333","url":null,"abstract":"Contactless interconnection methods are studied as possible alternatives for galvanic interconnection in mobile devices. This is due to ever-increasing requirements for the connector size and bandwidth. Capacitively coupled interconnection is implemented on a PCB level and signal transmission with pulse signaling is demonstrated for 1 MHz, 10 MHz and 40 MHz PRBS signals. Different schemes for signal transmission through a capacitive interconnection are discussed and their potential benefits are evaluated.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"7 18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133479209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558407
S. Gaskill, Vikas S. Shilimkar, A. Weisshaar
Modern IC processes require metal fill patterning to achieve global uniformity of the metallization/oxide layers. Electrically these fills are often viewed as parasitics to be minimized. In this paper we actively use metal fill to suppress crosstalk noise between coupled traces by selectively grounding metal fills. However, the tradeoff of this improvement is higher total capacitance leading to increased interconnect delay times. We propose design rules that optimize this tradeoff between crosstalk and delay. The design parameters considered include placement of grounded fills, buffer distance and fill shapes. We show that it is best to start grounding metal fills farthest away from the signal traces.
{"title":"Noise Suppression in VLSI Circuits Using Dummy Metal Fill","authors":"S. Gaskill, Vikas S. Shilimkar, A. Weisshaar","doi":"10.1109/SPI.2008.4558407","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558407","url":null,"abstract":"Modern IC processes require metal fill patterning to achieve global uniformity of the metallization/oxide layers. Electrically these fills are often viewed as parasitics to be minimized. In this paper we actively use metal fill to suppress crosstalk noise between coupled traces by selectively grounding metal fills. However, the tradeoff of this improvement is higher total capacitance leading to increased interconnect delay times. We propose design rules that optimize this tradeoff between crosstalk and delay. The design parameters considered include placement of grounded fills, buffer distance and fill shapes. We show that it is best to start grounding metal fills farthest away from the signal traces.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115586663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558341
Kyoungchoul Koo, J. Shim, Yujeong Shim, Joungho Kim
In this paper, the effect of power supply noise imbalance on 900 MHz differential low noise amplifier (LNA) output is investigated. Chip and package (PKG) power distribution network (PDN) are modeled with lumped components to estimate the power supply noise imbalance. Also an equivalent circuit of differential LNA is modeled to estimate the noise voltage at differential LNA output and verified through measurements. The results of this study reveal that the power supply noise imbalance is mainly caused by impedance resonances of PKG PDN and it directly coupled to the differential LNA output.
{"title":"Modeling and Experimental Verification to Investigate the Effect of Power Supply Noise Imbalance on 900MHz Differential LNA","authors":"Kyoungchoul Koo, J. Shim, Yujeong Shim, Joungho Kim","doi":"10.1109/SPI.2008.4558341","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558341","url":null,"abstract":"In this paper, the effect of power supply noise imbalance on 900 MHz differential low noise amplifier (LNA) output is investigated. Chip and package (PKG) power distribution network (PDN) are modeled with lumped components to estimate the power supply noise imbalance. Also an equivalent circuit of differential LNA is modeled to estimate the noise voltage at differential LNA output and verified through measurements. The results of this study reveal that the power supply noise imbalance is mainly caused by impedance resonances of PKG PDN and it directly coupled to the differential LNA output.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115771496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-05-12DOI: 10.1109/SPI.2008.4558336
N. Stevens, T. Dhaene
In this paper, we present an efficient and compact circuit netlist formulation for rational models. It is shown how to implement the method for several commercially available time domain solvers. Finally, an example is given describing the flow and procedures to follow in order to obtain a reliable and stable transient simulation.
{"title":"Generation of rational model based SPICE circuits for transient simulations","authors":"N. Stevens, T. Dhaene","doi":"10.1109/SPI.2008.4558336","DOIUrl":"https://doi.org/10.1109/SPI.2008.4558336","url":null,"abstract":"In this paper, we present an efficient and compact circuit netlist formulation for rational models. It is shown how to implement the method for several commercially available time domain solvers. Finally, an example is given describing the flow and procedures to follow in order to obtain a reliable and stable transient simulation.","PeriodicalId":142239,"journal":{"name":"2008 12th IEEE Workshop on Signal Propagation on Interconnects","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114429384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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