Pub Date : 2018-11-01DOI: 10.1109/ICRC.2018.8638621
N. T. Nguyen, Garrett T. Kenyon
Just as the brain must infer 3D structure from 2D retinal images, radiologists are tasked with inferring 3D densities from 2D X-rays. Computer simulations suggest that V1 simple cells use lateral inhibition to generate sparse representations that are selective for 3D depth when presented with 2D stereo images and video. Analogously, we cast radiographic inference as a sparse coding problem employing lateral inhibition between binary neurons, resulting in a quadratic unconstrained binary optimization (QUBO)problem suitable for implementation on a quantum annealing D-Wave 2X (1152-qubit)computer. We generated synthetic radiographs by performing discrete Abel transforms on mathematically-defined objects possessing axial (cylindrical)symmetry and whose radially density profile was given by the sum of a randomly-chosen, sparse set of (nearly binary)Fourier components. We used embedding tools to map the above QUBO problem, which involved dense connections between up to 47 Fourier coefficients, onto the very sparsely connected D-Wave chimera. Using quantum inference, we were able to reconstruct reasonably accurate radial density profiles even after adding sufficiently noise to our synthetic radiographs to make inverse Abel transforms untenable. Compared to state-of-the-art classical QUBO solvers, GUROBI and the Hamze-Freitas-Selby algorithm, the quantum D-Wave 2X was orders of magnitude faster for the same final accuracy. Our results indicate a potential strategy for integrating neuromorphic and quantum computing techniques.
{"title":"Radiographic Inference Based on a Model of V1 Simple Cells Implemented on the D-Wave 2X Quantum Annealing Computer","authors":"N. T. Nguyen, Garrett T. Kenyon","doi":"10.1109/ICRC.2018.8638621","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638621","url":null,"abstract":"Just as the brain must infer 3D structure from 2D retinal images, radiologists are tasked with inferring 3D densities from 2D X-rays. Computer simulations suggest that V1 simple cells use lateral inhibition to generate sparse representations that are selective for 3D depth when presented with 2D stereo images and video. Analogously, we cast radiographic inference as a sparse coding problem employing lateral inhibition between binary neurons, resulting in a quadratic unconstrained binary optimization (QUBO)problem suitable for implementation on a quantum annealing D-Wave 2X (1152-qubit)computer. We generated synthetic radiographs by performing discrete Abel transforms on mathematically-defined objects possessing axial (cylindrical)symmetry and whose radially density profile was given by the sum of a randomly-chosen, sparse set of (nearly binary)Fourier components. We used embedding tools to map the above QUBO problem, which involved dense connections between up to 47 Fourier coefficients, onto the very sparsely connected D-Wave chimera. Using quantum inference, we were able to reconstruct reasonably accurate radial density profiles even after adding sufficiently noise to our synthetic radiographs to make inverse Abel transforms untenable. Compared to state-of-the-art classical QUBO solvers, GUROBI and the Hamze-Freitas-Selby algorithm, the quantum D-Wave 2X was orders of magnitude faster for the same final accuracy. Our results indicate a potential strategy for integrating neuromorphic and quantum computing techniques.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121634498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-10-11DOI: 10.1109/ICRC.2018.8638627
Christopher E. Arcadia, Hokchhay Tann, Amanda Dombroski, Kady Ferguson, S. Chen, Eunsuk Kim, Christopher Rose, B. Rubenstein, S. Reda, J. Rosenstein
In this work, we introduce a new type of linear classifier that is implemented in a chemical form. We propose a novel encoding technique which simultaneously represents multiple datasets in an array of microliter-scale chemical mixtures. Parallel computations on these datasets are performed as robotic liquid handling sequences, whose outputs are analyzed by highperformance liquid chromatography. As a proof of concept, we chemically encode several MNIST images of handwritten digits and demonstrate successful chemical-domain classification of the digits using volumetric perceptrons. We additionally quantify the performance of our method with a larger dataset of binary vectors and compare the experimental measurements against predicted results. Paired with appropriate chemical analysis tools, our approach can work on increasingly parallel datasets. We anticipate that related approaches will be scalable to multilayer neural networks and other more complex algorithms. Much like recent demonstrations of archival data storage in DNA, this work blurs the line between chemical and electrical information systems, and offers early insight into the computational efficiency and massive parallelism which may come with computing in chemical domains.
{"title":"Parallelized Linear Classification with Volumetric Chemical Perceptrons","authors":"Christopher E. Arcadia, Hokchhay Tann, Amanda Dombroski, Kady Ferguson, S. Chen, Eunsuk Kim, Christopher Rose, B. Rubenstein, S. Reda, J. Rosenstein","doi":"10.1109/ICRC.2018.8638627","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638627","url":null,"abstract":"In this work, we introduce a new type of linear classifier that is implemented in a chemical form. We propose a novel encoding technique which simultaneously represents multiple datasets in an array of microliter-scale chemical mixtures. Parallel computations on these datasets are performed as robotic liquid handling sequences, whose outputs are analyzed by highperformance liquid chromatography. As a proof of concept, we chemically encode several MNIST images of handwritten digits and demonstrate successful chemical-domain classification of the digits using volumetric perceptrons. We additionally quantify the performance of our method with a larger dataset of binary vectors and compare the experimental measurements against predicted results. Paired with appropriate chemical analysis tools, our approach can work on increasingly parallel datasets. We anticipate that related approaches will be scalable to multilayer neural networks and other more complex algorithms. Much like recent demonstrations of archival data storage in DNA, this work blurs the line between chemical and electrical information systems, and offers early insight into the computational efficiency and massive parallelism which may come with computing in chemical domains.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"109 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131093747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-12DOI: 10.1109/ICRC.2018.8638625
S. Novikov, R. Hinkey, S. Disseler, J. Basham, T. Albash, A. Risinger, D. Ferguson, Daniel A. Lidar, K. Zick
In the quest to reboot computing, quantum annealing (QA) is an interesting candidate for a new capability. While it has not demonstrated an advantage over classical computing on a real-world application, many important regions of the QA design space have yet to be explored. In IARPA's Quantum Enhanced Optimization (QEO) program, we have opened some new lines of inquiry to get to the heart of QA, and are designing testbed superconducting circuits and conducting key experiments. In this paper, we discuss recent experimental progress related to one of the key design dimensions: qubit coherence. Using MIT Lincoln Laboratory's qubit fabrication process and extending recent progress in flux qubits, we are implementing and measuring QA-capable flux qubits. Achieving high coherence in a QA context presents significant new engineering challenges. We report on techniques and preliminary measurement results addressing two of the challenges: crosstalk calibration and qubit readout. This groundwork enables exploration of other promising features and provides a path to understanding the physics and the viability of quantum annealing as a computing resource.
{"title":"Exploring More-Coherent Quantum Annealing","authors":"S. Novikov, R. Hinkey, S. Disseler, J. Basham, T. Albash, A. Risinger, D. Ferguson, Daniel A. Lidar, K. Zick","doi":"10.1109/ICRC.2018.8638625","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638625","url":null,"abstract":"In the quest to reboot computing, quantum annealing (QA) is an interesting candidate for a new capability. While it has not demonstrated an advantage over classical computing on a real-world application, many important regions of the QA design space have yet to be explored. In IARPA's Quantum Enhanced Optimization (QEO) program, we have opened some new lines of inquiry to get to the heart of QA, and are designing testbed superconducting circuits and conducting key experiments. In this paper, we discuss recent experimental progress related to one of the key design dimensions: qubit coherence. Using MIT Lincoln Laboratory's qubit fabrication process and extending recent progress in flux qubits, we are implementing and measuring QA-capable flux qubits. Achieving high coherence in a QA context presents significant new engineering challenges. We report on techniques and preliminary measurement results addressing two of the challenges: crosstalk calibration and qubit readout. This groundwork enables exploration of other promising features and provides a path to understanding the physics and the viability of quantum annealing as a computing resource.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"67 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124814337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-07DOI: 10.1109/ICRC.2018.8638599
J. Shainline
Electrons and photons offer complimentary strengths for information processing. Photons are excellent for communication, while electrons are superior for computation and memory. Cognition requires distributed computation to be communicated across the system for information integration. We present reasoning from neuroscience, network theory, and device physics supporting the conjecture that large-scale cognitive systems will benefit from electronic devices performing synaptic, dendritic, and neuronal information processing operating in conjunction with photonic communication. On the chip scale, integrated dielectric waveguides enable fan-out to thousands of connections. On the system scale, fiber and free-space optics can be employed. The largest cognitive systems will be limited by the distance light can travel during the period of a network oscillation. We calculate that optoelectronic networks the area of a large data center (105 m2) will be capable of system-wide information integration at 1 MHz. At frequencies of cortex-wide integration in the human brain (4 Hz, theta band), optoelectronic systems could integrate information across the surface of the earth.
{"title":"The Largest Cognitive Systems Will be Optoelectronic","authors":"J. Shainline","doi":"10.1109/ICRC.2018.8638599","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638599","url":null,"abstract":"Electrons and photons offer complimentary strengths for information processing. Photons are excellent for communication, while electrons are superior for computation and memory. Cognition requires distributed computation to be communicated across the system for information integration. We present reasoning from neuroscience, network theory, and device physics supporting the conjecture that large-scale cognitive systems will benefit from electronic devices performing synaptic, dendritic, and neuronal information processing operating in conjunction with photonic communication. On the chip scale, integrated dielectric waveguides enable fan-out to thousands of connections. On the system scale, fiber and free-space optics can be employed. The largest cognitive systems will be limited by the distance light can travel during the period of a network oscillation. We calculate that optoelectronic networks the area of a large data center (105 m2) will be capable of system-wide information integration at 1 MHz. At frequencies of cortex-wide integration in the human brain (4 Hz, theta band), optoelectronic systems could integrate information across the surface of the earth.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132184192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The CMOS integrated chips at advanced technology nodes are becoming more vulnerable to various sources of faults like manufacturing imprecisions, variations, aging, etc. Additionally, the intentional fault attacks (e.g., high power microwave, cybersecurity threats, etc.) and environmental effects (i.e., radiation) also pose reliability threats to integrated circuits. Though the traditional hardware redundancy-based techniques like Triple Modular Redundancy (TMR), Quadded Logic (QL) etc. mitigate the risk to some extent, they add huge hardware overhead and are not very effective. Truly polymorphic circuits that are inherently capable of achieving multiple functionalities in a limited footprint could enhance the fault-resilience/recovery of the circuits with limited overhead. We demonstrate a novel crosstalk logic based polymorphic circuit approach to achieve compact and efficient fault resilient circuits. We show a range of polymorphic primitive gates and their usage in an example functional unit. The functional unit is a single arithmetic circuit that is capable of delivering Multiplication/Sorting/Addition output depending on the control inputs. Using such polymorphic computing units in an ALU would imply that a correct path for functional output is possible even when 2/3rd of the ALU is damaged. Moreover, our benchmarking results show that the crosstalk polymorphic logic style achieves 28% and 62% reduction in transistor count compared to existing polymorphic techniques and CMOS based implementation, respectively. In conjunction with fault detection algorithms, the proposed polymorphic circuit concept can be transformative for fault tolerant circuit design directions with minimum overhead.
{"title":"A New Paradigm for Fault-Tolerant Computing with Interconnect Crosstalks","authors":"Naveen Kumar Macha, Bhavana Tejaswini Repalle, Sandeep Geedipally, Rafael Rios, Mostafizur Rahman","doi":"10.1109/ICRC.2018.8638601","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638601","url":null,"abstract":"The CMOS integrated chips at advanced technology nodes are becoming more vulnerable to various sources of faults like manufacturing imprecisions, variations, aging, etc. Additionally, the intentional fault attacks (e.g., high power microwave, cybersecurity threats, etc.) and environmental effects (i.e., radiation) also pose reliability threats to integrated circuits. Though the traditional hardware redundancy-based techniques like Triple Modular Redundancy (TMR), Quadded Logic (QL) etc. mitigate the risk to some extent, they add huge hardware overhead and are not very effective. Truly polymorphic circuits that are inherently capable of achieving multiple functionalities in a limited footprint could enhance the fault-resilience/recovery of the circuits with limited overhead. We demonstrate a novel crosstalk logic based polymorphic circuit approach to achieve compact and efficient fault resilient circuits. We show a range of polymorphic primitive gates and their usage in an example functional unit. The functional unit is a single arithmetic circuit that is capable of delivering Multiplication/Sorting/Addition output depending on the control inputs. Using such polymorphic computing units in an ALU would imply that a correct path for functional output is possible even when 2/3rd of the ALU is damaged. Moreover, our benchmarking results show that the crosstalk polymorphic logic style achieves 28% and 62% reduction in transistor count compared to existing polymorphic techniques and CMOS based implementation, respectively. In conjunction with fault detection algorithms, the proposed polymorphic circuit concept can be transformative for fault tolerant circuit design directions with minimum overhead.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132294226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-05-23DOI: 10.1109/ICRC.2018.8638598
A. McCaskey, E. Dumitrescu, D. Liakh, T. Humble
Recent computations involving quantum processing units (QPUs)have demonstrated a series of challenges inherent to hybrid classical-quantum programming, compilation, execution, and verification and validation. Despite considerable progress, system-level noise, limited low-level instructions sets, remote access models, and an overall lack of portability and classical integration presents near-term programming challenges that must be overcome in order to enable reliable scientific quantum computing and support robust hardware benchmarking. In this work, we draw on our experience in programming QPUs to identify common concerns and challenges, and detail best practices for mitigating these challenges within the current hybrid classical-quantum computing paradigm. Following this discussion, we introduce the XACC quantum compilation and execution framework as a hardware and language independent solution that addresses many of these hybrid programming challenges. XACC supports extensible methodologies for managing a variety of programming, compilation, and execution concerns across the increasingly diverse set of QPUs. We use recent nuclear physics simulations to illustrate how the framework mitigates programming, compilation, and execution challenges and manages the complex workflow present in QPU-enhanced scientific applications. Finally, we codify the resulting hybrid scientific computing workflow in order to identify key areas requiring future improvement.
{"title":"Hybrid Programming for Near-Term Quantum Computing Systems","authors":"A. McCaskey, E. Dumitrescu, D. Liakh, T. Humble","doi":"10.1109/ICRC.2018.8638598","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638598","url":null,"abstract":"Recent computations involving quantum processing units (QPUs)have demonstrated a series of challenges inherent to hybrid classical-quantum programming, compilation, execution, and verification and validation. Despite considerable progress, system-level noise, limited low-level instructions sets, remote access models, and an overall lack of portability and classical integration presents near-term programming challenges that must be overcome in order to enable reliable scientific quantum computing and support robust hardware benchmarking. In this work, we draw on our experience in programming QPUs to identify common concerns and challenges, and detail best practices for mitigating these challenges within the current hybrid classical-quantum computing paradigm. Following this discussion, we introduce the XACC quantum compilation and execution framework as a hardware and language independent solution that addresses many of these hybrid programming challenges. XACC supports extensible methodologies for managing a variety of programming, compilation, and execution concerns across the increasingly diverse set of QPUs. We use recent nuclear physics simulations to illustrate how the framework mitigates programming, compilation, and execution challenges and manages the complex workflow present in QPU-enhanced scientific applications. Finally, we codify the resulting hybrid scientific computing workflow in order to identify key areas requiring future improvement.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122441238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-01-03DOI: 10.1109/ICRC.2018.8638618
Abigail Timmel, John T. Daly
Though optical computing has been unable to compete with CMOS technology in mainstream computing, its natural capacity for computing Fourier transforms gives it an advantage in convolution-type problems. This may make optics a viable approach in post-Moore‘s era computing. This paper presents an optical approach to one suitable yet nontrivial problem: modular multiplication. We first explore the mathematical details of performing a basic optical convolution using lenses and masks. Then we discuss a simulation tool developed by the authors to explore some design considerations for an optical convolution circuit. Finally, we layout an algorithm for performing Montgomery modular multiplication in an optical system along with simulation results for an all-optical implementation. The proposed approach presents an extremely energy efficient solution to computing 16-bit modular multiplication without the need for analog-digital conversions in intermediate steps.
{"title":"Multiplication with Fourier Optics Simulating 16-Bit Modular Multiplication","authors":"Abigail Timmel, John T. Daly","doi":"10.1109/ICRC.2018.8638618","DOIUrl":"https://doi.org/10.1109/ICRC.2018.8638618","url":null,"abstract":"Though optical computing has been unable to compete with CMOS technology in mainstream computing, its natural capacity for computing Fourier transforms gives it an advantage in convolution-type problems. This may make optics a viable approach in post-Moore‘s era computing. This paper presents an optical approach to one suitable yet nontrivial problem: modular multiplication. We first explore the mathematical details of performing a basic optical convolution using lenses and masks. Then we discuss a simulation tool developed by the authors to explore some design considerations for an optical convolution circuit. Finally, we layout an algorithm for performing Montgomery modular multiplication in an optical system along with simulation results for an all-optical implementation. The proposed approach presents an extremely energy efficient solution to computing 16-bit modular multiplication without the need for analog-digital conversions in intermediate steps.","PeriodicalId":169413,"journal":{"name":"2018 IEEE International Conference on Rebooting Computing (ICRC)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-01-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133413937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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