Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374431
H. Shahein, M. Ibrahim
In this paper, a novel model is built for detectors, used in network intrusion detection systems. The model works with a newly developed energy function, which is used in calculating the energies of detectors. An algorithm based on Genetic Algorithms, is developed for the generation of proposed detectors. This algorithm plus the model are tested over both synthetic and real data. Testing of attacks is based on the attacks present in the headers of the TCP/IP packets. Some real attacks have been simulated like WinNuke and Ping of death. For both the real and the synthetic cases, the results are illustratedfor a case ofjust less than 2% and 1% of false negatives.
本文建立了一种用于网络入侵检测系统的检测器模型。该模型与一个新开发的能量函数一起工作，该函数用于计算探测器的能量。提出了一种基于遗传算法的检测器生成算法。在合成数据和实际数据上对该算法和模型进行了验证。攻击测试是基于TCP/IP包头中存在的攻击。一些真实的攻击被模拟，如WinNuke和Ping of death。对于真实的和合成的情况下，结果说明的情况下，只有不到2%和1%的假阴性。
{"title":"Modeling and generation of detectors in artificial immune based network intrusion detection systems","authors":"H. Shahein, M. Ibrahim","doi":"10.1109/ICEEC.2004.1374431","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374431","url":null,"abstract":"In this paper, a novel model is built for detectors, used in network intrusion detection systems. The model works with a newly developed energy function, which is used in calculating the energies of detectors. An algorithm based on Genetic Algorithms, is developed for the generation of proposed detectors. This algorithm plus the model are tested over both synthetic and real data. Testing of attacks is based on the attacks present in the headers of the TCP/IP packets. Some real attacks have been simulated like WinNuke and Ping of death. For both the real and the synthetic cases, the results are illustratedfor a case ofjust less than 2% and 1% of false negatives.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121246440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374489
N. Khachab
This paper presents Current-mode BiCMOS analog cells. These cells are simple, linear and may be used as basic building blocks in many analog circuits, such as multipliers.
{"title":"Current-mode composite BiCMOS cells","authors":"N. Khachab","doi":"10.1109/ICEEC.2004.1374489","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374489","url":null,"abstract":"This paper presents Current-mode BiCMOS analog cells. These cells are simple, linear and may be used as basic building blocks in many analog circuits, such as multipliers.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133946870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374449
M. Ismail
It is essential for companies that develop software today to work on process improvement. However, determining the appropriate and realistic tasking of the process improvement is the key point. Measurements in sojiware organizations are an important source of control over quality and cost in software development. Software metrics are the measurement tools. Those meirics are meaningless without using their information in decisionmaking and improved organizational performance. Effective management of the Software Life Cycle is the key to successful software projects and it is a never-ending challenge. As a multi-national software company, we are targeting increase of productivity and product quality, and to decrease the response time to market. Based on the historical data, we figure out an appropriate estimate to each subtask in the project. Measuring actuals and comparing them with estimates is the tool to revisit our plans for tracking the progress in the project and update them ifneeded. Index Terms Software metrics programs, software development, measurement programs, software engineering.
{"title":"Mprove quality and efficiency of EDA software development","authors":"M. Ismail","doi":"10.1109/ICEEC.2004.1374449","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374449","url":null,"abstract":"It is essential for companies that develop software today to work on process improvement. However, determining the appropriate and realistic tasking of the process improvement is the key point. Measurements in sojiware organizations are an important source of control over quality and cost in software development. Software metrics are the measurement tools. Those meirics are meaningless without using their information in decisionmaking and improved organizational performance. Effective management of the Software Life Cycle is the key to successful software projects and it is a never-ending challenge. As a multi-national software company, we are targeting increase of productivity and product quality, and to decrease the response time to market. Based on the historical data, we figure out an appropriate estimate to each subtask in the project. Measuring actuals and comparing them with estimates is the tool to revisit our plans for tracking the progress in the project and update them ifneeded. Index Terms Software metrics programs, software development, measurement programs, software engineering.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134402526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374429
A. Allam, I. I. Ibrahim, I. Ali, A.E.H. Elsawy
Fiat and Shamir have proposed to use ZeroKnowledge interactive proofs to obtain secure identification mechanisms. Zero-Knowledge protocols are designed to address the identification service, by allowing a prover to demonstrate knowledge of a secret while revealing no information to be use by the verifier to convey the demonstration of knowledge to others. The invention of an efficient Zero-Knowledge identification scheme has provided anther public-key cryptosystem besides the renowned Fiat-Shamir scheme, for which in addition to the identification feature both key exchange and mutual identification are available. The availability of the elliptic curve discrete logarithm problem made the invented scheme very efficient. The purpose of this paper is to show the security level performance of our scheme and show its ability to resist the brute-force attack of an unauthorized prover.
{"title":"The performance of an efficient zero-knowledge identification scheme","authors":"A. Allam, I. I. Ibrahim, I. Ali, A.E.H. Elsawy","doi":"10.1109/ICEEC.2004.1374429","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374429","url":null,"abstract":"Fiat and Shamir have proposed to use ZeroKnowledge interactive proofs to obtain secure identification mechanisms. Zero-Knowledge protocols are designed to address the identification service, by allowing a prover to demonstrate knowledge of a secret while revealing no information to be use by the verifier to convey the demonstration of knowledge to others. The invention of an efficient Zero-Knowledge identification scheme has provided anther public-key cryptosystem besides the renowned Fiat-Shamir scheme, for which in addition to the identification feature both key exchange and mutual identification are available. The availability of the elliptic curve discrete logarithm problem made the invented scheme very efficient. The purpose of this paper is to show the security level performance of our scheme and show its ability to resist the brute-force attack of an unauthorized prover.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134486734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374561
H. Fadel, K. Elsayed, A. Nassar
Abstruct-The localized QoS routing techniques were proposed to achieve acceptable performance without exchanging global state information over the network. In such techniques the source nodes can estimate the network state and make the routing decision locally, hence reducing the signaling traffic at core routers and other network elements. However, using only locally collected information to make routing decision is not a completely reliable technique to achieve trusted QoS performance. The Localized Multi-Path Selection (LMPS) approach is proposed in this paper to overcome the common drawbacks of the localized techniques. The LMPS technique is a multi-path selection algorithm, which selects paths that are capable of satisfying the bandwidth requirement of the call, while at the same time trying to avoid the overloaded links to minimize the overall blocking ratio in the network.
{"title":"Localized quality of service multi-path routing in VoIP networks","authors":"H. Fadel, K. Elsayed, A. Nassar","doi":"10.1109/ICEEC.2004.1374561","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374561","url":null,"abstract":"Abstruct-The localized QoS routing techniques were proposed to achieve acceptable performance without exchanging global state information over the network. In such techniques the source nodes can estimate the network state and make the routing decision locally, hence reducing the signaling traffic at core routers and other network elements. However, using only locally collected information to make routing decision is not a completely reliable technique to achieve trusted QoS performance. The Localized Multi-Path Selection (LMPS) approach is proposed in this paper to overcome the common drawbacks of the localized techniques. The LMPS technique is a multi-path selection algorithm, which selects paths that are capable of satisfying the bandwidth requirement of the call, while at the same time trying to avoid the overloaded links to minimize the overall blocking ratio in the network.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123658631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374525
G. B. Abadir, W. Fikry, H. Ragai, O. A. Omar
In this work we present a simulation s t u 4 for single events in n’-p junctions. The s t u 4 investigates the variation of both the single-event induced current and the consequent collected charge with bias, substrate doping and minority carrier lifetime. We show that the minority carrier lifetime is the key factor in determining the amount of the total collected charge. We suggest that the reduction of the minority carrier lifetime in the substrate renders the device more immune against single events.
{"title":"A simulation study of single events in n/sup +/-p junctions","authors":"G. B. Abadir, W. Fikry, H. Ragai, O. A. Omar","doi":"10.1109/ICEEC.2004.1374525","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374525","url":null,"abstract":"In this work we present a simulation s t u 4 for single events in n’-p junctions. The s t u 4 investigates the variation of both the single-event induced current and the consequent collected charge with bias, substrate doping and minority carrier lifetime. We show that the minority carrier lifetime is the key factor in determining the amount of the total collected charge. We suggest that the reduction of the minority carrier lifetime in the substrate renders the device more immune against single events.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114968064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374559
Ola A. Al-Sonosy, A. El-Nahas, A. Hamad
We consider the problem of locating mobile users in wireless networks with the focus on minimizing the overall cost incurred by the two main activities involved, mainly lookup and update. We propose a location update protocol that relies on the deployment of prediction techniques along with the Direction Based Update algorithm. The proposed protocol is implemented over both random walk and random waypoint mobility patterns. The results obtained proved a reduction in the overall cost up to 47% compared to the direction based location update scheme with line paging for random waypoint mobility pattern.
{"title":"Predictive direction location update scheme for next generation PCS networks","authors":"Ola A. Al-Sonosy, A. El-Nahas, A. Hamad","doi":"10.1109/ICEEC.2004.1374559","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374559","url":null,"abstract":"We consider the problem of locating mobile users in wireless networks with the focus on minimizing the overall cost incurred by the two main activities involved, mainly lookup and update. We propose a location update protocol that relies on the deployment of prediction techniques along with the Direction Based Update algorithm. The proposed protocol is implemented over both random walk and random waypoint mobility patterns. The results obtained proved a reduction in the overall cost up to 47% compared to the direction based location update scheme with line paging for random waypoint mobility pattern.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122562919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374512
A. Keshk
Bridging faults and fault disturbances models ofjlash memories are presented in this work. Simulation results show that some of bridging faults are cause disturbances to the same row or column cells. New test algorithm for testing bridging faults and disturbances are proposed. The test length of the proposed method is shorter than the previous methods, which considered only disturbance faults.
{"title":"Flash memory testing for realistic fault modeling ICEEC2004","authors":"A. Keshk","doi":"10.1109/ICEEC.2004.1374512","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374512","url":null,"abstract":"Bridging faults and fault disturbances models ofjlash memories are presented in this work. Simulation results show that some of bridging faults are cause disturbances to the same row or column cells. New test algorithm for testing bridging faults and disturbances are proposed. The test length of the proposed method is shorter than the previous methods, which considered only disturbance faults.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122814749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2004-09-05DOI: 10.1109/ICEEC.2004.1374631
M. Azab
This paper proposes a new control schemes for three phase PWM rectifiers which is easy to implement. The method is based on decoupled control of instantaneous active and reactive power components, where the corresponding reference ac line currents are obtained using two PI-controllers loops. One PI controller is for the active power loop and the other is for the reactive power component. This scheme can be considered as simplified direct power control valid for both three-phase and single-phase PWM rectifiers. Both dynamic and steady state performance are studied. According to the obtained results, the control scheme offers several advantages such as: control of dc side voltage, fast dynamic performance, and sinusoidal ac line currents. Moreover, the proposed scheme does not require high sampling rates which was the major drawback of conventional direct power control strategy.
{"title":"Decoupled control of active and reactive power for three phase PWM rectifiers","authors":"M. Azab","doi":"10.1109/ICEEC.2004.1374631","DOIUrl":"https://doi.org/10.1109/ICEEC.2004.1374631","url":null,"abstract":"This paper proposes a new control schemes for three phase PWM rectifiers which is easy to implement. The method is based on decoupled control of instantaneous active and reactive power components, where the corresponding reference ac line currents are obtained using two PI-controllers loops. One PI controller is for the active power loop and the other is for the reactive power component. This scheme can be considered as simplified direct power control valid for both three-phase and single-phase PWM rectifiers. Both dynamic and steady state performance are studied. According to the obtained results, the control scheme offers several advantages such as: control of dc side voltage, fast dynamic performance, and sinusoidal ac line currents. Moreover, the proposed scheme does not require high sampling rates which was the major drawback of conventional direct power control strategy.","PeriodicalId":180043,"journal":{"name":"International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04.","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122891550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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