Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7125045
K. Malarvizhi, Madhusudan Kumar
SRM motors due to simple mechanical design have significant role in high speed operations and hence require faster control of rotor speed and minimized torque ripple. Proposed work uses Particle Swarm Optimization (PSO) for the tuning of the Emotional Learning controller (BELBIC). PSO is used for tuning the training coefficients of the BELBIC and maximizing the reward of the system to provide minimized speed settling time. The simulation is performed on an 8/6 SRM in MATLAB r2012a version. The operation of 8/6 SRM motor is compared by using a simple PID controller, a BELBIC Controller and a PSO tuned BELBIC controller. PSO tuned BELBIC controller shows higher operational efficiency compared to the other two methods.
{"title":"Particle Swarm Optimization tuned BELBIC controller for 8/6 SRM operation","authors":"K. Malarvizhi, Madhusudan Kumar","doi":"10.1109/ECS.2015.7125045","DOIUrl":"https://doi.org/10.1109/ECS.2015.7125045","url":null,"abstract":"SRM motors due to simple mechanical design have significant role in high speed operations and hence require faster control of rotor speed and minimized torque ripple. Proposed work uses Particle Swarm Optimization (PSO) for the tuning of the Emotional Learning controller (BELBIC). PSO is used for tuning the training coefficients of the BELBIC and maximizing the reward of the system to provide minimized speed settling time. The simulation is performed on an 8/6 SRM in MATLAB r2012a version. The operation of 8/6 SRM motor is compared by using a simple PID controller, a BELBIC Controller and a PSO tuned BELBIC controller. PSO tuned BELBIC controller shows higher operational efficiency compared to the other two methods.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114974958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7124794
A. Manikandan, J. Ajayan, C. Kavin, S. Karthick, D. Nirmal
Dynamic comparators are widely being used in high speed Analog to Digital Converters (ADC) such as flash ADC's because of its low voltage, low power, high speed and area efficiency. In this paper, an analysis on the delay and power performance of strained silicon CMOS technology based dynamic comparators will be presented. To compare the performance of dynamic comparators, test circuits were simulated using 45nm high performance and low power technologies with a supply voltage of 0.8V using spice tools. Using circuit simulations, the overall improved characteristics of double tail dynamic comparator are demonstrated in comparison to those of the traditional as well as several state of the art dynamic comparators. The simulation results shows that in the dynamic double tail comparator both the power consumption and the time delay are reduced significantly.
{"title":"A comparative study of high performance dynamic comparators using strained silicon technology","authors":"A. Manikandan, J. Ajayan, C. Kavin, S. Karthick, D. Nirmal","doi":"10.1109/ECS.2015.7124794","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124794","url":null,"abstract":"Dynamic comparators are widely being used in high speed Analog to Digital Converters (ADC) such as flash ADC's because of its low voltage, low power, high speed and area efficiency. In this paper, an analysis on the delay and power performance of strained silicon CMOS technology based dynamic comparators will be presented. To compare the performance of dynamic comparators, test circuits were simulated using 45nm high performance and low power technologies with a supply voltage of 0.8V using spice tools. Using circuit simulations, the overall improved characteristics of double tail dynamic comparator are demonstrated in comparison to those of the traditional as well as several state of the art dynamic comparators. The simulation results shows that in the dynamic double tail comparator both the power consumption and the time delay are reduced significantly.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125279236","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7125048
C. Evangeline, N. M. Sivamangai
Testing simple circuits or digital blocks can be actually done easily but testing a complex circuits before it is implemented is a challenge. To accomplish such testing, this paper presents a fault injection technique using package to inject transient and permanent fault at the VHDL level description of both combinational and sequential digital circuits to verify the testability of the circuits using online and offline testing. Injection of permanent fault and transient fault are done in the digital circuits such as 4 bit adder, 4 bit counter, two benchmark circuits C17 and S27 and their testabilities are evaluated. Fault coverage for permanent fault and transient fault is found to be 95% and 100% respectively.
{"title":"Evaluation of testability of digital circuits by fault injection technique","authors":"C. Evangeline, N. M. Sivamangai","doi":"10.1109/ECS.2015.7125048","DOIUrl":"https://doi.org/10.1109/ECS.2015.7125048","url":null,"abstract":"Testing simple circuits or digital blocks can be actually done easily but testing a complex circuits before it is implemented is a challenge. To accomplish such testing, this paper presents a fault injection technique using package to inject transient and permanent fault at the VHDL level description of both combinational and sequential digital circuits to verify the testability of the circuits using online and offline testing. Injection of permanent fault and transient fault are done in the digital circuits such as 4 bit adder, 4 bit counter, two benchmark circuits C17 and S27 and their testabilities are evaluated. Fault coverage for permanent fault and transient fault is found to be 95% and 100% respectively.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126174283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7125013
Indranil Acharya, A. Chauhan, Snehanshu Sengupta
This paper is concerned with the design of a novel MEMS helical antenna that is mainly incorporated for Terahertz (THz) applications. The antenna comprises of a metal helix and a CPW feed on the substrate. The antenna can be fabricated using only one wafer and it has high packaging density. For THz applications the antenna parameters has been optimised so that desired performance can be achieved. Moreover low fabrication cost makes this antenna suitable for terahertz systems.
{"title":"Gain enhancement of MEMS helix antenna using double substrate and fractal structures","authors":"Indranil Acharya, A. Chauhan, Snehanshu Sengupta","doi":"10.1109/ECS.2015.7125013","DOIUrl":"https://doi.org/10.1109/ECS.2015.7125013","url":null,"abstract":"This paper is concerned with the design of a novel MEMS helical antenna that is mainly incorporated for Terahertz (THz) applications. The antenna comprises of a metal helix and a CPW feed on the substrate. The antenna can be fabricated using only one wafer and it has high packaging density. For THz applications the antenna parameters has been optimised so that desired performance can be achieved. Moreover low fabrication cost makes this antenna suitable for terahertz systems.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130118450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7125027
S. Akram, K. Shambavi, Z. C. Alex
Design and performance measures of a printed multi strip monopole antenna for ultra-wideband application are presented. The proposed antenna consist of six quarter wavelength strips of different resonating frequency combined in a manner to provide wideband width. It operates in the frequency range 2.51~10.61GHz with impedance bandwidth of 8.1 GHz. The radiation pattern is nearly Omni directional in the Azimuthal plane and bidirectional in the elevation plane and the consistency of the radiation pattern exist for almost for all frequency in the operating band.
{"title":"Design of printed strip monopole antenna for UWB applications","authors":"S. Akram, K. Shambavi, Z. C. Alex","doi":"10.1109/ECS.2015.7125027","DOIUrl":"https://doi.org/10.1109/ECS.2015.7125027","url":null,"abstract":"Design and performance measures of a printed multi strip monopole antenna for ultra-wideband application are presented. The proposed antenna consist of six quarter wavelength strips of different resonating frequency combined in a manner to provide wideband width. It operates in the frequency range 2.51~10.61GHz with impedance bandwidth of 8.1 GHz. The radiation pattern is nearly Omni directional in the Azimuthal plane and bidirectional in the elevation plane and the consistency of the radiation pattern exist for almost for all frequency in the operating band.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128503256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7124809
Santanu Kumar Dash, S. Mohanty
An ideal multi-objective optimization method for economic emission load dispatch (EELD) with non-linear fuel cost and emission level functions in power system operation is presented. In this paper, the problem treats economy, emission, and transmission line security as vital objectives. The load constraints and operating constraints are taken into account. Assuming goals for individual objective functions, the multi-objective problem is converted into a unique-objective optimization by the goal-attainment method, which is then taken care of by the simulated annealing (SA) technique. The solution can offer a best compromising solution in a sense close to the requirements of the system designer. Results for 30-bus, 57-bus, 118-bus IEEE test case system have been utilized to demonstrate the applicability and authenticity of the proposed method.
{"title":"Multi-objective economic emission load dispatch with nonlinear fuel cost and noninferior emission level functions for IEEE-118 bus system","authors":"Santanu Kumar Dash, S. Mohanty","doi":"10.1109/ECS.2015.7124809","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124809","url":null,"abstract":"An ideal multi-objective optimization method for economic emission load dispatch (EELD) with non-linear fuel cost and emission level functions in power system operation is presented. In this paper, the problem treats economy, emission, and transmission line security as vital objectives. The load constraints and operating constraints are taken into account. Assuming goals for individual objective functions, the multi-objective problem is converted into a unique-objective optimization by the goal-attainment method, which is then taken care of by the simulated annealing (SA) technique. The solution can offer a best compromising solution in a sense close to the requirements of the system designer. Results for 30-bus, 57-bus, 118-bus IEEE test case system have been utilized to demonstrate the applicability and authenticity of the proposed method.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128503365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7124917
A. Abinaya, S. Sivaranjani
Power reduction plays a vital role in VLSI design. Multi-bit flip-flop is an efficient method for clock power reduction. This method is to eliminate the redundant inverters by merging some flip-flops into multi-bit flip-flops. This multi-bit flip-flops can share the drive strength, dynamic power, area of the inverter chain and can even save the clock network power and facilitate the skew control. Firstly flip-flops that can be merged are identified based on synchronous clock signal and then a combination table is built to define the possible combination of flip-flops and finally a hierarchical way is used to merge flip-flops.
{"title":"Efficient flip-flop merging technique for clock power reduction","authors":"A. Abinaya, S. Sivaranjani","doi":"10.1109/ECS.2015.7124917","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124917","url":null,"abstract":"Power reduction plays a vital role in VLSI design. Multi-bit flip-flop is an efficient method for clock power reduction. This method is to eliminate the redundant inverters by merging some flip-flops into multi-bit flip-flops. This multi-bit flip-flops can share the drive strength, dynamic power, area of the inverter chain and can even save the clock network power and facilitate the skew control. Firstly flip-flops that can be merged are identified based on synchronous clock signal and then a combination table is built to define the possible combination of flip-flops and finally a hierarchical way is used to merge flip-flops.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125008835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This research is basically on the advancement and combination of concept of security and medical aid i.e. about a device which is able to fulfill both the aspects mentioned above. The research imposes a theoretical concept of a robot attached with the sensors and other modified technologies of 21st century like DTMF, GSM, Laser Lidar Sensor etc. which while combined together imposes the birth of a device that can help a person lying on bed and allows him to perform different tasks only by the movement of his hands in his whole premise. Based on the GSM technique the user's concerned peoples can be easily informed about the condition of patient who is on bed.
{"title":"Home assistant: An ease to home & patient's","authors":"Prasun Shrivastava, Vikram Lodhi, Abhishek Chauhan, Rishabh Sharma","doi":"10.1109/ECS.2015.7124826","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124826","url":null,"abstract":"This research is basically on the advancement and combination of concept of security and medical aid i.e. about a device which is able to fulfill both the aspects mentioned above. The research imposes a theoretical concept of a robot attached with the sensors and other modified technologies of 21st century like DTMF, GSM, Laser Lidar Sensor etc. which while combined together imposes the birth of a device that can help a person lying on bed and allows him to perform different tasks only by the movement of his hands in his whole premise. Based on the GSM technique the user's concerned peoples can be easily informed about the condition of patient who is on bed.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130776296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7124983
Ranjeet Kumar, Anil Kumar
An Electrocardiogram (ECG) signal compression becomes more area of interest due to increases demand of tel-e-healthcare system. In this manuscript, dual tree discrete wavelet decomposition (DT-DWT) based ECG signal compression is exploited using zero run-length coding techniques. The main advancement of proposed technique, its sensitivity of generating sparse data set that helps to enhance compression performance of system. Performance of method evaluated through compression ratio and percentage root-mean square difference and quality evaluated using the cross correlation between the original and reconstructed MIT-BIH records. As discuses in results, proposed method is good as compare to earlier developed techniques in term of compression.
{"title":"Dual tree DWT analysis based electrocardiogram signal compression using zero coding technique","authors":"Ranjeet Kumar, Anil Kumar","doi":"10.1109/ECS.2015.7124983","DOIUrl":"https://doi.org/10.1109/ECS.2015.7124983","url":null,"abstract":"An Electrocardiogram (ECG) signal compression becomes more area of interest due to increases demand of tel-e-healthcare system. In this manuscript, dual tree discrete wavelet decomposition (DT-DWT) based ECG signal compression is exploited using zero run-length coding techniques. The main advancement of proposed technique, its sensitivity of generating sparse data set that helps to enhance compression performance of system. Performance of method evaluated through compression ratio and percentage root-mean square difference and quality evaluated using the cross correlation between the original and reconstructed MIT-BIH records. As discuses in results, proposed method is good as compare to earlier developed techniques in term of compression.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116045727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-06-18DOI: 10.1109/ECS.2015.7125019
A. N. Subramonium, Prakhyath Shetty, M. Kumar
In this paper the more precise mathematical modeling of Permanent Magnet Brushless DC Motor (PMBLDC) has been presented. This is required for accurate real time applications of PMBDLC drive. The electronic and communication system of this motor drive is a power processing unit (PPU). The technological growth of the 21st century in microelectronics and control has resulted in powerful linear integrated circuits, microcontrollers and digital signal processors. In addition, the development in semiconductor technology also made it possible to significantly handle the voltage and current capabilities and the switching speeds of semiconductor devices which are the integral part of the Power Processing Unit (PPU). The Digital Signal Processors (DSPs) are used for real-time control. This requires efficient performance of the control for which steady state and transient model of the PMBLDC motor are necessary. The developed model is simulated using Matlab/ Simulink to confer the operating behavior of the drive prior to the implementation.
{"title":"Closed loop control system modeling of Permanent Magnet Brushless DC Motor","authors":"A. N. Subramonium, Prakhyath Shetty, M. Kumar","doi":"10.1109/ECS.2015.7125019","DOIUrl":"https://doi.org/10.1109/ECS.2015.7125019","url":null,"abstract":"In this paper the more precise mathematical modeling of Permanent Magnet Brushless DC Motor (PMBLDC) has been presented. This is required for accurate real time applications of PMBDLC drive. The electronic and communication system of this motor drive is a power processing unit (PPU). The technological growth of the 21st century in microelectronics and control has resulted in powerful linear integrated circuits, microcontrollers and digital signal processors. In addition, the development in semiconductor technology also made it possible to significantly handle the voltage and current capabilities and the switching speeds of semiconductor devices which are the integral part of the Power Processing Unit (PPU). The Digital Signal Processors (DSPs) are used for real-time control. This requires efficient performance of the control for which steady state and transient model of the PMBLDC motor are necessary. The developed model is simulated using Matlab/ Simulink to confer the operating behavior of the drive prior to the implementation.","PeriodicalId":202856,"journal":{"name":"2015 2nd International Conference on Electronics and Communication Systems (ICECS)","volume":"78 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121013771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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