Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346730
Arshi Dhammi, M. Singh
In today's scenario, cyber security is one of the major concerns in network security and malware pose a serious threat to cyber security. The foremost step to guard the cyber system is to have an in-depth knowledge of the existing malware, various types of malware, methods of detecting and bypassing the adverse effects of malware. In this work, machine learning approach to the fore-going static and dynamic analysis techniques is investigated and reported to discuss the most recent trends in cyber security. The study captures a wide variety of samples from various online sources. The peculiar details about the malware such as file details, signatures, and hosts involved, affected files, registry keys, mutexes, section details, imports, strings and results from different antivirus have been deeply analyzed to conclude origin and functionality of malware. This approach contributes to vital cyber situation awareness by combining different malware discovery techniques, for example, static examination, to alter the session of malware triage for cyber defense and decreases the count of false alarms. Current trends in warfare have been determined.
{"title":"Behavior analysis of malware using machine learning","authors":"Arshi Dhammi, M. Singh","doi":"10.1109/IC3.2015.7346730","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346730","url":null,"abstract":"In today's scenario, cyber security is one of the major concerns in network security and malware pose a serious threat to cyber security. The foremost step to guard the cyber system is to have an in-depth knowledge of the existing malware, various types of malware, methods of detecting and bypassing the adverse effects of malware. In this work, machine learning approach to the fore-going static and dynamic analysis techniques is investigated and reported to discuss the most recent trends in cyber security. The study captures a wide variety of samples from various online sources. The peculiar details about the malware such as file details, signatures, and hosts involved, affected files, registry keys, mutexes, section details, imports, strings and results from different antivirus have been deeply analyzed to conclude origin and functionality of malware. This approach contributes to vital cyber situation awareness by combining different malware discovery techniques, for example, static examination, to alter the session of malware triage for cyber defense and decreases the count of false alarms. Current trends in warfare have been determined.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128884157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346683
Parakrant Sarkar, K. S. Rao
Generally in Text-to-Speech synthesis (TTS) systems, pause prediction plays a vital role in synthesizing natural and expressive speech. In storytelling style, pauses introduce suspense and climax by emphasizing the prominent words or emotion-salient words in a story. The objective of this work is to analyze and model the pause pattern to capture the story-semantic information. The purpose of this paper is to define a stepping stone towards developing a Story TTS based on modes of discourse. In this work, we base our analysis of the pauses in Hindi children stories for each mode of discourse: narrative, descriptive and dialogue. After grouping the sentences into modes, we analyse the pause pattern to capture the story-semantic information. A three stage data-driven method is proposed to predict the location and duration of pauses for each mode. Both the objective as well as subjective test are conducted to evaluate the performance of the proposed method. The subjective evaluation indicates that subjects appreciates the quality of synthesized speech by incorporating the proposed model.
{"title":"Analysis and modeling pauses for synthesis of storytelling speech based on discourse modes","authors":"Parakrant Sarkar, K. S. Rao","doi":"10.1109/IC3.2015.7346683","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346683","url":null,"abstract":"Generally in Text-to-Speech synthesis (TTS) systems, pause prediction plays a vital role in synthesizing natural and expressive speech. In storytelling style, pauses introduce suspense and climax by emphasizing the prominent words or emotion-salient words in a story. The objective of this work is to analyze and model the pause pattern to capture the story-semantic information. The purpose of this paper is to define a stepping stone towards developing a Story TTS based on modes of discourse. In this work, we base our analysis of the pauses in Hindi children stories for each mode of discourse: narrative, descriptive and dialogue. After grouping the sentences into modes, we analyse the pause pattern to capture the story-semantic information. A three stage data-driven method is proposed to predict the location and duration of pauses for each mode. Both the objective as well as subjective test are conducted to evaluate the performance of the proposed method. The subjective evaluation indicates that subjects appreciates the quality of synthesized speech by incorporating the proposed model.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"1935 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128969895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Substitution boxes are the indispensable part of block ciphering techniques such as AES, DES, IDEA, etc. It is important to design effective S-boxes in an efficient way. In this paper, a method to generate effective S-boxes is proposed. A new technique is suggested to produce the input S-boxes candidates. An initial S-box is obtained by sampling the trajectory of chaotic maps followed by raster and zigzag pattern scanning are performed to further enhance the quality of S-box. Iterating it 1000 times and the best S-box among them is chosen to be given as input S-box. Then a composition is applied on the selected k S-boxes. The generated S-box is tested against different performance criteria. The results of performance tests depict good cryptographic strength and prove it to be the promising method to design a nonlinear component for strong block cipher.
{"title":"Designing chaos based strong substitution box","authors":"Musheer Ahmad, Faiyaz Ahmad, Zeba Nasim, Zohra Bano, Shadab Zafar","doi":"10.1109/IC3.2015.7346660","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346660","url":null,"abstract":"Substitution boxes are the indispensable part of block ciphering techniques such as AES, DES, IDEA, etc. It is important to design effective S-boxes in an efficient way. In this paper, a method to generate effective S-boxes is proposed. A new technique is suggested to produce the input S-boxes candidates. An initial S-box is obtained by sampling the trajectory of chaotic maps followed by raster and zigzag pattern scanning are performed to further enhance the quality of S-box. Iterating it 1000 times and the best S-box among them is chosen to be given as input S-box. Then a composition is applied on the selected k S-boxes. The generated S-box is tested against different performance criteria. The results of performance tests depict good cryptographic strength and prove it to be the promising method to design a nonlinear component for strong block cipher.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129383814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346734
P. Sasipriya, V. S. K. Bhaaskaran
The paper presents the comprehensive analysis and evaluation of static adiabatic logic circuits operated by two phase sinusoidal clock signals. The static adiabatic logic has an advantage in the form of reduction in switching energy while comparing with the dynamic adiabatic logic. This advantage is realized due to the fact that the discharging operation at a node happens only when the input signal transition demands a change in the state of the output. Or in other words, if the next input state happens to be the same as the present state, the charged output nodal state remains the same, without undergoing any recovery phase. The analysis of the static adiabatic logic is done using a carry look ahead adder (CLA) implemented by static adiabatic families, namely, QSERL, CEPAL, ASL and QSECRL and comparing them against the static CMOS counterpart. The performance of each of the circuit is studied in terms of the frequency and power clock voltage range of operation. The simulations show that the 8-bit CLA static adiabatic adder realizes energy reduction from 45% to 83% over a frequency range of 100 KHz to 500MHz operation against the static CMOS implementation. The analyses were carried out using SPICE EDA tools using 180 nm technology library from TSMC.
{"title":"Two phase sinusoidal power clocked quasi-static adiabatic logic families","authors":"P. Sasipriya, V. S. K. Bhaaskaran","doi":"10.1109/IC3.2015.7346734","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346734","url":null,"abstract":"The paper presents the comprehensive analysis and evaluation of static adiabatic logic circuits operated by two phase sinusoidal clock signals. The static adiabatic logic has an advantage in the form of reduction in switching energy while comparing with the dynamic adiabatic logic. This advantage is realized due to the fact that the discharging operation at a node happens only when the input signal transition demands a change in the state of the output. Or in other words, if the next input state happens to be the same as the present state, the charged output nodal state remains the same, without undergoing any recovery phase. The analysis of the static adiabatic logic is done using a carry look ahead adder (CLA) implemented by static adiabatic families, namely, QSERL, CEPAL, ASL and QSECRL and comparing them against the static CMOS counterpart. The performance of each of the circuit is studied in terms of the frequency and power clock voltage range of operation. The simulations show that the 8-bit CLA static adiabatic adder realizes energy reduction from 45% to 83% over a frequency range of 100 KHz to 500MHz operation against the static CMOS implementation. The analyses were carried out using SPICE EDA tools using 180 nm technology library from TSMC.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131210579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346729
Ruby Ansar, Prachi Upadhyay, Manish Singhal, Ashish Sharma, M. Gaur
Prolong advancements in technology scaling over the past few years eventually leads to the development of multi core processors. Network On Chip architecture is a promising paradigm to attain higher network density in high performance multi core computing systems. In today's scenario, with the growing number of transistors, power density is becoming prominent issue in the network design. Therefore, the researchers are constantly focusing on accurate estimation of system power which ultimately leads to system reliability enhancement. In this paper, an experimental setup is formulated to analyze the working of multi-Vt NoC routers and their impacts on system power. Different life time distribution schemes are adopted for accurate reliability estimation. We have done the power analysis on the basis of multi-threshold voltage cells which is a low power technique i.e. low Vt (LVT), normal Vt (NVT) and high Vt (HVT) routers and reliability analysis by using two life time distributions i.e. lognormal and weibull and have compared their results. We have also done the comparative analysis with the previous integrated power model on the basis of reliability, transistor performance, architectural and technological parameters. The reliability results by weibull distribution for LVT routers shows 35% degradation as compared to HVT routers and for lognormal the difference is 56%.
{"title":"Characterizing impacts of multi-Vt routers on power and reliability of Network-on-Chip","authors":"Ruby Ansar, Prachi Upadhyay, Manish Singhal, Ashish Sharma, M. Gaur","doi":"10.1109/IC3.2015.7346729","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346729","url":null,"abstract":"Prolong advancements in technology scaling over the past few years eventually leads to the development of multi core processors. Network On Chip architecture is a promising paradigm to attain higher network density in high performance multi core computing systems. In today's scenario, with the growing number of transistors, power density is becoming prominent issue in the network design. Therefore, the researchers are constantly focusing on accurate estimation of system power which ultimately leads to system reliability enhancement. In this paper, an experimental setup is formulated to analyze the working of multi-Vt NoC routers and their impacts on system power. Different life time distribution schemes are adopted for accurate reliability estimation. We have done the power analysis on the basis of multi-threshold voltage cells which is a low power technique i.e. low Vt (LVT), normal Vt (NVT) and high Vt (HVT) routers and reliability analysis by using two life time distributions i.e. lognormal and weibull and have compared their results. We have also done the comparative analysis with the previous integrated power model on the basis of reliability, transistor performance, architectural and technological parameters. The reliability results by weibull distribution for LVT routers shows 35% degradation as compared to HVT routers and for lognormal the difference is 56%.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125341951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346726
Anand Kumar Gupta, Neetu Sardana
Link prediction is a key task to identify the future links among existing non-connected members of a network, by measuring the proximity between nodes in a network. Node neighbourhood based link prediction techniques are immensely used for prediction of future links. These techniques can be applied on various applications like biological protein- protein interaction network, social network, information network and citation network to predict the future links. Every network has got certain structural properties. For predicting the accuracy of future links, structural properties might play an important role. Current work is an effort to find out the correlation between structural properties of network and prediction accuracy. Positive Correlation will signify that knowing the structural properties of a Network will assist us to know the prediction accuracy in advance.
{"title":"Significance of Clustering Coefficient over Jaccard Index","authors":"Anand Kumar Gupta, Neetu Sardana","doi":"10.1109/IC3.2015.7346726","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346726","url":null,"abstract":"Link prediction is a key task to identify the future links among existing non-connected members of a network, by measuring the proximity between nodes in a network. Node neighbourhood based link prediction techniques are immensely used for prediction of future links. These techniques can be applied on various applications like biological protein- protein interaction network, social network, information network and citation network to predict the future links. Every network has got certain structural properties. For predicting the accuracy of future links, structural properties might play an important role. Current work is an effort to find out the correlation between structural properties of network and prediction accuracy. Positive Correlation will signify that knowing the structural properties of a Network will assist us to know the prediction accuracy in advance.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124660509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346723
Joyeeta Goswami, Shirsha Ghosh, Shivaditya Katiyar, A. Majumder
Due to the extreme fast movement of traffic in the busy localities, the cases of road accidents are increasing day by day. Traffic Control Board made different speed limit for different places to limit the speed, but it is not possible to always monitor the infringements manually due to several factors. This paper proposes development of a prototype by which the Traffic Control Board automatically gets the details of the over speed vehicles in any place. Specifically, a network of Master XBees are installed in every locality that will broadcast the information regarding the speed limit of the region. The vehicle will have a device that has a CPU, a speedometer along with another XBee. This XBee will get the speed limit of the region from the Master XBee and the CPU will compare that with the instantaneous speed of the vehicle. If the instantaneous speed is higher than the speed limit of the region then a warning message will be displayed and a particular time slot is given to check the speed. After the time if the speed is not reduced, then the information regarding the Registration number of the vehicle is transmitted to the master XBee. This information is then stored into a server, from which the data can be accessed anywhere via internet. We have also developed the prototype of the Web Monitoring System by which the data can be accessed from the server.
{"title":"Development of a prototype to detect speed limit violation for better traffic management","authors":"Joyeeta Goswami, Shirsha Ghosh, Shivaditya Katiyar, A. Majumder","doi":"10.1109/IC3.2015.7346723","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346723","url":null,"abstract":"Due to the extreme fast movement of traffic in the busy localities, the cases of road accidents are increasing day by day. Traffic Control Board made different speed limit for different places to limit the speed, but it is not possible to always monitor the infringements manually due to several factors. This paper proposes development of a prototype by which the Traffic Control Board automatically gets the details of the over speed vehicles in any place. Specifically, a network of Master XBees are installed in every locality that will broadcast the information regarding the speed limit of the region. The vehicle will have a device that has a CPU, a speedometer along with another XBee. This XBee will get the speed limit of the region from the Master XBee and the CPU will compare that with the instantaneous speed of the vehicle. If the instantaneous speed is higher than the speed limit of the region then a warning message will be displayed and a particular time slot is given to check the speed. After the time if the speed is not reduced, then the information regarding the Registration number of the vehicle is transmitted to the master XBee. This information is then stored into a server, from which the data can be accessed anywhere via internet. We have also developed the prototype of the Web Monitoring System by which the data can be accessed from the server.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127185185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346704
M. GurunathReddy, K. S. Rao
In this paper, we propose a method to convert synthesised neutral speech to happy emotion speech by prosody modification and synthesizing laughter sequence. Excitation source features of verbal (spoken) and non-verbal (laughter) segments of elicited happy emotion are separately analysed and incorporated in the neutral speech. Pitch contours of verbal segments of the happy emotion are divided into three components and analysed separately for incorporation. Laughter sequence is synthesised by incorporating the appropriate pitch period and strength of excitation contours on a synthesised vowel utterance. Modulated frication noise is added to the laughter segments to enhance the quality further. The effectiveness of the synthesized happy speech is confirmed by the waveforms, spectrograms and subjective evaluations.
{"title":"Neutral to happy emotion conversion by blending prosody and laughter","authors":"M. GurunathReddy, K. S. Rao","doi":"10.1109/IC3.2015.7346704","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346704","url":null,"abstract":"In this paper, we propose a method to convert synthesised neutral speech to happy emotion speech by prosody modification and synthesizing laughter sequence. Excitation source features of verbal (spoken) and non-verbal (laughter) segments of elicited happy emotion are separately analysed and incorporated in the neutral speech. Pitch contours of verbal segments of the happy emotion are divided into three components and analysed separately for incorporation. Laughter sequence is synthesised by incorporating the appropriate pitch period and strength of excitation contours on a synthesised vowel utterance. Modulated frication noise is added to the laughter segments to enhance the quality further. The effectiveness of the synthesized happy speech is confirmed by the waveforms, spectrograms and subjective evaluations.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121515602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-20DOI: 10.1109/IC3.2015.7346661
Gurkiran Kaur, R. Miglani, G. S. Gaba, R. Pasricha
Energy conservation is one of the major aspects in Wireless Sensor Networks since it impacts the network lifetime. In this paper; we focus on the energy conservation in the MAC protocol which is basically used for the transmitting of data/selecting the channel for transmission. The energy conservation process is carried out by using the controlled access protocol. The paper emphasizes on operation of primary and secondary nodes in the polling mechanism and MACA-BI to carry out transmission in proper manner without any delay factor involved. The lifetime of a node and network of proposed technique is compared with the network using Random Access Protocol by considering the power consumed by each node under various modes.
{"title":"Energy conservation and collision avoidance by controlled access protocol in WSN","authors":"Gurkiran Kaur, R. Miglani, G. S. Gaba, R. Pasricha","doi":"10.1109/IC3.2015.7346661","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346661","url":null,"abstract":"Energy conservation is one of the major aspects in Wireless Sensor Networks since it impacts the network lifetime. In this paper; we focus on the energy conservation in the MAC protocol which is basically used for the transmitting of data/selecting the channel for transmission. The energy conservation process is carried out by using the controlled access protocol. The paper emphasizes on operation of primary and secondary nodes in the polling mechanism and MACA-BI to carry out transmission in proper manner without any delay factor involved. The lifetime of a node and network of proposed technique is compared with the network using Random Access Protocol by considering the power consumed by each node under various modes.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121631450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-08-01DOI: 10.1109/IC3.2015.7346645
Ruoqian Liu, Ankit Agrawal, W. Liao, A. Choudhary, Zhengzhang Chen
Searching for solutions that optimize a continuous function can be difficult due to the infinite search space, and can be further complicated by the high dimensionality in the number of variables and complexity in the structure of constraints. Both deterministic and stochastic methods have been presented in the literature with a purpose of exploiting the search space and avoiding local optima as much as possible. In this research, we develop a machine learning framework aiming to `prune' the search effort of both types of optimization techniques by developing meta-heuristics, attempting to knowledgeably reordering the search space and reducing the search region. Numerical examples demonstrate that this approach can effectively find the global optimal solutions and significantly reduce the computational time for seven benchmark problems with variable dimensions of 100, 500 and 1000, compared to Genetic Algorithms.
{"title":"Pruned search: A machine learning based meta-heuristic approach for constrained continuous optimization","authors":"Ruoqian Liu, Ankit Agrawal, W. Liao, A. Choudhary, Zhengzhang Chen","doi":"10.1109/IC3.2015.7346645","DOIUrl":"https://doi.org/10.1109/IC3.2015.7346645","url":null,"abstract":"Searching for solutions that optimize a continuous function can be difficult due to the infinite search space, and can be further complicated by the high dimensionality in the number of variables and complexity in the structure of constraints. Both deterministic and stochastic methods have been presented in the literature with a purpose of exploiting the search space and avoiding local optima as much as possible. In this research, we develop a machine learning framework aiming to `prune' the search effort of both types of optimization techniques by developing meta-heuristics, attempting to knowledgeably reordering the search space and reducing the search region. Numerical examples demonstrate that this approach can effectively find the global optimal solutions and significantly reduce the computational time for seven benchmark problems with variable dimensions of 100, 500 and 1000, compared to Genetic Algorithms.","PeriodicalId":217950,"journal":{"name":"2015 Eighth International Conference on Contemporary Computing (IC3)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132612515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：