The algorithm used to train an Artificial Neural Network (ANN) plays an important role in its implementation. Analog VLSI implementations of ANN using back propagation algorithm for multi-layer perceptron (MLP) architectures were reported earlier. In this paper, we used an algorithm which uses forward only computation to update the weights, instead of forward and backward computation resulting in reduced computation time. The chosen algorithm, can train all types of architectures in less time, even where back propagation and other second order algorithms fail. An analog VLSI implementation of this algorithm can further reduce the area and power dissipation. To validate our idea, we designed and implemented a two input-one hidden layer-one output MLP network. All the blocks were implemented in CADENCE Virtuoso tool using the 180nm technology library. The resultant network architecture was tested successfully for digital applications like AND, OR and analog applications - compression and decompression
{"title":"Analog Implementation of Artificial Neural Networks Using Forward Only Computation","authors":"S. Mada, Srinivas B. Mandalika","doi":"10.1109/AMS.2017.10","DOIUrl":"https://doi.org/10.1109/AMS.2017.10","url":null,"abstract":"The algorithm used to train an Artificial Neural Network (ANN) plays an important role in its implementation. Analog VLSI implementations of ANN using back propagation algorithm for multi-layer perceptron (MLP) architectures were reported earlier. In this paper, we used an algorithm which uses forward only computation to update the weights, instead of forward and backward computation resulting in reduced computation time. The chosen algorithm, can train all types of architectures in less time, even where back propagation and other second order algorithms fail. An analog VLSI implementation of this algorithm can further reduce the area and power dissipation. To validate our idea, we designed and implemented a two input-one hidden layer-one output MLP network. All the blocks were implemented in CADENCE Virtuoso tool using the 180nm technology library. The resultant network architecture was tested successfully for digital applications like AND, OR and analog applications - compression and decompression","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131632794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The morphological differences between somatosensory evoked potential (SEP) signals from a normal spinal pathway and spinal pathway affected by spinal cord injury (SCI) provide an indication of the degree of SCI. A sparse representation of the fit between these signals is proposed in this paper as an SCI assessment method. The proposed method is tested on actual SEP signals collected from rodents that have been subjected to spinal transection. Results indicate that the proposed method provides a robust measure of the different degrees of SCI resulting from transection of the spinal cord.
{"title":"Assessment of Spinal Cord Injury via Sparse Modeling of Somatosensory Evoked Potential Signals","authors":"H. Mir, H. Al-Nashash, J. Kortelainen, A. All","doi":"10.1109/AMS.2017.11","DOIUrl":"https://doi.org/10.1109/AMS.2017.11","url":null,"abstract":"The morphological differences between somatosensory evoked potential (SEP) signals from a normal spinal pathway and spinal pathway affected by spinal cord injury (SCI) provide an indication of the degree of SCI. A sparse representation of the fit between these signals is proposed in this paper as an SCI assessment method. The proposed method is tested on actual SEP signals collected from rodents that have been subjected to spinal transection. Results indicate that the proposed method provides a robust measure of the different degrees of SCI resulting from transection of the spinal cord.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114252519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Modern electronic tolling systems consists of on board units (OBUs) or tags that are carried in a vehicles and has a unique code that is used to identify a customer account. The wireless communications between the on-board unit or tag and road side unit is the most critical function. The DSRC communication technology intended for vehicle safety applications in Intelligent Transport Systems which can be used for applications such as tolling and is expected to be integrated into all new vehicles manufactured in the future. A design for tagless tolling system using DSRC to communicate with an OBU instead of tags is presented in this report. Analysis of the wireless signal propagation at 5.9GHz for a model of a 4 lane tolling point is completed using a simulation in MATLAB. The Signal-to-Interference ratio is used to characterise the quality of the wireless channel under shadowing. Results of the simulation show that co-channel interference from communications in adjacent lanes is a significant problem especially in multi lane free flow tolling points. Outage probability calculations show a small communications zone close to the gantry that can be used to complete the tolling transactions.
{"title":"Tagless Tolling Using DSRC for Intelligent Transport System: An Interference Study","authors":"Hamish Koelmeyer, S. Kandeepan","doi":"10.1109/AMS.2017.33","DOIUrl":"https://doi.org/10.1109/AMS.2017.33","url":null,"abstract":"Modern electronic tolling systems consists of on board units (OBUs) or tags that are carried in a vehicles and has a unique code that is used to identify a customer account. The wireless communications between the on-board unit or tag and road side unit is the most critical function. The DSRC communication technology intended for vehicle safety applications in Intelligent Transport Systems which can be used for applications such as tolling and is expected to be integrated into all new vehicles manufactured in the future. A design for tagless tolling system using DSRC to communicate with an OBU instead of tags is presented in this report. Analysis of the wireless signal propagation at 5.9GHz for a model of a 4 lane tolling point is completed using a simulation in MATLAB. The Signal-to-Interference ratio is used to characterise the quality of the wireless channel under shadowing. Results of the simulation show that co-channel interference from communications in adjacent lanes is a significant problem especially in multi lane free flow tolling points. Outage probability calculations show a small communications zone close to the gantry that can be used to complete the tolling transactions.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126971577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Based on the topology of the quadratic boost converter, this paper presents three new improved topologies of boost converters employing coupled inductors, two converters using one coupled inductor and one converter using two coupled inductors. Generally speaking, the use of coupled inductors is very helpful for increasing the step up ratio of the dc-dc boost converter. Each converter has a high step up ratio and a high power transferring efficiency. In this paper, the operating principles and theoretical analysis will be discussed in details. And also simulation circuits will be developed by using the software LTspice XVII to illustrate the capability and potential value of the proposed circuits.
{"title":"Quadratic DC-DC Boost Converter Using Coupled Inductors for High Step-Up Ratio","authors":"Yiyang Li, S. Sathiakumar","doi":"10.1109/AMS.2017.29","DOIUrl":"https://doi.org/10.1109/AMS.2017.29","url":null,"abstract":"Based on the topology of the quadratic boost converter, this paper presents three new improved topologies of boost converters employing coupled inductors, two converters using one coupled inductor and one converter using two coupled inductors. Generally speaking, the use of coupled inductors is very helpful for increasing the step up ratio of the dc-dc boost converter. Each converter has a high step up ratio and a high power transferring efficiency. In this paper, the operating principles and theoretical analysis will be discussed in details. And also simulation circuits will be developed by using the software LTspice XVII to illustrate the capability and potential value of the proposed circuits.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131139268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The extended memristor is characterized by its port equation as state-dependent Ohm's law and by the state equation describing its dynamics. Its equivalent model is the differential equation (DE) between the memristor voltage, current, and their derivatives with respect to time. The paper presents the derivation of a general form of the DE for arbitrary extended memristors with scalar, i.e.one-dimensional state. It is shown that this DE is always a first-order nonlinear equation. DEs for the hyperbolic model of the Hewlett-Packard memristor with the Joglekar window function and also for some representatives of generic memristors are presented.
{"title":"Voltage-Current Differential Equations of Extended Memristors with One-Dimensional State","authors":"V. Biolková, Zdeněk Biolek, D. Biolek, Z. Kolka","doi":"10.1109/AMS.2017.17","DOIUrl":"https://doi.org/10.1109/AMS.2017.17","url":null,"abstract":"The extended memristor is characterized by its port equation as state-dependent Ohm's law and by the state equation describing its dynamics. Its equivalent model is the differential equation (DE) between the memristor voltage, current, and their derivatives with respect to time. The paper presents the derivation of a general form of the DE for arbitrary extended memristors with scalar, i.e.one-dimensional state. It is shown that this DE is always a first-order nonlinear equation. DEs for the hyperbolic model of the Hewlett-Packard memristor with the Joglekar window function and also for some representatives of generic memristors are presented.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"69 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132512473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, we investigate the optimal energy-efficient power control scheme for full-duplex (FD) device-to-device (D2D) communications in cellular networks. Our purpose is to maximize the energy efficiency (EE) of FD D2D pairs while fulfilling the minimum rate requirements of both D2D user equipments (DUEs) and cellular user equipment (CUE). The EE problem is formulated into a non-convex and nonlinear fractional form which is difficult to be solved directly. In order to solve the problem, we propose an effective algorithm that is based on both Dinkelbach method and a power minimization step while maintaining the throughput of the FD D2D pairs. Simulation results validate the performance of the proposed algorithm and show the improvement of the system EE. Compared with the conventional half-duplex (HD) D2D communications, FD D2D communications can obtain much higher EE and SE when the self-interference is effectively mitigated.
{"title":"Energy-Efficient Power Control for Underlaying Full-Duplex Device-to-Device Communications","authors":"Jianfeng Ding, Ling-ge Jiang, Chen He","doi":"10.1109/AMS.2017.32","DOIUrl":"https://doi.org/10.1109/AMS.2017.32","url":null,"abstract":"In this paper, we investigate the optimal energy-efficient power control scheme for full-duplex (FD) device-to-device (D2D) communications in cellular networks. Our purpose is to maximize the energy efficiency (EE) of FD D2D pairs while fulfilling the minimum rate requirements of both D2D user equipments (DUEs) and cellular user equipment (CUE). The EE problem is formulated into a non-convex and nonlinear fractional form which is difficult to be solved directly. In order to solve the problem, we propose an effective algorithm that is based on both Dinkelbach method and a power minimization step while maintaining the throughput of the FD D2D pairs. Simulation results validate the performance of the proposed algorithm and show the improvement of the system EE. Compared with the conventional half-duplex (HD) D2D communications, FD D2D communications can obtain much higher EE and SE when the self-interference is effectively mitigated.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"449 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131766114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Natural disaster prevention and reduction strategies are of national importance. In Japan, earthquakes occur frequently and are often of a significant magnitude. Such occurrences of natural disasters require adequate preparations, and robots are the preferred choice of personnel for disaster-related search and rescue tasks. Humanoid robots, in particular, can modify their behavior depending on the situations or conditions, and are expected to be used in disaster-affected areas for search and rescue activities. This study focuses on the humanoid robot shuffling walk, which is expected to be advantageous when moving around a narrow area with a constrained posture, as is often required for rescue operations in the devastated area. This report will propose a new load gradient model in foot soles for the synchronous, non-parallel shuffling walk of humanoid robots, for efficient movement.
{"title":"Load Gradient Model in Foot Soles for Non-Parallel Shuffling Humanoid Walk","authors":"M. Koeda, Daiki Sugimoto","doi":"10.1109/AMS.2017.19","DOIUrl":"https://doi.org/10.1109/AMS.2017.19","url":null,"abstract":"Natural disaster prevention and reduction strategies are of national importance. In Japan, earthquakes occur frequently and are often of a significant magnitude. Such occurrences of natural disasters require adequate preparations, and robots are the preferred choice of personnel for disaster-related search and rescue tasks. Humanoid robots, in particular, can modify their behavior depending on the situations or conditions, and are expected to be used in disaster-affected areas for search and rescue activities. This study focuses on the humanoid robot shuffling walk, which is expected to be advantageous when moving around a narrow area with a constrained posture, as is often required for rescue operations in the devastated area. This report will propose a new load gradient model in foot soles for the synchronous, non-parallel shuffling walk of humanoid robots, for efficient movement.","PeriodicalId":219494,"journal":{"name":"2017 Asia Modelling Symposium (AMS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115223100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：